Add M5271EVB board support.

9 files changed, 497 insertions, 2 deletions

diff --git a/CHANGELOG b/CHANGELOG
index f2d7985fea..595e900797 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Add M5271EVB board support.
+
 * Make R5200 specific low level initialization board conditional.
 
 * Update CPU target identification strings for Coldfire family.
diff --git a/MAKEALL b/MAKEALL
index cbc105ba6f..4880d1e0ad 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -277,7 +277,7 @@ LIST_microblaze="suzaku"
 ## ColdFire Systems
 #########################################################################
 
-LIST_coldfire="cobra5272 M5272C3 M5282EVB TASREG r5200"
+LIST_coldfire="cobra5272 M5272C3 M5282EVB TASREG r5200 M5271EVB"
 
 #-----------------------------------------------------------------------
 
diff --git a/Makefile b/Makefile
index 0470f33bd7..0638a648e1 100644
--- a/Makefile
+++ b/Makefile
@@ -1318,6 +1318,9 @@ TASREG_config :		unconfig
 r5200_config :		unconfig
 	@./mkconfig $(@:_config=) m68k mcf52x2 r5200
 
+M5271EVB_config :		unconfig
+	@./mkconfig $(@:_config=) m68k mcf52x2 m5271evb
+
 #########################################################################
 ## MPC83xx Systems
 #########################################################################
diff --git a/board/m5271evb/Makefile b/board/m5271evb/Makefile
new file mode 100644
index 0000000000..34de983e30
--- /dev/null
+++ b/board/m5271evb/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/m5271evb/config.mk b/board/m5271evb/config.mk
new file mode 100644
index 0000000000..9a7af7c2c6
--- /dev/null
+++ b/board/m5271evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xffe00000
diff --git a/board/m5271evb/m5271evb.c b/board/m5271evb/m5271evb.c
new file mode 100644
index 0000000000..d364bd612c
--- /dev/null
+++ b/board/m5271evb/m5271evb.c
@@ -0,0 +1,125 @@
+/*
+ * (C) Copyright 2000-2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5271.h>
+#include <asm/immap_5271.h>
+
+int checkboard (void) {
+	puts ("Board: Freescale M5271EVB\n");
+	return 0;
+};
+
+long int initdram (int board_type) {
+
+	int i;
+
+	/* Enable Address lines 23-21 and lower 16bits of data path */
+	mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
+			MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
+			MCF_GPIO_AD_DATAL);
+
+	/* Set CS2 pin to be SD_CS0 */
+	mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
+			| MCF_GPIO_PAR_CS_PAR_CS2);
+
+	/* Configure SDRAM Control Pin Assignemnt Register */
+	mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
+			MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
+			MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
+			MCF_GPIO_SDRAM_SDCS_11);
+
+	/*
+	 * Check to see if the SDRAM has already been initialized
+	 * by a run control tool
+	 */
+	if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE))
+	{
+		/* Initialize DRAM Control Register: DCR */
+		mbar_writeShort(MCF_SDRAMC_DCR, 
+				MCF_SDRAMC_DCR_RTIM(0x01)
+				| MCF_SDRAMC_DCR_RC(0x30));
+
+		/*
+		 * Initialize DACR0
+		 *
+		 * CASL: 01
+		 * CBM: cmd at A20, bank select bits 21 and up
+		 * PS: 32bit port size
+		 */
+		mbar_writeLong(MCF_SDRAMC_DACR0,
+				MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18)
+				| MCF_SDRAMC_DACRn_CASL(1)
+				| MCF_SDRAMC_DACRn_CBM(3)
+				| MCF_SDRAMC_DACRn_PS(0));
+
+		/* Initialize DMR0 */
+		mbar_writeLong(MCF_SDRAMC_DMR0, 
+				MCF_SDRAMC_DMRn_BAM_16M
+				| MCF_SDRAMC_DMRn_V);
+
+		/* Set IP bit in DACR */
+		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+				| MCF_SDRAMC_DACRn_IP);
+
+		/* Wait at least 20ns to allow banks to precharge */
+		for (i = 0; i < 5; i++)
+			asm(" nop");
+
+		/* Write to this block to initiate precharge */
+		*(u32 *)(CFG_SDRAM_BASE) = 0xa5a5a5a5;
+
+		/* Set RE bit in DACR */
+		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+				| MCF_SDRAMC_DACRn_RE);
+
+		/* Wait for at least 8 auto refresh cycles to occur */
+		for (i = 0; i < 2000; i++)
+			asm(" nop");
+
+		/* Finish the configuration by issuing the MRS */
+		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
+				| MCF_SDRAMC_DACRn_MRS);
+
+		/*
+		 * Write to the SDRAM Mode Register A0-A11 = 0x400
+		 *
+		 * Write Burst Mode = Programmed Burst Length
+		 * Op Mode = Standard Op
+		 * CAS Latency = 2
+		 * Burst Type = Sequential
+		 * Burst Length = 1
+		 */
+		*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xa5a5a5a5;
+	}
+
+	return CFG_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram (void) {
+
+	/* TODO: XXX XXX XXX */
+	printf ("DRAM test not implemented!\n");
+
+	return (0);
+}
diff --git a/board/m5271evb/u-boot.lds b/board/m5271evb/u-boot.lds
new file mode 100644
index 0000000000..69f31793ad
--- /dev/null
+++ b/board/m5271evb/u-boot.lds
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+GROUP(libgcc.a)
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf52x2/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    cpu/mcf52x2/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o	(.ppcenv)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/common/environment.c b/common/environment.c
index c7f54c6bd8..81471ce71c 100644
--- a/common/environment.c
+++ b/common/environment.c
@@ -59,7 +59,8 @@
      defined(CONFIG_TQM8xxL)	|| \
      defined(CONFIG_RRVISION)	|| \
      defined(CONFIG_TRAB)   	|| \
-     defined(CONFIG_PPCHAMELEONEVB) )	&& \
+     defined(CONFIG_PPCHAMELEONEVB) || \
+     defined(CONFIG_M5271EVB))	&& \
      defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
 /* XXX - This only works with GNU C */
 #  define __PPCENV__ __attribute__ ((section(".ppcenv")))
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
new file mode 100644
index 0000000000..3935f56aa3
--- /dev/null
+++ b/include/configs/M5271EVB.h
@@ -0,0 +1,154 @@
+/*
+ * Configuation settings for the Freescale M5271EVB
+ *
+ * Based on MC5272C3 and r5200 board configs
+ * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5271EVB_H
+#define _M5271EVB_H
+
+#define DEBUG
+#undef DEBUG
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MCF52x2		/* define processor family */
+#define CONFIG_M5271		/* define processor type */
+#define CONFIG_M5271EVB		/* define board type */
+
+#define CONFIG_IPADDR		192.168.30.1
+#define CONFIG_SERVERIP		192.168.1.1
+#define CONFIG_ETHADDR		00:06:3b:01:41:55
+
+#define CONFIG_BAUDRATE		19200
+#define CFG_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG		/* disable watchdog */
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET		0x4000
+#define CFG_ENV_SECT_SIZE	0x2000
+#define CFG_ENV_IS_IN_FLASH	1
+#else
+#define CFG_ENV_ADDR		0xffe04000
+#define CFG_ENV_SECT_SIZE	0x2000
+#define CFG_ENV_IS_IN_FLASH	1
+#endif
+
+#define CONFIG_COMMANDS	 ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CFG_PROMPT		"=> "
+#define CFG_LONGHELP				/* undef to save memory		*/
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE		1024		/* Console I/O Buffer Size	*/
+#else
+#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS		16		/* max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+#define CFG_LOAD_ADDR		0x00100000
+
+#define CFG_MEMTEST_START	0x400
+#define CFG_MEMTEST_END		0x380000
+
+#define CFG_HZ			1000000
+#define CFG_CLK			100000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR		0x40000000	/* Register Base Addrs */
+
+/* Enable FEC ethernet */
+#define FEC_ENET
+#define CONFIG_NET_RETRY_COUNT	5
+#define CFG_ENET_BD_BASE	0x480000
+
+/*
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR	0x20000000
+#define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM	*/
+#define CFG_GBL_DATA_SIZE	64	/* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_SDRAM_SIZE		16		/* SDRAM size in MB */
+#define CFG_FLASH_BASE		0xffe00000
+
+#ifdef	CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE	0x20000
+#else
+#define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN		0x40000
+#define CFG_MALLOC_LEN		(256 << 10)
+#define CFG_BOOTPARAMS_LEN	(64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+
+/* FLASH organization */
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
+#define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
+#define CFG_FLASH_ERASE_TOUT	1000
+
+#define CFG_FLASH_CFI		1
+#define CFG_FLASH_CFI_DRIVER	1
+#define CFG_FLASH_SIZE		0x200000
+
+/* Cache Configuration */
+#define CFG_CACHELINE_SIZE	16
+
+/* Port configuration */
+#define CFG_FECI2C		0xF0
+
+#endif	/* _M5271EVB_H */