u-boot.git/include/ppc440.h, branch v2009.08-rc2 Unnamed repository; edit this file 'description' to name the repository. Dual-license IBM code contributions 2009-08-09T21:15:33+00:00 Josh Boyer jwboyer@linux.vnet.ibm.com 2009-08-07T17:53:20+00:00 317734966e763fdee183898c0ed940c9bada2541 It was brought to our attention that U-Boot contains code derived from the IBM OpenBIOS source code originally provided with some of the older PowerPC 4xx development boards. As a result, the original license of this code has been carried in the various files for a number of years in the U-Boot project. IBM is dual-licensing the IBM code contributions already present in U-Boot under either the terms of the GNU General Public License version 2, or the original code license already present. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> 
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards.  As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.

IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chips 2009-07-30T05:22:18+00:00 Stefan Roese sr@denx.de 2009-07-29T06:45:27+00:00 89bcc4875007ef6608297dc11e7a0d1fbd9900d2 This patch is based on a diff created by Phong Vo from AMCC. Signed-off-by: Phong Vo <pvo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de> 
This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo <pvo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Replace 4xx lowercase SPR references 2009-07-24T04:47:17+00:00 Matthias Fuchs matthias.fuchs@esd.eu 2009-07-22T15:27:56+00:00 58ea142fb2e969f32306c8da1dabfaebd6fa141a Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs 2008-11-21T09:52:33+00:00 Dave Mitchell dmitch71@gmail.com 2008-11-20T20:00:49+00:00 b14ca4b61a681f75f3125676e09d7ce6af66e927 Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> 
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.

Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h 2008-11-21T09:52:09+00:00 Steven A. Falco sfalco@harris.com 2008-11-20T19:37:57+00:00 711e2b2af820d21d9931d4cf8057d3894600fd54 The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: Stefan Roese <sr@denx.de> 
The definitions of bits in SDR_CFG are incorrect, and not used within
U-Boot.  Therefore, they can be removed.

The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions,
and are unused, so they can be removed too.

A definition for SDR0_DDRCFG is added.

Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Add AMCC Arches board support (dual 460GT) 2008-10-21T15:34:46+00:00 Adam Graham agraham@amcc.com 2008-10-08T17:12:53+00:00 f09f09d3899017aaaa2b031bba63c271e9c48e4d The Arches Evaluation board is based on the AMCC 460GT SoC chip. This board is a dual processor board with each processor providing independent resources for Rapid IO, Gigabit Ethernet, and serial communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR FLASH, UART, EEPROM and temperature sensor, along with a shared debug port. The two 460GT's will communicate with each other via shared memory, Gigabit Ethernet and x1 PCI-Express. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de> 
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
rename CFG_ macros to CONFIG_SYS 2008-10-18T19:54:03+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-10-16T13:01:15+00:00 6d0f6bcf337c5261c08fabe12982178c2c489d76 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines 2008-09-05T10:04:16+00:00 Adam Graham agraham@amcc.com 2008-09-03T19:26:59+00:00 f6b6c45840f9b4671d2d97243a12a1f3ffb64765 Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe, 2008-08-21T08:31:16+00:00 Prodyut Hazarika phazarika@amcc.com 2008-08-20T16:38:51+00:00 079589bcfb24ba11068460276a3cc9549ab5346f PPC405EX and PPC460EX/GT/SX - Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX processors - Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared across processors (405 and 440/460) - Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX processors - Add register bit definitions for Memory Queue Configuration registers Signed-off-by: Prodyut Hazarika <phazarika@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de> 
	PPC405EX and PPC460EX/GT/SX

- Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
  processors
- Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
  across processors (405 and 440/460)
- Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
  processors
- Add register bit definitions for Memory Queue Configuration registers

Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Continue cleanup of ppc440.h 2008-07-11T11:18:14+00:00 Stefan Roese sr@denx.de 2008-06-30T12:11:07+00:00 26173fc6f60521c2a8072f652f863617fc11ba9a This patch continues the ppc440.h cleanup by removing some of the unused defines. Signed-off-by: Stefan Roese <sr@denx.de> 
This patch continues the ppc440.h cleanup by removing some of the unused
defines.

Signed-off-by: Stefan Roese <sr@denx.de>