<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/include/pci.h, branch v2011.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs</title>
<updated>2011-03-29T12:41:37+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar@freescale.com</email>
</author>
<published>2011-02-01T15:55:58+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=b03a466d6ceb9dbfd1a1638f355e9c8b4833259f'/>
<id>b03a466d6ceb9dbfd1a1638f355e9c8b4833259f</id>
<content type='text'>
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, &amp; P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, &amp; P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: fix pcie configuration space read/write</title>
<updated>2011-02-05T23:01:52+00:00</updated>
<author>
<name>Leo Liu</name>
<email>liucai.lfn@gmail.com</email>
</author>
<published>2011-01-19T11:50:47+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=10fa8d7c703b564bcbdaa2345442e30483c01f98'/>
<id>10fa8d7c703b564bcbdaa2345442e30483c01f98</id>
<content type='text'>
This patch fix a problem for the pcie enumeration when the mpc83xx
pcie controller is connected with switch or we use both of the two
pcie controller.

Signed-off-by: Leo Liu &lt;liucai.lfn@gmail.com&gt;

fix codingstyle and compiler warning: 'pcie_priv' defined but not used

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch fix a problem for the pcie enumeration when the mpc83xx
pcie controller is connected with switch or we use both of the two
pcie controller.

Signed-off-by: Leo Liu &lt;liucai.lfn@gmail.com&gt;

fix codingstyle and compiler warning: 'pcie_priv' defined but not used

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixup</title>
<updated>2011-01-14T07:32:19+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2010-12-17T11:57:25+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=3a0e3c27a50e395a59497e8bd60a00404e662eb1'/>
<id>3a0e3c27a50e395a59497e8bd60a00404e662eb1</id>
<content type='text'>
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus.  Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.

Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
back by searching for it means we can do things like dynamically allocate
them or not have to expose the static structures to all users.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus.  Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.

Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
back by searching for it means we can do things like dynamically allocate
them or not have to expose the static structures to all users.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Clean up PCI info when CONFIG_PCI_SCAN_SHOW</title>
<updated>2010-11-14T22:46:46+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-10-29T22:59:27+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=983eb9d1628a7363f98c8c125522815c429ddf97'/>
<id>983eb9d1628a7363f98c8c125522815c429ddf97</id>
<content type='text'>
This change does the following:
- Removes the printing of the PCI interrupt line value.  This is
  normally set to 0 by U-Boot on bootup and is rarely used during
  everyday operation.

- Prints out the PCI function number of a device.  Previously a device
  with multiple functions would be printed identically 2 times, which is
  generally confusing.  For example, on an Intel 2 port gigabit Ethernet
  card the following was displayed:
    ...
    04  01  8086  1010  0200  00
    04  01  8086  1010  0200  00
    ...

- Prints a text description of each device's PCI class instead of the
  raw PCI class code.  The textual description makes it much easier to
  determine what devices are installed on a PCI bus.

- Changes the general formatting of the PCI device output.

Previous output:
  PCIE1: connected as Root Complex
          04  01  8086  1010  0200  00
          04  01  8086  1010  0200  00
          03  00  10b5  8112  0604  00
          02  01  10b5  8518  0604  00
          02  02  10b5  8518  0604  00
          08  00  1957  0040  0b20  00
          07  00  10b5  8518  0604  00
          09  00  10b5  8112  0604  00
          07  01  10b5  8518  0604  00
          07  02  10b5  8518  0604  00
          06  00  10b5  8518  0604  00
          02  03  10b5  8518  0604  00
          01  00  10b5  8518  0604  00
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d  00  1957  0040  0b20  00
  PCIE2: Bus 0c - 0d

Updated output:
  PCIE1: connected as Root Complex
          04:01.0 - 8086:1010 - Network controller
          04:01.1 - 8086:1010 - Network controller
          03:00.0 - 10b5:8112 - Bridge device
          02:01.0 - 10b5:8518 - Bridge device
          02:02.0 - 10b5:8518 - Bridge device
          08:00.0 - 1957:0040 - Processor
          07:00.0 - 10b5:8518 - Bridge device
          09:00.0 - 10b5:8112 - Bridge device
          07:01.0 - 10b5:8518 - Bridge device
          07:02.0 - 10b5:8518 - Bridge device
          06:00.0 - 10b5:8518 - Bridge device
          02:03.0 - 10b5:8518 - Bridge device
          01:00.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d:00.0 - 1957:0040 - Processor
  PCIE2: Bus 0c - 0d

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change does the following:
- Removes the printing of the PCI interrupt line value.  This is
  normally set to 0 by U-Boot on bootup and is rarely used during
  everyday operation.

- Prints out the PCI function number of a device.  Previously a device
  with multiple functions would be printed identically 2 times, which is
  generally confusing.  For example, on an Intel 2 port gigabit Ethernet
  card the following was displayed:
    ...
    04  01  8086  1010  0200  00
    04  01  8086  1010  0200  00
    ...

- Prints a text description of each device's PCI class instead of the
  raw PCI class code.  The textual description makes it much easier to
  determine what devices are installed on a PCI bus.

- Changes the general formatting of the PCI device output.

Previous output:
  PCIE1: connected as Root Complex
          04  01  8086  1010  0200  00
          04  01  8086  1010  0200  00
          03  00  10b5  8112  0604  00
          02  01  10b5  8518  0604  00
          02  02  10b5  8518  0604  00
          08  00  1957  0040  0b20  00
          07  00  10b5  8518  0604  00
          09  00  10b5  8112  0604  00
          07  01  10b5  8518  0604  00
          07  02  10b5  8518  0604  00
          06  00  10b5  8518  0604  00
          02  03  10b5  8518  0604  00
          01  00  10b5  8518  0604  00
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d  00  1957  0040  0b20  00
  PCIE2: Bus 0c - 0d

Updated output:
  PCIE1: connected as Root Complex
          04:01.0 - 8086:1010 - Network controller
          04:01.1 - 8086:1010 - Network controller
          03:00.0 - 10b5:8112 - Bridge device
          02:01.0 - 10b5:8518 - Bridge device
          02:02.0 - 10b5:8518 - Bridge device
          08:00.0 - 1957:0040 - Processor
          07:00.0 - 10b5:8518 - Bridge device
          09:00.0 - 10b5:8112 - Bridge device
          07:01.0 - 10b5:8518 - Bridge device
          07:02.0 - 10b5:8518 - Bridge device
          06:00.0 - 10b5:8518 - Bridge device
          02:03.0 - 10b5:8518 - Bridge device
          01:00.0 - 10b5:8518 - Bridge device
  PCIE1: Bus 00 - 0b
  PCIE2: connected as Root Complex
          0d:00.0 - 1957:0040 - Processor
  PCIE2: Bus 0c - 0d

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe</title>
<updated>2009-08-28T22:12:36+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-08-05T12:49:27+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=8295b94400449586505ffe34ec024feb3d2c8fe4'/>
<id>8295b94400449586505ffe34ec024feb3d2c8fe4</id>
<content type='text'>
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not.  Additionally cleaned up some white space
and formatting in the file.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not.  Additionally cleaned up some white space
and formatting in the file.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add pci_last_busno() helper</title>
<updated>2009-02-23T21:51:10+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2009-02-19T15:20:41+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=cc2a8c7751ddbae3116660064f446888538b93e9'/>
<id>cc2a8c7751ddbae3116660064f446888538b93e9</id>
<content type='text'>
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.

Will be used by PCI/PCIe initialization code.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.

Will be used by PCI/PCIe initialization code.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/pci: Create pci_map_bar function</title>
<updated>2009-02-09T23:27:13+00:00</updated>
<author>
<name>Becky Bruce</name>
<email>beckyb@kernel.crashing.org</email>
</author>
<published>2009-02-04T00:10:50+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=6e61fae4d360a1380b63e7d007b31477e366bcce'/>
<id>6e61fae4d360a1380b63e7d007b31477e366bcce</id>
<content type='text'>
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses.  pci_map_bar()
is created to return the virtual address for a pci region.

Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses.  pci_map_bar()
is created to return the virtual address for a pci region.

Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarity</title>
<updated>2009-02-07T22:50:04+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-02-06T15:49:31+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=ff4e66e93c1ad47644be3b4ffd6a46e1ce9b6612'/>
<id>ff4e66e93c1ad47644be3b4ffd6a46e1ce9b6612</id>
<content type='text'>
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.

Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.

Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: Add support for MPC83xx PCI-E controllers</title>
<updated>2009-01-22T00:43:49+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2009-01-08T01:26:12+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8'/>
<id>fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8</id>
<content type='text'>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Allow for PCI addresses to be 64-bit</title>
<updated>2008-10-24T22:32:49+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-10-21T13:36:08+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=30e76d5e3bc4c5208ee63585fe12b409d9308cd8'/>
<id>30e76d5e3bc4c5208ee63585fe12b409d9308cd8</id>
<content type='text'>
PCI bus is inherently 64-bit.  While not all system require access to
the full 64-bit PCI address range some do.  This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Andrew Fleming-AFLEMING &lt;afleming@freescale.com&gt;
Acked-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PCI bus is inherently 64-bit.  While not all system require access to
the full 64-bit PCI address range some do.  This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Andrew Fleming-AFLEMING &lt;afleming@freescale.com&gt;
Acked-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
