Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Yu Liu <Yu.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
malloc to support up to eight Ethernet interfaces.
- Move Environment address out of uboot thus the saved environment variables
will not be erased after u-boot is re-programmed.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Remove "saveenv" from "update" definition: the environment is outside
the U-Boot image on TQM85xx and therefor not affected by updates.

Also "beautify" code a bit (vertical alignment).

Signed-off-by: Wolfgang Denk <wd@denx.de>

Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM
series while new boards have 'N' type Flashes from the S29GLxxxN
series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.

We now change the configuration to the new flash types for all
boards; this also works on old boards - we just waste two flash
sectors for the environment which could be smaller there.

Signed-off-by: Wolfgang Denk <wd@denx.de>

The SYS_CLK_IN of MPC8569MDS is 66.66MHz,
The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor.
so, change the SYS_CLK_IN from 66MHz to 66.66MHz.

Signed-off-by: Dave Liu <daveliu@freescale.com>

Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.

It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'

And it repaires the trizepsiv board build which was broken around the
same routines

Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.

U-Boot always operated this PHY interface in GMII mode.  It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Ira Snyder <iws@ovro.caltech.edu>
Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Dave Liu <DaveLiu@freescale.com>

The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>