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<title>u-boot.git/include/asm-ppc/global_data.h, branch v2009.06-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>mpc83xx: Add support for MPC83xx PCI-E controllers</title>
<updated>2009-01-22T00:43:49+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2009-01-08T01:26:12+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8'/>
<id>fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8</id>
<content type='text'>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8[56]xx: Put localbus clock in sysinfo and gd</title>
<updated>2008-12-20T00:32:49+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:37+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28'/>
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Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03+00:00</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15+00:00</published>
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<id>6d0f6bcf337c5261c08fabe12982178c2c489d76</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
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<pre>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Allow console input to be disabled</title>
<updated>2008-09-06T20:36:54+00:00</updated>
<author>
<name>Mark Jackson</name>
<email>mpfj@mimc.co.uk</email>
</author>
<published>2008-08-25T18:21:30+00:00</published>
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<id>f5c3ba79788b0e39baab7026d374fe375dd1a43f</id>
<content type='text'>
Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.

When CONFIG_DISABLE_CONSOLE is defined, setting
GD_FLG_DISABLE_CONSOLE disables all console input and output.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
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<pre>
Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.

When CONFIG_DISABLE_CONSOLE is defined, setting
GD_FLG_DISABLE_CONSOLE disables all console input and output.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: Store and display Arbiter Event Register values</title>
<updated>2008-09-03T21:06:57+00:00</updated>
<author>
<name>Nick Spence</name>
<email>nick.spence@freescale.com</email>
</author>
<published>2008-08-28T21:09:19+00:00</published>
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<id>46497056ae3b1e81e736e9cf3a170472c5d9719f</id>
<content type='text'>
Record the Arbiter Event Register values and optionally display them.

The Arbiter Event Register can record the type and effective address of
an arbiter error, even through an HRESET. This patch stores the values in
the global data structure.

Display of the Arbiter Event registers immediately after the RSR value
can be enabled with defines. The Arbiter values will only be displayed
if an arbiter event has occured since the last Power On Reset, and either
of the following defines exist:
 #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
                                    and type register values
 #define CONFIG_DISPLAY_AER_FULL  - display and interpret the arbiter
                                    event register values

Address Only transactions are one of the trapped events that can register
as an arbiter event. They occur with some cache manipulation instructions
if the HID0_ABE (Address Broadcast Enable) is set and the memory region
has the MEMORY_COHERENCE WIMG bit set. Setting:
 #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
                              only events, so that it can still capture
                              other real problems.

Signed-off-by: Nick Spence &lt;nick.spence@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
Record the Arbiter Event Register values and optionally display them.

The Arbiter Event Register can record the type and effective address of
an arbiter error, even through an HRESET. This patch stores the values in
the global data structure.

Display of the Arbiter Event registers immediately after the RSR value
can be enabled with defines. The Arbiter values will only be displayed
if an arbiter event has occured since the last Power On Reset, and either
of the following defines exist:
 #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
                                    and type register values
 #define CONFIG_DISPLAY_AER_FULL  - display and interpret the arbiter
                                    event register values

Address Only transactions are one of the trapped events that can register
as an arbiter event. They occur with some cache manipulation instructions
if the HID0_ABE (Address Broadcast Enable) is set and the memory region
has the MEMORY_COHERENCE WIMG bit set. Setting:
 #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
                              only events, so that it can still capture
                              other real problems.

Signed-off-by: Nick Spence &lt;nick.spence@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc85xx: Add support for the MPC8536</title>
<updated>2008-08-27T16:43:54+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-08-12T16:14:19+00:00</published>
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<id>ef50d6c06ece74fb17e8d7510e62cad9df8b810d</id>
<content type='text'>
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Dejan Minic &lt;minic@freescale.com&gt;
Signed-off-by: Jason Jin &lt;Jason.jin@freescale.com&gt;
Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
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<pre>
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Dejan Minic &lt;minic@freescale.com&gt;
Signed-off-by: Jason Jin &lt;Jason.jin@freescale.com&gt;
Signed-off-by: Dave Liu &lt;daveliu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fix merge problems</title>
<updated>2008-08-06T12:05:38+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-08-06T12:05:38+00:00</published>
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<id>f2302d4430e7f3f48308d6a585320fe96af8afbd</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Change bd/gd memsize/ram_size to be phys_size_t.</title>
<updated>2008-06-11T22:54:53+00:00</updated>
<author>
<name>Becky Bruce</name>
<email>becky.bruce@freescale.com</email>
</author>
<published>2008-06-10T01:37:16+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=b57ca3e128cc10a133ba79bc7ec3e7b50e7c8fbe'/>
<id>b57ca3e128cc10a133ba79bc7ec3e7b50e7c8fbe</id>
<content type='text'>
Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs.  Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.

Signed-off-by: Becky Bruce &lt;becky.bruce@freescale.com&gt;
</content>
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<pre>
Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs.  Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.

Signed-off-by: Becky Bruce &lt;becky.bruce@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>FSL LAW: Keep track of LAW allocations</title>
<updated>2008-06-11T06:50:53+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-06-11T05:44:10+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=f060054dadbbe7027ca088eed806a3ef1f82fdb7'/>
<id>f060054dadbbe7027ca088eed806a3ef1f82fdb7</id>
<content type='text'>
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>POST: replace the LOGBUFF_INITIALIZED flag in gd-&gt;post_log_word (1 &lt;&lt; 31) with the GD_FLG_LOGINIT flag in gd-&gt;flags.</title>
<updated>2008-05-20T21:24:38+00:00</updated>
<author>
<name>Yuri Tikhonov</name>
<email>yur@emcraft.com</email>
</author>
<published>2008-05-08T13:46:42+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=0e15ddd11f1a84c465e434eb051d2ef08ef02b9b'/>
<id>0e15ddd11f1a84c465e434eb051d2ef08ef02b9b</id>
<content type='text'>
This way we become able to utilize the full post_log_word for POST
activities (overwise, POST ECC, which has 0x8000 ID, could be
erroneously treated as started in post_output_backlog() even if there
was actually no POST ECC run (because of OCM POST failure, for
example).

Signed-off-by: Yuri Tikhonov &lt;yur@emcraft.com&gt;
</content>
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<pre>
This way we become able to utilize the full post_log_word for POST
activities (overwise, POST ECC, which has 0x8000 ID, could be
erroneously treated as started in post_output_backlog() even if there
was actually no POST ECC run (because of OCM POST failure, for
example).

Signed-off-by: Yuri Tikhonov &lt;yur@emcraft.com&gt;
</pre>
</div>
</content>
</entry>
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