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<title>u-boot.git/drivers/spi/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>spi: mtk_snor: add support for MTK SPI NOR controller</title>
<updated>2021-01-29T15:35:14+00:00</updated>
<author>
<name>SkyLake.Huang</name>
<email>skylake.huang@mediatek.com</email>
</author>
<published>2021-01-20T07:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=7a49d61742c2387e9d5fbb1e1e707ef1e0c624b5'/>
<id>7a49d61742c2387e9d5fbb1e1e707ef1e0c624b5</id>
<content type='text'>
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 &amp; mt7629.

1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.

Signed-off-by: SkyLake.Huang &lt;skylake.huang@mediatek.com&gt;
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<pre>
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 &amp; mt7629.

1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.

Signed-off-by: SkyLake.Huang &lt;skylake.huang@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: add spi controller support for MediaTek MT7620 SoC</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:36:42+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=2db6fba0510e8b1694c7e9755840b751694f8983'/>
<id>2db6fba0510e8b1694c7e9755840b751694f8983</id>
<content type='text'>
This patch adds spi controller support for MediaTek MT7620 SoC.

The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
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<pre>
This patch adds spi controller support for MediaTek MT7620 SoC.

The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: ca_sflash: Add CAxxxx SPI Flash Controller</title>
<updated>2020-12-18T10:46:37+00:00</updated>
<author>
<name>Pengpeng Chen</name>
<email>pengpeng.chen@cortina-access.com</email>
</author>
<published>2020-07-30T19:52:45+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=24f279423295a93c36a7b28945e53c8ccadb0922'/>
<id>24f279423295a93c36a7b28945e53c8ccadb0922</id>
<content type='text'>
Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen &lt;pengpeng.chen@cortina-access.com&gt;
Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
CC: Vignesh R &lt;vigneshr@ti.com&gt;
CC: Tom Rini &lt;trini@konsulko.com&gt;
[jagan: rebase on master]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<pre>
Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen &lt;pengpeng.chen@cortina-access.com&gt;
Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
CC: Vignesh R &lt;vigneshr@ti.com&gt;
CC: Tom Rini &lt;trini@konsulko.com&gt;
[jagan: rebase on master]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Add Qualcomm QUP SPI controller driver</title>
<updated>2020-10-22T13:54:54+00:00</updated>
<author>
<name>Robert Marko</name>
<email>robert.marko@sartura.hr</email>
</author>
<published>2020-10-08T20:05:09+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=367ea426a51886f6815e520f8b75a010cfa1bdfb'/>
<id>367ea426a51886f6815e520f8b75a010cfa1bdfb</id>
<content type='text'>
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.

Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
Signed-off-by: Luka Kovacic &lt;luka.kovacic@sartura.hr&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
</content>
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<pre>
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.

Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
Signed-off-by: Luka Kovacic &lt;luka.kovacic@sartura.hr&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers</title>
<updated>2020-09-23T08:31:40+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2020-08-24T12:41:51+00:00</published>
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<id>54fdef242fdcda8792b7c05d687dc79a624fcc32</id>
<content type='text'>
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

This is follow up patch based on commit 664e16ce99a0 ("xilinx: kconfig:
Change Kconfig dependencies for Xilinx drivers").

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

This is follow up patch based on commit 664e16ce99a0 ("xilinx: kconfig:
Change Kconfig dependencies for Xilinx drivers").

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: spi: Add SPI controller driver for Octeon</title>
<updated>2020-08-03T19:14:48+00:00</updated>
<author>
<name>Suneel Garapati</name>
<email>sgarapati@marvell.com</email>
</author>
<published>2020-07-30T11:56:18+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=7853cc05984c60e616163c9b17c14d9a50300abe'/>
<id>7853cc05984c60e616163c9b17c14d9a50300abe</id>
<content type='text'>
Adds support for SPI controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams &lt;awilliams@marvell.com&gt;
Signed-off-by: Suneel Garapati &lt;sgarapati@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Aaron Williams &lt;awilliams@marvell.com&gt;
Cc: Chandrakala Chavva &lt;cchavva@marvell.com&gt;
Cc: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
Adds support for SPI controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams &lt;awilliams@marvell.com&gt;
Signed-off-by: Suneel Garapati &lt;sgarapati@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Aaron Williams &lt;awilliams@marvell.com&gt;
Cc: Chandrakala Chavva &lt;cchavva@marvell.com&gt;
Cc: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: fsl_qspi: Support to use full AHB space on i.MX</title>
<updated>2020-07-16T09:19:43+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2020-06-09T07:59:06+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=def88bce094e95939abf1e5d02a9b413b3627f6f'/>
<id>def88bce094e95939abf1e5d02a9b413b3627f6f</id>
<content type='text'>
i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.

Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.

When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Ashish Kumar &lt;Ashish.Kumar@nxp.com&gt;
Reviewed-by: Kuldeep Singh &lt;kuldeep.singh@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.

Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.

When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Ashish Kumar &lt;Ashish.Kumar@nxp.com&gt;
Reviewed-by: Kuldeep Singh &lt;kuldeep.singh@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: kirkwood: Drop nondm code</title>
<updated>2020-07-10T07:09:54+00:00</updated>
<author>
<name>Bhargav Shah</name>
<email>bhargavshah1988@gmail.com</email>
</author>
<published>2020-06-18T17:45:13+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=a58c7ffcad189bb05b36ac83116cfc562e400429'/>
<id>a58c7ffcad189bb05b36ac83116cfc562e400429</id>
<content type='text'>
Drop the nondm code from kirkwood_spi.c since there
is no board or any other code using for it.

Signed-off-by: Bhargav Shah &lt;bhargavshah1988@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<pre>
Drop the nondm code from kirkwood_spi.c since there
is no board or any other code using for it.

Signed-off-by: Bhargav Shah &lt;bhargavshah1988@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: omap3: Drop nondm code</title>
<updated>2020-07-09T15:28:06+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2020-05-27T12:56:36+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=5d1281296fc26144c57fd26ba4e2fb97419f437a'/>
<id>5d1281296fc26144c57fd26ba4e2fb97419f437a</id>
<content type='text'>
Now all boards are using this omap3 spi driver in
dm model, so drop the nondm code.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<pre>
Now all boards are using this omap3 spi driver in
dm model, so drop the nondm code.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: davinci: Drop non-dm code</title>
<updated>2020-06-11T09:44:04+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2020-05-26T08:04:26+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=807f0ff68a9afe9667745d18e647e5ef2231520f'/>
<id>807f0ff68a9afe9667745d18e647e5ef2231520f</id>
<content type='text'>
Now all boards which are using davinci SPI driver
have moved to SPL_DM so drop the unneeded non-dm code.

Cc: Adam Ford &lt;aford173@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt; #da850-evm
</content>
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<pre>
Now all boards which are using davinci SPI driver
have moved to SPL_DM so drop the unneeded non-dm code.

Cc: Adam Ford &lt;aford173@gmail.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt; #da850-evm
</pre>
</div>
</content>
</entry>
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