u-boot.git/drivers/mmc/Kconfig, branch master

DM: DM_MMC migration is now mandatory for non-SPL

2021-05-11T13:16:59+00:00

As it has been now two years past the migration deadline, it is required
to have migrated.  Remove the check from the Makefile and rework some of
the Kconfig logic slightly to get the functional dependencies of DM_MMC
/ BLK right in both the SPL and non-SPL case.

Signed-off-by: Tom Rini

mmc: octeontx_hsmmc: Add support for MIPS Octeon

2021-04-22T00:47:57+00:00

Until now, the Octeontx MMC driver did only support the ARM Octeon
TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform
to this driver. Here a short summary of the changes:

- Enable driver compilation for MIPS Octeon, including the MMC related
  header file
- Reorder header inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
  exist here

Signed-off-by: Stefan Roese 
Cc: Peng Fan 
Cc: Aaron Williams 
Cc: Chandrakala Chavva 
Cc: Daniel Schwierzeck

arm: Remove s32v234evb board

2021-04-10T12:01:00+00:00

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Eddy Petrișor 
Signed-off-by: Tom Rini

mmc: mvebu: convert to driver model

2021-04-08T06:50:52+00:00

This is a straightforward conversion of the old, non-dm driver. It was
done in-place as the deadline for non-dm MMC has passed. Previous
commits ensured that no board depends on the old, non-dm variant. Tested
on a Kirkwood based board with eMMC.

Signed-off-by: Harm Berntsen 
Tested-by: Harm Berntsen 
Reviewed-by: Simon Glass 
Reviewed-by: Stefan Roese 
CC: Pantelis Antoniou 
CC: Stefan Roese 
CC: Gerald Kerma 
CC: Simon Glass 
Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc: add pulse width detection workaround

2021-04-06T10:36:04+00:00

HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a
workaroung for the pulse width detection. Apply this workaround in
u-boot, too.

This will make HS400 mode work reliably on the LS1028A SoC.

Signed-off-by: Michael Walle 
Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc: add workaround for erratum A-011334

2021-04-06T10:35:55+00:00

LS1028A SoCs are restricted in what divider values are allowed for HS400
mode. This is basically a port from the corresponding linux driver.

Signed-off-by: Michael Walle

mmc: pci: Fix Kconfig dependency

2021-03-22T06:23:26+00:00

The PCI MMC driver depends on the generic MMC SDHCI driver,
otherwise it does not compile.

Signed-off-by: Bin Meng 
Reviewed-by: Jaehoon Chung

mmc: pwrseq: add mmc-pwrseq file to provide a generic interface

2021-02-19T07:10:41+00:00

Add mmc-pwrseq file to provide a generic interface.

Signed-off-by: Jaehoon Chung

mmc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes

2021-02-04T15:07:57+00:00

According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.

To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.

Use the sdhci writeb callback to implement this condition.

[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1

Signed-off-by: Faiz Abbas 
Signed-off-by: Aswath Govindraju 
Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc: add ADMA2 support

2020-10-14T06:00:44+00:00

Newer eSDHC controllers support ADMA2 descriptor tables which support
64bit DMA addresses. One notable user of addresses in the upper memory
segment is the EFI loader.

If support is enabled, but the controller doesn't support ADMA2, we
will fall back to SDMA (and thus 32 bit DMA addresses only).

Signed-off-by: Michael Walle