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<title>u-boot.git/drivers/misc/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>misc: make CONFIG_IRQ selectable for all platforms</title>
<updated>2021-04-20T11:31:12+00:00</updated>
<author>
<name>Wasim Khan</name>
<email>wasim.khan@nxp.com</email>
</author>
<published>2021-03-08T15:48:13+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=182c5f1efbec12419ef458db5565101647ff5911'/>
<id>182c5f1efbec12419ef458db5565101647ff5911</id>
<content type='text'>
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ
selectable for all platforms.

Signed-off-by: Wasim Khan &lt;wasim.khan@nxp.com&gt;
Tested-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ
selectable for all platforms.

Signed-off-by: Wasim Khan &lt;wasim.khan@nxp.com&gt;
Tested-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>qemu: add MMIO driver for QFW</title>
<updated>2021-04-12T21:45:40+00:00</updated>
<author>
<name>Asherah Connor</name>
<email>ashe@kivikakk.ee</email>
</author>
<published>2021-03-19T07:21:42+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=5830b57bf9aeed1b072a54faa7d74f6d62cac4c6'/>
<id>5830b57bf9aeed1b072a54faa7d74f6d62cac4c6</id>
<content type='text'>
Add MMIO driver for QFW.

Note that there is no consumer as of this patch.

Signed-off-by: Asherah Connor &lt;ashe@kivikakk.ee&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
Add MMIO driver for QFW.

Note that there is no consumer as of this patch.

Signed-off-by: Asherah Connor &lt;ashe@kivikakk.ee&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: qemu: move QFW to its own uclass</title>
<updated>2021-04-12T21:44:55+00:00</updated>
<author>
<name>Asherah Connor</name>
<email>ashe@kivikakk.ee</email>
</author>
<published>2021-03-19T07:21:40+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=5b0b43e0e25dbeed62a2155e7f3be562b9ceb9bd'/>
<id>5b0b43e0e25dbeed62a2155e7f3be562b9ceb9bd</id>
<content type='text'>
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass.  The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).

include/qfw.h is cleaned up and documentation added.

Signed-off-by: Asherah Connor &lt;ashe@kivikakk.ee&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass.  The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).

include/qfw.h is cleaned up and documentation added.

Signed-off-by: Asherah Connor &lt;ashe@kivikakk.ee&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>test: Move some test drivers into their own file</title>
<updated>2021-01-05T19:24:40+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-23T15:11:18+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=079ac59586fa1e0c69020e74e4f16cbfdf82232d'/>
<id>079ac59586fa1e0c69020e74e4f16cbfdf82232d</id>
<content type='text'>
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.

A few adjustments are needed so this driver can build for sandbox_spl as
well.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.

A few adjustments are needed so this driver can build for sandbox_spl as
well.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board Kconfig</title>
<updated>2020-10-27T07:13:32+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2020-10-14T15:08:14+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=83594f3c01c1afb765f8e2b08feea10f24c01d7f'/>
<id>83594f3c01c1afb765f8e2b08feea10f24c01d7f</id>
<content type='text'>
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge</title>
<updated>2020-07-17T06:32:24+00:00</updated>
<author>
<name>Wolfgang Wallner</name>
<email>wolfgang.wallner@br-automation.com</email>
</author>
<published>2020-07-01T11:37:23+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=d872e7da7a7e5c7199fa59506e08524277621649'/>
<id>d872e7da7a7e5c7199fa59506e08524277621649</id>
<content type='text'>
In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
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<pre>
In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner &lt;wolfgang.wallner@br-automation.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: add driver for the SiFive otp controller</title>
<updated>2020-06-04T01:44:08+00:00</updated>
<author>
<name>Pragnesh Patel</name>
<email>pragnesh.patel@sifive.com</email>
</author>
<published>2020-05-29T06:03:21+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=05307213c6aca1fdb300c8854c4b5881451b633d'/>
<id>05307213c6aca1fdb300c8854c4b5881451b633d</id>
<content type='text'>
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Tested-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<pre>
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Tested-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rename symbol: CONFIG_STM32 -&gt; CONFIG_ARCH_STM32</title>
<updated>2020-05-15T18:47:35+00:00</updated>
<author>
<name>Trevor Woerner</name>
<email>twoerner@gmail.com</email>
</author>
<published>2020-05-06T12:02:42+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=71f6354b0e3a098ddbddd7c59bbfda4c60c88381'/>
<id>71f6354b0e3a098ddbddd7c59bbfda4c60c88381</id>
<content type='text'>
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner &lt;twoerner@gmail.com&gt;
</content>
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<pre>
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner &lt;twoerner@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: pmic_esm: Add support for PMIC ESM driver</title>
<updated>2020-03-03T07:38:14+00:00</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2020-02-14T09:18:16+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=3b36b38f50cc3063f922db629f529b11ff92332b'/>
<id>3b36b38f50cc3063f922db629f529b11ff92332b</id>
<content type='text'>
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
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<pre>
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: k3_esm: Add support for Texas Instruments K3 ESM driver</title>
<updated>2020-03-03T07:38:14+00:00</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2020-02-14T09:18:15+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=344eb6d572adfadb0a11196ef8cf6508f6c704df'/>
<id>344eb6d572adfadb0a11196ef8cf6508f6c704df</id>
<content type='text'>
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
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<pre>
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</pre>
</div>
</content>
</entry>
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