u-boot.git/drivers/i2c, branch v2011.06

I2C: Add driver for ST-Ericsson U8500 i2c

2011-06-01T17:22:47+00:00

Signed-off-by: John Rigby 
CC: Heiko Schocher

i2c, soft_i2c: deblock bus if switching to another i2c bus

2011-04-28T08:57:08+00:00

Deblock i2c bus when switching to another i2c bus, if using
i2c_set_bus_num().

Signed-off-by: Heiko Schocher 
cc: Wolfgang Denk 
cc: Detlev Zundel 
cc: Valentin Longchamp 
cc: Holger Brunck 
Signed-off-by: Valentin Longchamp

Replace obsolete e-mail address

2011-04-27T17:38:09+00:00

Signed-off-by: Albert ARIBAUD

I2C: mv_i2c: add multi bus support

2011-04-27T17:38:08+00:00

Add the ability to support multiple i2c bus for mv_i2c

Acked-by: Heiko Schocher 
Acked-by: Prafulla Wadaskar 
Signed-off-by: Lei Wen

mv_i2c: use structure to replace the direclty define

2011-04-27T17:38:08+00:00

Add i2c_clk_enable in the cpu specific code, since previous platform it,
while new platform don't need. In the pantheon and armada100 platform,
this function is defined as NULL one.

Acked-by: Heiko Schocher 
Acked-by: Prafulla Wadaskar 
Signed-off-by: Lei Wen

mv_i2c: fix timeout value to be consistent with comments

2011-04-27T17:38:07+00:00

The original 10000 value would be 100ms, which is not
the comments said.

Acked-by: Heiko Schocher 
Acked-by: Prafulla Wadaskar 
Signed-off-by: Lei Wen

pxa: move i2c driver to the common place

2011-04-27T17:38:07+00:00

For better sharing with other platform other than pxa's,
it is more convenient to put the driver to the common place.

Acked-by: Heiko Schocher 
Acked-by: Prafulla Wadaskar 
Signed-off-by: Lei Wen

IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers

2011-04-27T17:38:05+00:00

As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.

Signed-off-by: Stefano Babic

I2C: OMAP: detect more devices when probing an i2c bus

2011-04-14T06:33:23+00:00

The omap24xx driver only seems to support devices that have a single subaddress
byte. With these types of devices, the first access in a bus transaction is
usually a write (writes the subaddress) followed by either a read or write to
access the devices registers.

Many such devices will respond to a read as the first access, but there are at
least some that will NACK such a read. (e.g. ADV7180.)

The probe function attempts to detect a devices ACK to a read access only and
fails to find devices that NACK a read.

This commit modifies the probe function to start a write instead. This detects
devices that respond to reads (since they must also respond to writes) as well
as those that only respond to writes. The bus is immediately set to idle after a
(N)ACK avoiding actually writing anything to the device.

Signed-off-by: Nick Thompson

I2C: mxc_i2c: address failure with mx35 processor

2011-02-01T23:54:43+00:00

There is sporadic failures when more as one I2C slave
is on the bus and the processor tries to communicate
with more as one slave.
The problem was seen on a mx35pdk (two I2C slaves,
PMIC controller and CAN/RTC chip).

The current driver uses the IIF bit in the status register
to check if the bus is busy or not. According to the manual,
this is not correct, because the IIB bit should be checked.
Not only, to check if a transfer is finished must be checked
the ICF bit, and this is not tested at all.

This patch comes from analyse with a corresponding driver
provided by Freescale as part of the LTIB tool. Comparing
the two drivers, it appears that the current u-boot driver checks
the wrong bits, and depending on race condition, the transfer
can be successful or not.

The patch gets rid also of own debug function (DPRINTF),
replaced with the general debug().

Tested on Freescale mx35pdk.

Signed-off-by: Stefano Babic 
CC: Heiko Schocher 
Acked-by: Heiko Schocher