u-boot.git/drivers/clk/meson, branch master Unnamed repository; edit this file 'description' to name the repository. clk: meson-g12a: add PCIe gates 2021-04-19T14:59:33+00:00 Neil Armstrong narmstrong@baylibre.com 2021-02-25T17:46:12+00:00 3034a1eda3ec3d718a4c26666c17f159747de62d Add missing gates used for PCIe. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
Add missing gates used for PCIe.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Merge tag 'u-boot-amlogic-20210112' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic 2021-01-13T12:32:02+00:00 Tom Rini trini@konsulko.com 2021-01-12T20:46:52+00:00 795f8fd0b591eef7cf3f8c6fcf9788280029cc4a - sync amlogic GX & AXG DT to Linux 5.10 - Add new MESON_EE driver support for GXBB & AXG - Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards - add driver for TDO tl070wsh30 panel driver - meson: isolate loading of socinfo - Add soc_rev to environment - Enable G12A support for saradc - Add correct mmcdev on VIM3(L) & Odroid-N2(C4) - Read MAC from fuses for VIM3 & VIM3L boards 
- sync amlogic GX & AXG DT to Linux 5.10
- Add new MESON_EE driver support for GXBB & AXG
- Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards
- add driver for TDO tl070wsh30 panel driver
- meson: isolate loading of socinfo
- Add soc_rev to environment
- Enable G12A support for saradc
- Add correct mmcdev on VIM3(L) & Odroid-N2(C4)
- Read MAC from fuses for VIM3 & VIM3L boards
clk: meson: add minimal driver for g12a-ao clocks 2021-01-11T13:59:54+00:00 Marek Szyprowski m.szyprowski@samsung.com 2020-12-16T07:51:53+00:00 86eede9fcebf8918ddc6da98e7250abca50472b5 Add minimal driver AO clocks on meson G12A family. Only ADC related clocks are supported. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
Add minimal driver AO clocks on meson G12A family. Only ADC related clocks
are supported.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
dm: core: Access device ofnode through functions 2021-01-05T19:24:41+00:00 Simon Glass sjg@chromium.org 2020-12-19T17:40:14+00:00 f10643cf8a4ca006d1ad194e930cd292fd869d17 At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org> 
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
dm: treewide: Rename auto_alloc_size members to be shorter 2020-12-13T15:00:25+00:00 Simon Glass sjg@chromium.org 2020-12-03T23:55:17+00:00 41575d8e4c334df148c4cdd7c40cc825dc0fcaa1 This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> 
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
common: Drop linux/bitops.h from common header 2020-05-19T01:19:23+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:13+00:00 cd93d625fd751d55c729c78b10f82109d56a5f1d Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
common: Drop linux/delay.h from common header 2020-05-19T01:19:23+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:11+00:00 c05ed00afb95fa5237f16962fccf5810437317bf Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
common: Drop log.h from common header 2020-05-19T01:19:18+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:05+00:00 f7ae49fc4f363a803dab3be078e93ead8e75a8e9 Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
clk: meson: g12a: add missing SD_EMMC_A controller gates 2020-04-28T08:23:10+00:00 Neil Armstrong narmstrong@baylibre.com 2020-04-20T13:46:30+00:00 75dcc2d484b3174547e13fa4d3cb7f557b5a0b37 Add missing SD_EMMC_A controller gates needed for probe of the A controller, otherwise leading to a freeze of the SoC after b3d69aa596. Fixes: b3d69aa596 ("clk: meson: reset mmc clock on probe") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
Add missing SD_EMMC_A controller gates needed for probe of the A
controller, otherwise leading to a freeze of the SoC after b3d69aa596.

Fixes: b3d69aa596 ("clk: meson: reset mmc clock on probe")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
clk: meson: reset mmc clock on probe 2020-04-06T07:56:35+00:00 Jerome Brunet jbrunet@baylibre.com 2020-03-05T11:12:37+00:00 b3d69aa596599c7c940f7ad463c04b693589ff9a On some SoCs, depending on the boot device, the MMC clock block may be left in a weird state by the ROM code, in which no decent clock may be provided. Reset the related register to make sure a sane MMC clock is ready for the controller. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
On some SoCs, depending on the boot device, the MMC clock block may be
left in a weird state by the ROM code, in which no decent clock may be
provided. Reset the related register to make sure a sane MMC clock is
ready for the controller.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>