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<title>u-boot.git/doc/README.p2041rdb, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>doc: cleanup - move board READMEs into respective board directories</title>
<updated>2012-07-29T13:42:02+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2012-04-29T23:57:39+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=702e6014f15b307f144fa03ecaf83a8446c6802a'/>
<id>702e6014f15b307f144fa03ecaf83a8446c6802a</id>
<content type='text'>
Also drop a few files referring to no longer / not yet supported
boards.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Prafulla Wadaskar &lt;prafulla@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Cc: Andy Fleming &lt;afleming@gmail.com&gt;
Cc: Jason Jin &lt;jason.jin@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
Acked-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
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<pre>
Also drop a few files referring to no longer / not yet supported
boards.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Prafulla Wadaskar &lt;prafulla@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Cc: Andy Fleming &lt;afleming@gmail.com&gt;
Cc: Jason Jin &lt;jason.jin@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
Acked-by: Daniel Schwierzeck &lt;daniel.schwierzeck@googlemail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>powerpc/p2041rdb: Add p2041rdb board support</title>
<updated>2011-07-17T16:03:36+00:00</updated>
<author>
<name>Mingkai Hu</name>
<email>Mingkai.hu@freescale.com</email>
</author>
<published>2011-07-07T04:29:15+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=4f1d1b7d1e647b4e0ffd9b9feedd02110d078bdb'/>
<id>4f1d1b7d1e647b4e0ffd9b9feedd02110d078bdb</id>
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P2041RDB Specification:
-----------------------
Memory subsystem:
 * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 256 Kbit M24256 I2C EEPROM
 * 16 Mbyte SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
 * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)

PCIe:
 * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors

USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces

I2C:
 * I2C1: Real time clock, Temperature sensor, Memory module
 * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu &lt;Mingkai.hu@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
P2041RDB Specification:
-----------------------
Memory subsystem:
 * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 256 Kbit M24256 I2C EEPROM
 * 16 Mbyte SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
 * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)

PCIe:
 * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors

USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces

I2C:
 * I2C1: Real time clock, Temperature sensor, Memory module
 * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu &lt;Mingkai.hu@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
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