u-boot.git/cpu/mpc85xx, branch v2009.06 Unnamed repository; edit this file 'description' to name the repository. 85xx: Use print_size to report amount of memory not mapped by TLBs 2009-06-12T14:15:48+00:00 Kumar Gala galak@kernel.crashing.org 2009-06-12T04:40:34+00:00 d4b130dc80761b430dc5b410159cd158fca1a348 Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
85xx: bugfix for reading maximum TLB size on mpc85xx 2009-06-09T20:58:18+00:00 Fredrik Arnerup fredrik.arnerup@edgeware.tv 2009-06-02T21:27:10+00:00 90d13b8ac3d515349626d7c8a3dc34ef38c43fa6 The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits. This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum (256 MB) which made u-boot hang in board_init_f() when trying to create a new stack in RAM. I have an mpc8540 with one 1GB dimm. Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> 
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.

Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
85xx: Introduce determine_mp_bootpg() helper. 2009-04-01T20:29:49+00:00 Kumar Gala galak@kernel.crashing.org 2009-04-01T04:11:05+00:00 c840d26c752141b94bbc24ac748ddd45752a955a Match determine_mp_bootpg() that was added for 86xx. We need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. Also added a comment about how cpu_reset() is dealing w/an errata on early 85xx MP HW. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Match determine_mp_bootpg() that was added for 86xx.  We need this to
address a bug introduced in v2009.03 with 86xx MP booting.  We have to
make sure to reserve the region of memory used for the MP bootpg() so
other u-boot code doesn't use it.

Also added a comment about how cpu_reset() is dealing w/an errata on
early 85xx MP HW.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC85xx: Add MPC8569 CPU support 2009-03-30T18:33:51+00:00 Haiying Wang Haiying.Wang@freescale.com 2009-03-27T21:02:44+00:00 22b6dbc1696d927d938dd4e16f65d83c0d4fb3f4 There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
85xx: Add support for additional e500mc features 2009-03-30T18:33:50+00:00 Kumar Gala galak@kernel.crashing.org 2009-03-19T14:16:10+00:00 1b3e4044a28a3d95b0aad41bdc52482bb2cc9b2b * Enable backside L2 * e500mc no longer has timebase enable in HID (moved to CCSR register) Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
* Enable backside L2
* e500mc no longer has timebase enable in HID (moved to CCSR register)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30T18:33:50+00:00 Dave Liu daveliu@freescale.com 2009-03-14T04:48:30+00:00 c360ceac0286159f94d9d1a9496fc9858c8d9bec - support mirrored DIMMs, not support register DIMMs - test passed on P2020DS board with MT9JSF12872AY-1G1D1 - test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1 Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com> 
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Fix mpc85xx ddr-gen3 ddr_sdram_cfg. 2009-03-09T22:46:09+00:00 Ed Swarthout Ed.Swarthout@freescale.com 2009-02-24T08:37:59+00:00 0ee84b88b78bce425190d8cd7adf4c30cba0c2f0 Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> 
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Coding style cleanup, update CHANGELOG 2009-02-18T23:41:08+00:00 Wolfgang Denk wd@denx.de 2009-02-18T23:41:08+00:00 1bba30efe1717bea13026e15c7c7d906419fac69 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
85xx: Add eSDHC support for 8536 DS 2009-02-17T00:07:43+00:00 Andy Fleming afleming@freescale.com 2008-10-30T21:51:33+00:00 80522dc8369a89938369fbcee572e662373bc9a3 Signed-off-by: Andy Fleming <afleming@freescale.com> 
Signed-off-by: Andy Fleming <afleming@freescale.com>
32bit BUg fix for DDR2 on 8572 2009-02-17T00:06:03+00:00 Poonam_Aggrwal-b10812 b10812@freescale.com 2009-01-04T03:16:38+00:00 e1be0d25ecf494ae81245ca438738ba839d6329b This errata fix is required for 32 bit DDR2 controller on 8572. May also be required for P10XX20XX platforms Signed-off-by: Poonam_Agarwal-b10812 <b10812@lc1106.zin33.ap.freescale.net> 
This errata fix is required for 32 bit DDR2 controller on 8572.
May  also be required for P10XX20XX platforms

Signed-off-by: Poonam_Agarwal-b10812 <b10812@lc1106.zin33.ap.freescale.net>