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<title>u-boot.git/cpu/mpc85xx/cpu.c, branch v2009.06</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>MPC85xx: Add MPC8569 CPU support</title>
<updated>2009-03-30T18:33:51+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2009-03-27T21:02:44+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=22b6dbc1696d927d938dd4e16f65d83c0d4fb3f4'/>
<id>22b6dbc1696d927d938dd4e16f65d83c0d4fb3f4</id>
<content type='text'>
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Coding style cleanup, update CHANGELOG</title>
<updated>2009-02-18T23:41:08+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-02-18T23:41:08+00:00</published>
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<id>1bba30efe1717bea13026e15c7c7d906419fac69</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Add eSDHC support for 8536 DS</title>
<updated>2009-02-17T00:07:43+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-10-30T21:51:33+00:00</published>
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<id>80522dc8369a89938369fbcee572e662373bc9a3</id>
<content type='text'>
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc85xx: Add support for the P2020</title>
<updated>2009-02-17T00:05:55+00:00</updated>
<author>
<name>Srikanth Srinivasan</name>
<email>srikanth.srinivasan@freescale.com</email>
</author>
<published>2009-01-21T23:17:33+00:00</published>
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<id>8d949aff38cfb4388cbd73876e77bcd06d601f20</id>
<content type='text'>
Added various p2020 processor specific details:
* SVR for p2020, p2020E
* immap updates for LAWs and DDR on p2020
* LAW defines related to p2020

Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Travis Wheatley &lt;Travis.Wheatley@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Added various p2020 processor specific details:
* SVR for p2020, p2020E
* immap updates for LAWs and DDR on p2020
* LAW defines related to p2020

Signed-off-by: Srikanth Srinivasan &lt;srikanth.srinivasan@freescale.com&gt;
Signed-off-by: Travis Wheatley &lt;Travis.Wheatley@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Format cpu freq printing to handle 8 cores</title>
<updated>2009-02-17T00:05:50+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-02-04T15:35:57+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=b29dee3c906e9daaf6baf7772d2e15e26b8636b8'/>
<id>b29dee3c906e9daaf6baf7772d2e15e26b8636b8</id>
<content type='text'>
Only print 4 cpu freq per line.  This way when we have 8 cores its a
bit more readable.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Only print 4 cpu freq per line.  This way when we have 8 cores its a
bit more readable.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add secondary CPUs processor frequency for e500 core</title>
<updated>2009-01-23T23:03:14+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2009-01-15T16:58:35+00:00</published>
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<id>2fc7eb0cfc608c9369001d57a0411af5e6a58f7c</id>
<content type='text'>
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
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<pre>
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.

Signed-off-by: James Yang &lt;James.Yang@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8[56]xx: Put localbus clock in sysinfo and gd</title>
<updated>2008-12-20T00:32:49+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:37+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28'/>
<id>ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28</id>
<content type='text'>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
<content type='xhtml'>
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<pre>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8568: Double local bus clock divider</title>
<updated>2008-12-20T00:32:48+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:35+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=446c381e3e16f19857b72ea0d06241267b8b9d58'/>
<id>446c381e3e16f19857b72ea0d06241267b8b9d58</id>
<content type='text'>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.

Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
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<pre>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.

Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc8xxx: LCRR[CLKDIV] is sometimes five bits</title>
<updated>2008-12-20T00:20:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:34+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=a5d212a263c58cc746481bf1fc878510533ce7d6'/>
<id>a5d212a263c58cc746481bf1fc878510533ce7d6</id>
<content type='text'>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
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<pre>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Moved initialization of QE Ethernet controller to cpu_eth_init()</title>
<updated>2008-11-10T05:38:03+00:00</updated>
<author>
<name>Ben Warren</name>
<email>biggerbadderben@gmail.com</email>
</author>
<published>2008-10-23T06:32:48+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=0e8454e990385a58f708c2fc26d31ac041c7a6c5'/>
<id>0e8454e990385a58f708c2fc26d31ac041c7a6c5</id>
<content type='text'>
Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
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<pre>
Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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