u-boot.git/cpu/at32ap/cache.c, branch v2009.06 Unnamed repository; edit this file 'description' to name the repository. AVR32: Make cacheflush cpu-dependent 2009-02-23T09:34:23+00:00 Olav Morken olavmrk@gmail.com 2009-01-23T11:56:27+00:00 d8f2aa3298610b44127dbc4796d8038aa5847e0b The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> 
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
rename CFG_ macros to CONFIG_SYS 2008-10-18T19:54:03+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-10-16T13:01:15+00:00 6d0f6bcf337c5261c08fabe12982178c2c489d76 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add AT32AP CPU and AT32AP7000 SoC support 2006-10-24T12:27:35+00:00 Wolfgang Denk wd@pollux.denx.de 2006-10-24T12:27:35+00:00 72a087e04705c26cad982879ebd06b5281bf825a Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 
Patch by Haavard Skinnemoen, 06 Sep 2006

This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.

The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>