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<title>u-boot.git/cmd/riscv, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/'/>
<entry>
<title>cmd/exception: support ebreak exception on RISC-V</title>
<updated>2021-05-05T08:13:12+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2021-04-09T10:48:14+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=91e4b7516d84cefab7324765b3c8d6a909185ce2'/>
<id>91e4b7516d84cefab7324765b3c8d6a909185ce2</id>
<content type='text'>
The ebreak instruction should generate a breakpoint exception.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
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<pre>
The ebreak instruction should generate a breakpoint exception.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd/riscv/sbi: support System Reset Extension</title>
<updated>2021-02-25T10:06:08+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2021-01-17T21:27:13+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=921d5477b971693892025a3b76feb3628a078b50'/>
<id>921d5477b971693892025a3b76feb3628a078b50</id>
<content type='text'>
Let the sbi command detect the 'System Reset Extension'
(EID #0x53525354 "SRST").

Cf. https://github.com/riscv/riscv-sbi-doc

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Reviewed-by: Leo Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Let the sbi command detect the 'System Reset Extension'
(EID #0x53525354 "SRST").

Cf. https://github.com/riscv/riscv-sbi-doc

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Reviewed-by: Leo Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: add more implementation IDs to sbi command</title>
<updated>2021-01-29T15:36:49+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2021-01-19T19:44:45+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=7fd892b21530a60753c48db22f64e3415216faf6'/>
<id>7fd892b21530a60753c48db22f64e3415216faf6</id>
<content type='text'>
Additional SBI implementation IDs have been added to the upcoming
next version of the SBI specification.

https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Additional SBI implementation IDs have been added to the upcoming
next version of the SBI specification.

https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: provide command sbi</title>
<updated>2020-08-25T01:34:47+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-08-20T17:43:39+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=c92b50a44b95e706b9c0c97544bd7504fe6d36e9'/>
<id>c92b50a44b95e706b9c0c97544bd7504fe6d36e9</id>
<content type='text'>
Provide a command to display information about the SBI implementation.

The output might look like:

=&gt; sbi
SBI 0.2
OpenSBI
Extensions:
  sbi_set_timer
  sbi_console_putchar
  sbi_console_getchar
  sbi_clear_ipi
  sbi_send_ipi
  sbi_remote_fence_i
  sbi_remote_sfence_vma
  sbi_remote_sfence_vma_asid
  sbi_shutdown
  SBI Base Functionality
  Timer Extension
  IPI Extension
  RFENCE Extension
  Hart State Management Extension

The command can be used to construct a unit test checking that the
communication with the SEE is working.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Tested-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Tested-by:  Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
Tested-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide a command to display information about the SBI implementation.

The output might look like:

=&gt; sbi
SBI 0.2
OpenSBI
Extensions:
  sbi_set_timer
  sbi_console_putchar
  sbi_console_getchar
  sbi_clear_ipi
  sbi_send_ipi
  sbi_remote_fence_i
  sbi_remote_sfence_vma
  sbi_remote_sfence_vma_asid
  sbi_shutdown
  SBI Base Functionality
  Timer Extension
  IPI Extension
  RFENCE Extension
  Hart State Management Extension

The command can be used to construct a unit test checking that the
communication with the SEE is working.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Tested-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Tested-by:  Pragnesh Patel &lt;pragnesh.patel@openfive.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
Tested-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: exception: unaligned data access on RISC-V</title>
<updated>2020-08-14T06:39:34+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-08-06T10:34:59+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=db3585d181221dd025fcdece9d56b02da63cfe96'/>
<id>db3585d181221dd025fcdece9d56b02da63cfe96</id>
<content type='text'>
The command 'exception' can be used to test the handling of exceptions.

Currently the exception command only allows to create an illegal
instruction exception on RISC-V.

Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.

Adjust the online help for 'exception undefined'.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The command 'exception' can be used to test the handling of exceptions.

Currently the exception command only allows to create an illegal
instruction exception on RISC-V.

Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.

Adjust the online help for 'exception undefined'.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>command: Remove the cmd_tbl_t typedef</title>
<updated>2020-05-18T22:36:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:40:03+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=09140113108541b95d340f3c7b6ee597d31ccc73'/>
<id>09140113108541b95d340f3c7b6ee597d31ccc73</id>
<content type='text'>
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: add exception command</title>
<updated>2019-04-22T16:06:39+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2018-12-26T16:20:35+00:00</published>
<link rel='alternate' type='text/html' href='https://fedorapeople.org/cgit/ausil/public_git/u-boot.git/commit/?id=dab8788a8cadaa18a44001f98fa959fc672fff4f'/>
<id>dab8788a8cadaa18a44001f98fa959fc672fff4f</id>
<content type='text'>
The 'exception' command allows to test exception handling.

This implementation supports ARM, x86, RISC-V and the following exceptions:
* 'breakpoint' - prefetch abort exception (ARM 32bit only)
* 'unaligned'  - data abort exception (ARM only)
* 'undefined'  - undefined instruction exception

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 'exception' command allows to test exception handling.

This implementation supports ARM, x86, RISC-V and the following exceptions:
* 'breakpoint' - prefetch abort exception (ARM 32bit only)
* 'unaligned'  - data abort exception (ARM only)
* 'undefined'  - undefined instruction exception

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</pre>
</div>
</content>
</entry>
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