u-boot.git/arch/mips, branch v2011.06

MIPS: Move timer code to arch/mips/cpu/$(CPU)/

2011-05-09T15:12:31+00:00

Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi

MIPS: Introduce --gc-sections for MIPS

2011-05-09T15:08:10+00:00

All architectures but MIPS are using --gc-sections on final linking.
This patch introduces that feature for MIPS to reduce the memory and
flash footprint.

Signed-off-by: Daniel Schwierzeck 
Cc: Wolfgang Denk 
Cc: Stefan Roese 
Cc: Thomas Lange 
Cc: Vlad Lungu 
Signed-off-by: Shinya Kuribayashi

MIPS: Coding style cleanups on common assembly files

2011-05-06T15:18:13+00:00

Fix style issues and alignments globally.  No logical changes.
- Replace C comments with AS line comments where possible
- Use ifndef where possible, rather than if !defined for simplicity
- An instruction executed in a delay slot is now indicated by a leading
  space, not by C comment

Signed-off-by: Shinya Kuribayashi

MIPS: Remove mips_cache_lock() feature

2011-05-06T15:18:13+00:00

As requested in commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd ([MIPS]
Request for the 'mips_cache_lock()' removal), such feature is no longer
needed for current MIPS implementation of U-Boot, and no one in the tree
uses it for years.

Signed-off-by: Shinya Kuribayashi

Make STANDALONE_LOAD_ADDR configurable per board

2011-04-12T20:58:32+00:00

Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.

Signed-off-by: Wolfgang Denk 
Cc: Mike Frysinger 
Cc: Shinya Kuribayashi 
Cc: Daniel Hellstrom 
Cc: Tsi Chung Liew 
Cc: Nobuhiro Iwamatsu

MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory

2011-04-02T13:07:12+00:00

Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck 
Cc: Thomas Lange 
Signed-off-by: Shinya Kuribayashi

MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory

2011-04-02T13:07:12+00:00

IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck 
Cc: Wolfgang Denk 
Signed-off-by: Shinya Kuribayashi

MIPS: Optimize the setup of CPU optimization flags

2011-04-02T13:07:12+00:00

The current MIPS CPU config.mk code always expects a MIPS 4kc
core. This is not appropiate for other CPUs and SoCs.

Replace the current MIPSFLAGS code by cc-option macro and use
-march=mips32r2 as default optimization level for all MIPS32 CPUs.

Note: Since commit f62fb99941c625605aa16a0097b396a5c16d2c88 all
toolchains with binutils prior to v2.16 are not working anymore.
As agreed with Shinya Kuribayashi the support for those toolchains
will be dropped officially with this patch.

Signed-off-by: Daniel Schwierzeck 
Cc: Wolfgang Denk 
Signed-off-by: Shinya Kuribayashi

MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32

2011-04-02T13:07:12+00:00

All current CPUs and SoCs are based on MIPS32 arch. The complete
code resides in the global arch/mips/cpu directory. This is not
suitable if other MIPS architectures like MIPS64 or Octeon should
be supported in the future.

To achieve this the current CPU code is moved to its own mips32
subdirectory. All MIPS32 boards have to use mips32 as config switch
in board.cfg.

Signed-off-by: Daniel Schwierzeck 
Cc: Wolfgang Denk 
Cc: Stefan Roese 
Cc: Thomas Lange 
Cc: Vlad Lungu 
Signed-off-by: Shinya Kuribayashi

MIPS: Purple: Remove Purple support

2011-04-02T13:07:12+00:00

The Purple SoC and eval board are not actively maintained since years.
This patch removes the support completely as aggreed with Wolfgang Denk.

Signed-off-by: Daniel Schwierzeck 
Cc: Wolfgang Denk 
Signed-off-by: Shinya Kuribayashi