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-rw-r--r--Documentation/devicetree/bindings/x86/ce4100.txt38
-rw-r--r--Documentation/devicetree/bindings/x86/interrupt.txt26
-rw-r--r--Documentation/devicetree/bindings/x86/timer.txt6
3 files changed, 0 insertions, 70 deletions
diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt b/Documentation/devicetree/bindings/x86/ce4100.txt
deleted file mode 100644
index b49ae593a60..00000000000
--- a/Documentation/devicetree/bindings/x86/ce4100.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-CE4100 Device Tree Bindings
----------------------------
-
-The CE4100 SoC uses for in core peripherals the following compatible
-format: <vendor>,<chip>-<device>.
-Many of the "generic" devices like HPET or IO APIC have the ce4100
-name in their compatible property because they first appeared in this
-SoC.
-
-The CPU node
-------------
- cpu@0 {
- device_type = "cpu";
- compatible = "intel,ce4100";
- reg = <0>;
- lapic = <&lapic0>;
- };
-
-The reg property describes the CPU number. The lapic property points to
-the local APIC timer.
-
-The SoC node
-------------
-
-This node describes the in-core peripherals. Required property:
- compatible = "intel,ce4100-cp";
-
-The PCI node
-------------
-This node describes the PCI bus on the SoC. Its property should be
- compatible = "intel,ce4100-pci", "pci";
-
-If the OS is using the IO-APIC for interrupt routing then the reported
-interrupt numbers for devices is no longer true. In order to obtain the
-correct interrupt number, the child node which represents the device has
-to contain the interrupt property. Besides the interrupt property it has
-to contain at least the reg property containing the PCI bus address and
-compatible property according to "PCI Bus Binding Revision 2.1".
diff --git a/Documentation/devicetree/bindings/x86/interrupt.txt b/Documentation/devicetree/bindings/x86/interrupt.txt
deleted file mode 100644
index 7d19f494f19..00000000000
--- a/Documentation/devicetree/bindings/x86/interrupt.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-Interrupt chips
----------------
-
-* Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
-
- Required properties:
- --------------------
- compatible = "intel,ce4100-ioapic";
- #interrupt-cells = <2>;
-
- Device's interrupt property:
-
- interrupts = <P S>;
-
- The first number (P) represents the interrupt pin which is wired to the
- IO APIC. The second number (S) represents the sense of interrupt which
- should be configured and can be one of:
- 0 - Edge Rising
- 1 - Level Low
- 2 - Level High
- 3 - Edge Falling
-
-* Local APIC
- Required property:
-
- compatible = "intel,ce4100-lapic";
diff --git a/Documentation/devicetree/bindings/x86/timer.txt b/Documentation/devicetree/bindings/x86/timer.txt
deleted file mode 100644
index c688af58e3b..00000000000
--- a/Documentation/devicetree/bindings/x86/timer.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Timers
-------
-
-* High Precision Event Timer (HPET)
- Required property:
- compatible = "intel,ce4100-hpet";