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authorAnton Arapov <anton@redhat.com>2012-04-16 10:05:28 +0200
committerAnton Arapov <anton@redhat.com>2012-04-16 10:05:28 +0200
commitb4b6116a13633898cf868f2f103c96a90c4c20f8 (patch)
tree93d1b7e2cfcdf473d8d4ff3ad141fa864f8491f6 /arch/mn10300
parentedd4be777c953e5faafc80d091d3084b4343f5d3 (diff)
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fedora kernel: d9aad82f3319f3cfd1aebc01234254ef0c37ad84v3.3.2-1
Signed-off-by: Anton Arapov <anton@redhat.com>
Diffstat (limited to 'arch/mn10300')
-rw-r--r--arch/mn10300/Kconfig495
-rw-r--r--arch/mn10300/Kconfig.debug159
-rw-r--r--arch/mn10300/Makefile107
-rw-r--r--arch/mn10300/boot/Makefile28
-rw-r--r--arch/mn10300/boot/compressed/Makefile22
-rw-r--r--arch/mn10300/boot/compressed/head.S151
-rw-r--r--arch/mn10300/boot/compressed/misc.c393
-rw-r--r--arch/mn10300/boot/compressed/misc.h18
-rw-r--r--arch/mn10300/boot/compressed/vmlinux.lds9
-rw-r--r--arch/mn10300/boot/install.sh67
-rw-r--r--arch/mn10300/boot/tools/build.c190
-rw-r--r--arch/mn10300/configs/asb2303_defconfig73
-rw-r--r--arch/mn10300/configs/asb2364_defconfig97
-rw-r--r--arch/mn10300/include/asm/Kbuild1
-rw-r--r--arch/mn10300/include/asm/asm-offsets.h1
-rw-r--r--arch/mn10300/include/asm/atomic.h348
-rw-r--r--arch/mn10300/include/asm/auxvec.h4
-rw-r--r--arch/mn10300/include/asm/bitops.h234
-rw-r--r--arch/mn10300/include/asm/bitsperlong.h1
-rw-r--r--arch/mn10300/include/asm/bug.h37
-rw-r--r--arch/mn10300/include/asm/bugs.h20
-rw-r--r--arch/mn10300/include/asm/busctl-regs.h151
-rw-r--r--arch/mn10300/include/asm/byteorder.h6
-rw-r--r--arch/mn10300/include/asm/cache.h60
-rw-r--r--arch/mn10300/include/asm/cacheflush.h171
-rw-r--r--arch/mn10300/include/asm/checksum.h86
-rw-r--r--arch/mn10300/include/asm/cpu-regs.h353
-rw-r--r--arch/mn10300/include/asm/cputime.h1
-rw-r--r--arch/mn10300/include/asm/current.h37
-rw-r--r--arch/mn10300/include/asm/debugger.h43
-rw-r--r--arch/mn10300/include/asm/delay.h19
-rw-r--r--arch/mn10300/include/asm/device.h1
-rw-r--r--arch/mn10300/include/asm/div64.h115
-rw-r--r--arch/mn10300/include/asm/dma-mapping.h171
-rw-r--r--arch/mn10300/include/asm/dma.h118
-rw-r--r--arch/mn10300/include/asm/dmactl-regs.h16
-rw-r--r--arch/mn10300/include/asm/elf.h157
-rw-r--r--arch/mn10300/include/asm/emergency-restart.h1
-rw-r--r--arch/mn10300/include/asm/errno.h1
-rw-r--r--arch/mn10300/include/asm/exceptions.h121
-rw-r--r--arch/mn10300/include/asm/fb.h23
-rw-r--r--arch/mn10300/include/asm/fcntl.h1
-rw-r--r--arch/mn10300/include/asm/fpu.h134
-rw-r--r--arch/mn10300/include/asm/frame.inc97
-rw-r--r--arch/mn10300/include/asm/ftrace.h1
-rw-r--r--arch/mn10300/include/asm/futex.h1
-rw-r--r--arch/mn10300/include/asm/gdb-stub.h182
-rw-r--r--arch/mn10300/include/asm/hardirq.h49
-rw-r--r--arch/mn10300/include/asm/highmem.h128
-rw-r--r--arch/mn10300/include/asm/hw_irq.h14
-rw-r--r--arch/mn10300/include/asm/intctl-regs.h71
-rw-r--r--arch/mn10300/include/asm/io.h313
-rw-r--r--arch/mn10300/include/asm/ioctl.h1
-rw-r--r--arch/mn10300/include/asm/ioctls.h6
-rw-r--r--arch/mn10300/include/asm/ipc.h1
-rw-r--r--arch/mn10300/include/asm/ipcbuf.h1
-rw-r--r--arch/mn10300/include/asm/irq.h40
-rw-r--r--arch/mn10300/include/asm/irq_regs.h28
-rw-r--r--arch/mn10300/include/asm/irqflags.h216
-rw-r--r--arch/mn10300/include/asm/kdebug.h22
-rw-r--r--arch/mn10300/include/asm/kgdb.h81
-rw-r--r--arch/mn10300/include/asm/kmap_types.h6
-rw-r--r--arch/mn10300/include/asm/kprobes.h50
-rw-r--r--arch/mn10300/include/asm/linkage.h20
-rw-r--r--arch/mn10300/include/asm/local.h1
-rw-r--r--arch/mn10300/include/asm/local64.h1
-rw-r--r--arch/mn10300/include/asm/mc146818rtc.h1
-rw-r--r--arch/mn10300/include/asm/mman.h6
-rw-r--r--arch/mn10300/include/asm/mmu.h19
-rw-r--r--arch/mn10300/include/asm/mmu_context.h161
-rw-r--r--arch/mn10300/include/asm/module.h27
-rw-r--r--arch/mn10300/include/asm/msgbuf.h31
-rw-r--r--arch/mn10300/include/asm/mutex.h16
-rw-r--r--arch/mn10300/include/asm/nmi.h14
-rw-r--r--arch/mn10300/include/asm/page.h128
-rw-r--r--arch/mn10300/include/asm/page_offset.h11
-rw-r--r--arch/mn10300/include/asm/param.h18
-rw-r--r--arch/mn10300/include/asm/pci.h122
-rw-r--r--arch/mn10300/include/asm/percpu.h1
-rw-r--r--arch/mn10300/include/asm/pgalloc.h55
-rw-r--r--arch/mn10300/include/asm/pgtable.h506
-rw-r--r--arch/mn10300/include/asm/pio-regs.h233
-rw-r--r--arch/mn10300/include/asm/poll.h1
-rw-r--r--arch/mn10300/include/asm/posix_types.h137
-rw-r--r--arch/mn10300/include/asm/processor.h191
-rw-r--r--arch/mn10300/include/asm/ptrace.h98
-rw-r--r--arch/mn10300/include/asm/reset-regs.h64
-rw-r--r--arch/mn10300/include/asm/resource.h1
-rw-r--r--arch/mn10300/include/asm/rtc-regs.h86
-rw-r--r--arch/mn10300/include/asm/rtc.h30
-rw-r--r--arch/mn10300/include/asm/rwlock.h125
-rw-r--r--arch/mn10300/include/asm/scatterlist.h16
-rw-r--r--arch/mn10300/include/asm/sections.h1
-rw-r--r--arch/mn10300/include/asm/sembuf.h25
-rw-r--r--arch/mn10300/include/asm/serial-regs.h191
-rw-r--r--arch/mn10300/include/asm/serial.h36
-rw-r--r--arch/mn10300/include/asm/setup.h18
-rw-r--r--arch/mn10300/include/asm/shmbuf.h42
-rw-r--r--arch/mn10300/include/asm/shmparam.h6
-rw-r--r--arch/mn10300/include/asm/sigcontext.h52
-rw-r--r--arch/mn10300/include/asm/siginfo.h1
-rw-r--r--arch/mn10300/include/asm/signal.h171
-rw-r--r--arch/mn10300/include/asm/smp.h107
-rw-r--r--arch/mn10300/include/asm/smsc911x.h1
-rw-r--r--arch/mn10300/include/asm/socket.h68
-rw-r--r--arch/mn10300/include/asm/sockios.h13
-rw-r--r--arch/mn10300/include/asm/spinlock.h193
-rw-r--r--arch/mn10300/include/asm/spinlock_types.h20
-rw-r--r--arch/mn10300/include/asm/stat.h78
-rw-r--r--arch/mn10300/include/asm/statfs.h1
-rw-r--r--arch/mn10300/include/asm/string.h32
-rw-r--r--arch/mn10300/include/asm/swab.h42
-rw-r--r--arch/mn10300/include/asm/syscall.h117
-rw-r--r--arch/mn10300/include/asm/system.h102
-rw-r--r--arch/mn10300/include/asm/termbits.h201
-rw-r--r--arch/mn10300/include/asm/termios.h92
-rw-r--r--arch/mn10300/include/asm/thread_info.h182
-rw-r--r--arch/mn10300/include/asm/timer-regs.h452
-rw-r--r--arch/mn10300/include/asm/timex.h45
-rw-r--r--arch/mn10300/include/asm/tlb.h34
-rw-r--r--arch/mn10300/include/asm/tlbflush.h154
-rw-r--r--arch/mn10300/include/asm/topology.h1
-rw-r--r--arch/mn10300/include/asm/types.h25
-rw-r--r--arch/mn10300/include/asm/uaccess.h495
-rw-r--r--arch/mn10300/include/asm/ucontext.h22
-rw-r--r--arch/mn10300/include/asm/unaligned.h20
-rw-r--r--arch/mn10300/include/asm/unistd.h398
-rw-r--r--arch/mn10300/include/asm/user.h53
-rw-r--r--arch/mn10300/include/asm/vga.h17
-rw-r--r--arch/mn10300/include/asm/xor.h1
-rw-r--r--arch/mn10300/kernel/Makefile28
-rw-r--r--arch/mn10300/kernel/asm-offsets.c110
-rw-r--r--arch/mn10300/kernel/cevt-mn10300.c132
-rw-r--r--arch/mn10300/kernel/csrc-mn10300.c34
-rw-r--r--arch/mn10300/kernel/entry.S765
-rw-r--r--arch/mn10300/kernel/fpu-low.S258
-rw-r--r--arch/mn10300/kernel/fpu-nofpu-low.S39
-rw-r--r--arch/mn10300/kernel/fpu-nofpu.c30
-rw-r--r--arch/mn10300/kernel/fpu.c176
-rw-r--r--arch/mn10300/kernel/gdb-io-serial-low.S91
-rw-r--r--arch/mn10300/kernel/gdb-io-serial.c175
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm-low.S93
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm.c304
-rw-r--r--arch/mn10300/kernel/gdb-low.S115
-rw-r--r--arch/mn10300/kernel/gdb-stub.c1924
-rw-r--r--arch/mn10300/kernel/head.S450
-rw-r--r--arch/mn10300/kernel/init_task.c39
-rw-r--r--arch/mn10300/kernel/internal.h42
-rw-r--r--arch/mn10300/kernel/io.c30
-rw-r--r--arch/mn10300/kernel/irq.c401
-rw-r--r--arch/mn10300/kernel/kernel_execve.S37
-rw-r--r--arch/mn10300/kernel/kgdb.c502
-rw-r--r--arch/mn10300/kernel/kprobes.c656
-rw-r--r--arch/mn10300/kernel/kthread.S31
-rw-r--r--arch/mn10300/kernel/mn10300-debug.c58
-rw-r--r--arch/mn10300/kernel/mn10300-serial-low.S191
-rw-r--r--arch/mn10300/kernel/mn10300-serial.c1711
-rw-r--r--arch/mn10300/kernel/mn10300-serial.h126
-rw-r--r--arch/mn10300/kernel/mn10300-watchdog-low.S66
-rw-r--r--arch/mn10300/kernel/mn10300-watchdog.c206
-rw-r--r--arch/mn10300/kernel/mn10300_ksyms.c42
-rw-r--r--arch/mn10300/kernel/module.c156
-rw-r--r--arch/mn10300/kernel/process.c322
-rw-r--r--arch/mn10300/kernel/profile-low.S72
-rw-r--r--arch/mn10300/kernel/profile.c51
-rw-r--r--arch/mn10300/kernel/ptrace.c386
-rw-r--r--arch/mn10300/kernel/rtc.c132
-rw-r--r--arch/mn10300/kernel/setup.c299
-rw-r--r--arch/mn10300/kernel/sigframe.h33
-rw-r--r--arch/mn10300/kernel/signal.c581
-rw-r--r--arch/mn10300/kernel/smp-low.S97
-rw-r--r--arch/mn10300/kernel/smp.c1182
-rw-r--r--arch/mn10300/kernel/switch_to.S179
-rw-r--r--arch/mn10300/kernel/sys_mn10300.c33
-rw-r--r--arch/mn10300/kernel/time.c124
-rw-r--r--arch/mn10300/kernel/traps.c627
-rw-r--r--arch/mn10300/kernel/vmlinux.lds.S93
-rw-r--r--arch/mn10300/lib/Makefile7
-rw-r--r--arch/mn10300/lib/__ashldi3.S51
-rw-r--r--arch/mn10300/lib/__ashrdi3.S52
-rw-r--r--arch/mn10300/lib/__lshrdi3.S52
-rw-r--r--arch/mn10300/lib/__ucmpdi2.S43
-rw-r--r--arch/mn10300/lib/ashrdi3.c61
-rw-r--r--arch/mn10300/lib/bitops.c51
-rw-r--r--arch/mn10300/lib/checksum.c100
-rw-r--r--arch/mn10300/lib/delay.c51
-rw-r--r--arch/mn10300/lib/do_csum.S157
-rw-r--r--arch/mn10300/lib/internal.h15
-rw-r--r--arch/mn10300/lib/lshrdi3.c60
-rw-r--r--arch/mn10300/lib/memcpy.S135
-rw-r--r--arch/mn10300/lib/memmove.S160
-rw-r--r--arch/mn10300/lib/memset.S121
-rw-r--r--arch/mn10300/lib/negdi2.c57
-rw-r--r--arch/mn10300/lib/usercopy.c166
-rw-r--r--arch/mn10300/mm/Kconfig.cache147
-rw-r--r--arch/mn10300/mm/Makefile31
-rw-r--r--arch/mn10300/mm/cache-dbg-flush-by-reg.S160
-rw-r--r--arch/mn10300/mm/cache-dbg-flush-by-tag.S114
-rw-r--r--arch/mn10300/mm/cache-dbg-inv-by-reg.S69
-rw-r--r--arch/mn10300/mm/cache-dbg-inv-by-tag.S120
-rw-r--r--arch/mn10300/mm/cache-dbg-inv.S47
-rw-r--r--arch/mn10300/mm/cache-disabled.c21
-rw-r--r--arch/mn10300/mm/cache-flush-by-reg.S308
-rw-r--r--arch/mn10300/mm/cache-flush-by-tag.S250
-rw-r--r--arch/mn10300/mm/cache-flush-icache.c155
-rw-r--r--arch/mn10300/mm/cache-inv-by-reg.S350
-rw-r--r--arch/mn10300/mm/cache-inv-by-tag.S276
-rw-r--r--arch/mn10300/mm/cache-inv-icache.c129
-rw-r--r--arch/mn10300/mm/cache-smp-flush.c156
-rw-r--r--arch/mn10300/mm/cache-smp-inv.c153
-rw-r--r--arch/mn10300/mm/cache-smp.c105
-rw-r--r--arch/mn10300/mm/cache-smp.h69
-rw-r--r--arch/mn10300/mm/cache.c54
-rw-r--r--arch/mn10300/mm/cache.inc133
-rw-r--r--arch/mn10300/mm/dma-alloc.c75
-rw-r--r--arch/mn10300/mm/extable.c26
-rw-r--r--arch/mn10300/mm/fault.c393
-rw-r--r--arch/mn10300/mm/init.c177
-rw-r--r--arch/mn10300/mm/misalignment.c967
-rw-r--r--arch/mn10300/mm/mmu-context.c62
-rw-r--r--arch/mn10300/mm/pgtable.c170
-rw-r--r--arch/mn10300/mm/tlb-mn10300.S220
-rw-r--r--arch/mn10300/mm/tlb-smp.c214
-rw-r--r--arch/mn10300/oprofile/Makefile13
-rw-r--r--arch/mn10300/oprofile/op_model_null.c22
-rw-r--r--arch/mn10300/proc-mn103e010/Makefile5
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/cache.h43
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/clock.h16
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/dmactl-regs.h102
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/intctl-regs.h29
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/irq.h34
-rw-r--r--arch/mn10300/proc-mn103e010/include/proc/proc.h18
-rw-r--r--arch/mn10300/proc-mn103e010/proc-init.c112
-rw-r--r--arch/mn10300/proc-mn2ws0050/Makefile5
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/cache.h49
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/clock.h20
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/dmactl-regs.h103
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/intctl-regs.h29
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/irq.h49
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/nand-regs.h120
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/proc.h18
-rw-r--r--arch/mn10300/proc-mn2ws0050/include/proc/smp-regs.h51
-rw-r--r--arch/mn10300/proc-mn2ws0050/proc-init.c134
-rw-r--r--arch/mn10300/unit-asb2303/Makefile6
-rw-r--r--arch/mn10300/unit-asb2303/flash.c100
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/clock.h24
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/leds.h43
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/serial.h141
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/smc91111.h50
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/timex.h150
-rw-r--r--arch/mn10300/unit-asb2303/leds.c52
-rw-r--r--arch/mn10300/unit-asb2303/smc91111.c52
-rw-r--r--arch/mn10300/unit-asb2303/unit-init.c68
-rw-r--r--arch/mn10300/unit-asb2305/Makefile8
-rw-r--r--arch/mn10300/unit-asb2305/include/unit/clock.h24
-rw-r--r--arch/mn10300/unit-asb2305/include/unit/leds.h51
-rw-r--r--arch/mn10300/unit-asb2305/include/unit/serial.h125
-rw-r--r--arch/mn10300/unit-asb2305/include/unit/timex.h150
-rw-r--r--arch/mn10300/unit-asb2305/leds.c124
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.c237
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.h77
-rw-r--r--arch/mn10300/unit-asb2305/pci-irq.c50
-rw-r--r--arch/mn10300/unit-asb2305/pci.c557
-rw-r--r--arch/mn10300/unit-asb2305/unit-init.c62
-rw-r--r--arch/mn10300/unit-asb2364/Makefile12
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/clock.h29
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/fpga-regs.h52
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/irq.h35
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/leds.h54
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/serial.h151
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/smsc911x.h171
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/timex.h159
-rw-r--r--arch/mn10300/unit-asb2364/irq-fpga.c108
-rw-r--r--arch/mn10300/unit-asb2364/leds.c98
-rw-r--r--arch/mn10300/unit-asb2364/smsc911x.c58
-rw-r--r--arch/mn10300/unit-asb2364/unit-init.c132
276 files changed, 35079 insertions, 0 deletions
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
new file mode 100644
index 00000000000..8f1c40d5817
--- /dev/null
+++ b/arch/mn10300/Kconfig
@@ -0,0 +1,495 @@
+config MN10300
+ def_bool y
+ select HAVE_OPROFILE
+ select HAVE_GENERIC_HARDIRQS
+ select GENERIC_IRQ_SHOW
+ select HAVE_ARCH_TRACEHOOK
+ select HAVE_ARCH_KGDB
+
+config AM33_2
+ def_bool n
+
+config AM33_3
+ def_bool n
+
+config AM34_2
+ def_bool n
+ select MN10300_HAS_ATOMIC_OPS_UNIT
+ select MN10300_HAS_CACHE_SNOOP
+
+config ERRATUM_NEED_TO_RELOAD_MMUCTR
+ def_bool y if AM33_3 || AM34_2
+
+config MMU
+ def_bool y
+
+config HIGHMEM
+ def_bool n
+
+config NUMA
+ def_bool n
+
+config UID16
+ def_bool y
+
+config RWSEM_GENERIC_SPINLOCK
+ def_bool y
+
+config RWSEM_XCHGADD_ALGORITHM
+ bool
+
+config GENERIC_CALIBRATE_DELAY
+ def_bool y
+
+config GENERIC_CMOS_UPDATE
+ def_bool n
+
+config GENERIC_HWEIGHT
+ def_bool y
+
+config GENERIC_CLOCKEVENTS
+ def_bool y
+
+config GENERIC_BUG
+ def_bool y
+
+config QUICKLIST
+ def_bool y
+
+config ARCH_HAS_ILOG2_U32
+ def_bool y
+
+config HOTPLUG_CPU
+ def_bool n
+
+source "init/Kconfig"
+
+source "kernel/Kconfig.freezer"
+
+
+menu "Panasonic MN10300 system setup"
+
+choice
+ prompt "Unit type"
+ default MN10300_UNIT_ASB2303
+ help
+ This option specifies board for which the kernel will be
+ compiled. It affects the external peripherals catered for.
+
+config MN10300_UNIT_ASB2303
+ bool "ASB2303"
+
+config MN10300_UNIT_ASB2305
+ bool "ASB2305"
+
+config MN10300_UNIT_ASB2364
+ bool "ASB2364"
+ select SMSC911X_ARCH_HOOKS if SMSC911X
+
+endchoice
+
+choice
+ prompt "Processor support"
+ default MN10300_PROC_MN103E010
+ help
+ This option specifies the processor for which the kernel will be
+ compiled. It affects the on-chip peripherals catered for.
+
+config MN10300_PROC_MN103E010
+ bool "MN103E010"
+ depends on MN10300_UNIT_ASB2303 || MN10300_UNIT_ASB2305
+ select AM33_2
+ select MN10300_PROC_HAS_TTYSM0
+ select MN10300_PROC_HAS_TTYSM1
+ select MN10300_PROC_HAS_TTYSM2
+
+config MN10300_PROC_MN2WS0050
+ bool "MN2WS0050"
+ depends on MN10300_UNIT_ASB2364
+ select AM34_2
+ select MN10300_PROC_HAS_TTYSM0
+ select MN10300_PROC_HAS_TTYSM1
+ select MN10300_PROC_HAS_TTYSM2
+
+endchoice
+
+config MN10300_HAS_ATOMIC_OPS_UNIT
+ def_bool n
+ help
+ This should be enabled if the processor has an atomic ops unit
+ capable of doing LL/SC equivalent operations.
+
+config FPU
+ bool "FPU present"
+ default y
+ depends on MN10300_PROC_MN103E010 || MN10300_PROC_MN2WS0050
+
+config LAZY_SAVE_FPU
+ bool "Save FPU state lazily"
+ default y
+ depends on FPU && !SMP
+ help
+ Enable this to be lazy in the saving of the FPU state to the owning
+ task's thread struct. This is useful if most tasks on the system
+ don't use the FPU as only those tasks that use it will pass it
+ between them, and the state needn't be saved for a task that isn't
+ using it.
+
+ This can't be so easily used on SMP as the process that owns the FPU
+ state on a CPU may be currently running on another CPU, so for the
+ moment, it is disabled.
+
+source "arch/mn10300/mm/Kconfig.cache"
+
+config MN10300_TLB_USE_PIDR
+ def_bool y
+
+menu "Memory layout options"
+
+config KERNEL_RAM_BASE_ADDRESS
+ hex "Base address of kernel RAM"
+ default "0x90000000"
+
+config INTERRUPT_VECTOR_BASE
+ hex "Base address of vector table"
+ default "0x90000000"
+ help
+ The base address of the vector table will be programmed into
+ the TBR register. It must be on 16MiB address boundary.
+
+config KERNEL_TEXT_ADDRESS
+ hex "Base address of kernel"
+ default "0x90001000"
+
+config KERNEL_ZIMAGE_BASE_ADDRESS
+ hex "Base address of compressed vmlinux image"
+ default "0x50700000"
+
+config BOOT_STACK_OFFSET
+ hex
+ default "0xF00" if SMP
+ default "0xFF0" if !SMP
+
+config BOOT_STACK_SIZE
+ hex
+ depends on SMP
+ default "0x100"
+endmenu
+
+config SMP
+ bool "Symmetric multi-processing support"
+ default y
+ select USE_GENERIC_SMP_HELPERS
+ depends on MN10300_PROC_MN2WS0038 || MN10300_PROC_MN2WS0050
+ ---help---
+ This enables support for systems with more than one CPU. If you have
+ a system with only one CPU, like most personal computers, say N. If
+ you have a system with more than one CPU, say Y.
+
+ If you say N here, the kernel will run on single and multiprocessor
+ machines, but will use only one CPU of a multiprocessor machine. If
+ you say Y here, the kernel will run on many, but not all,
+ singleprocessor machines. On a singleprocessor machine, the kernel
+ will run faster if you say N here.
+
+ See also <file:Documentation/x86/i386/IO-APIC.txt>,
+ <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
+
+ If you don't know what to do here, say N.
+
+config NR_CPUS
+ int
+ depends on SMP
+ default "2"
+
+source "kernel/Kconfig.preempt"
+
+config MN10300_CURRENT_IN_E2
+ bool "Hold current task address in E2 register"
+ depends on !SMP
+ default y
+ help
+ This option removes the E2/R2 register from the set available to gcc
+ for normal use and instead uses it to store the address of the
+ current process's task_struct whilst in the kernel.
+
+ This means the kernel doesn't need to calculate the address each time
+ "current" is used (take SP, AND with mask and dereference pointer
+ just to get the address), and instead can just use E2+offset
+ addressing each time.
+
+ This has no effect on userspace.
+
+config MN10300_USING_JTAG
+ bool "Using JTAG to debug kernel"
+ default y
+ help
+ This options indicates that JTAG will be used to debug the kernel. It
+ suppresses the use of certain hardware debugging features, such as
+ single-stepping, which are taken over completely by the JTAG unit.
+
+source "kernel/Kconfig.hz"
+source "kernel/time/Kconfig"
+
+config MN10300_RTC
+ bool "Using MN10300 RTC"
+ depends on MN10300_PROC_MN103E010 || MN10300_PROC_MN2WS0050
+ select GENERIC_CMOS_UPDATE
+ default n
+ help
+ This option enables support for the RTC, thus enabling time to be
+ tracked, even when system is powered down. This is available on-chip
+ on the MN103E010.
+
+config MN10300_WD_TIMER
+ bool "Using MN10300 watchdog timer"
+ default y
+ help
+ This options indicates that the watchdog timer will be used.
+
+config PCI
+ bool "Use PCI"
+ depends on MN10300_UNIT_ASB2305
+ default y
+ select GENERIC_PCI_IOMAP
+ help
+ Some systems (such as the ASB2305) have PCI onboard. If you have one
+ of these boards and you wish to use the PCI facilities, say Y here.
+
+ The PCI-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>, contains valuable
+ information about which PCI hardware does work under Linux and which
+ doesn't.
+
+source "drivers/pci/Kconfig"
+
+source "drivers/pcmcia/Kconfig"
+
+menu "MN10300 internal serial options"
+
+config MN10300_PROC_HAS_TTYSM0
+ bool
+ default n
+
+config MN10300_PROC_HAS_TTYSM1
+ bool
+ default n
+
+config MN10300_PROC_HAS_TTYSM2
+ bool
+ default n
+
+config MN10300_TTYSM
+ bool "Support for ttySM serial ports"
+ depends on MN10300
+ default y
+ select SERIAL_CORE
+ help
+ This option enables support for the on-chip serial ports that the
+ MN10300 has available.
+
+config MN10300_TTYSM_CONSOLE
+ bool "Support for console on ttySM serial ports"
+ depends on MN10300_TTYSM
+ select SERIAL_CORE_CONSOLE
+ help
+ This option enables support for a console on the on-chip serial ports
+ that the MN10300 has available.
+
+#
+# /dev/ttySM0
+#
+config MN10300_TTYSM0
+ bool "Enable SIF0 (/dev/ttySM0)"
+ depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM0
+ help
+ Enable access to SIF0 through /dev/ttySM0 or gdb-stub
+
+choice
+ prompt "Select the timer to supply the clock for SIF0"
+ default MN10300_TTYSM0_TIMER8
+ depends on MN10300_TTYSM0
+
+config MN10300_TTYSM0_TIMER8
+ bool "Use timer 8 (16-bit)"
+
+config MN10300_TTYSM0_TIMER2
+ bool "Use timer 2 (8-bit)"
+
+endchoice
+
+#
+# /dev/ttySM1
+#
+config MN10300_TTYSM1
+ bool "Enable SIF1 (/dev/ttySM1)"
+ depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM1
+ help
+ Enable access to SIF1 through /dev/ttySM1 or gdb-stub
+
+choice
+ prompt "Select the timer to supply the clock for SIF1"
+ default MN10300_TTYSM1_TIMER12 \
+ if !(AM33_2 || AM33_3)
+ default MN10300_TTYSM1_TIMER9 \
+ if AM33_2 || AM33_3
+ depends on MN10300_TTYSM1
+
+config MN10300_TTYSM1_TIMER12
+ bool "Use timer 12 (16-bit)"
+ depends on !(AM33_2 || AM33_3)
+
+config MN10300_TTYSM1_TIMER9
+ bool "Use timer 9 (16-bit)"
+ depends on AM33_2 || AM33_3
+
+config MN10300_TTYSM1_TIMER3
+ bool "Use timer 3 (8-bit)"
+ depends on AM33_2 || AM33_3
+
+endchoice
+
+#
+# /dev/ttySM2
+#
+config MN10300_TTYSM2
+ bool "Enable SIF2 (/dev/ttySM2)"
+ depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM2
+ help
+ Enable access to SIF2 through /dev/ttySM2 or gdb-stub
+
+choice
+ prompt "Select the timer to supply the clock for SIF2"
+ default MN10300_TTYSM2_TIMER3 \
+ if !(AM33_2 || AM33_3)
+ default MN10300_TTYSM2_TIMER10 \
+ if AM33_2 || AM33_3
+ depends on MN10300_TTYSM2
+
+config MN10300_TTYSM2_TIMER9
+ bool "Use timer 9 (16-bit)"
+ depends on !(AM33_2 || AM33_3)
+
+config MN10300_TTYSM2_TIMER1
+ bool "Use timer 1 (8-bit)"
+ depends on !(AM33_2 || AM33_3)
+
+config MN10300_TTYSM2_TIMER3
+ bool "Use timer 3 (8-bit)"
+ depends on !(AM33_2 || AM33_3)
+
+config MN10300_TTYSM2_TIMER10
+ bool "Use timer 10 (16-bit)"
+ depends on AM33_2 || AM33_3
+
+endchoice
+
+config MN10300_TTYSM2_CTS
+ bool "Enable the use of the CTS line /dev/ttySM2"
+ depends on MN10300_TTYSM2 && AM33_2
+
+endmenu
+
+menu "Interrupt request priority options"
+
+comment "[!] NOTE: A lower number/level indicates a higher priority (0 is highest, 6 is lowest)"
+
+comment "____Non-maskable interrupt levels____"
+comment "The following must be set to a higher priority than local_irq_disable() and on-chip serial"
+
+config DEBUGGER_IRQ_LEVEL
+ int "DEBUGGER interrupt priority"
+ depends on KERNEL_DEBUGGER
+ range 0 1 if LINUX_CLI_LEVEL = 2
+ range 0 2 if LINUX_CLI_LEVEL = 3
+ range 0 3 if LINUX_CLI_LEVEL = 4
+ range 0 4 if LINUX_CLI_LEVEL = 5
+ range 0 5 if LINUX_CLI_LEVEL = 6
+ default 0
+
+comment "The following must be set to a higher priority than local_irq_disable()"
+
+config MN10300_SERIAL_IRQ_LEVEL
+ int "MN10300 on-chip serial interrupt priority"
+ depends on MN10300_TTYSM
+ range 1 1 if LINUX_CLI_LEVEL = 2
+ range 1 2 if LINUX_CLI_LEVEL = 3
+ range 1 3 if LINUX_CLI_LEVEL = 4
+ range 1 4 if LINUX_CLI_LEVEL = 5
+ range 1 5 if LINUX_CLI_LEVEL = 6
+ default 1
+
+comment "-"
+comment "____Maskable interrupt levels____"
+
+config LINUX_CLI_LEVEL
+ int "The highest interrupt priority excluded by local_irq_disable() (2-6)"
+ range 2 6
+ default 2
+ help
+ local_irq_disable() doesn't actually disable maskable interrupts -
+ what it does is restrict the levels of interrupt which are permitted
+ (a lower level indicates a higher priority) by lowering the value in
+ EPSW.IM from 7. Any interrupt is permitted for which the level is
+ lower than EPSW.IM.
+
+ Certain interrupts, such as DEBUGGER and virtual MN10300 on-chip
+ serial DMA interrupts are allowed to interrupt normal disabled
+ sections.
+
+comment "The following must be set to a equal to or lower priority than LINUX_CLI_LEVEL"
+
+config TIMER_IRQ_LEVEL
+ int "Kernel timer interrupt priority"
+ range LINUX_CLI_LEVEL 6
+ default 4
+
+config PCI_IRQ_LEVEL
+ int "PCI interrupt priority"
+ depends on PCI
+ range LINUX_CLI_LEVEL 6
+ default 5
+
+config ETHERNET_IRQ_LEVEL
+ int "Ethernet interrupt priority"
+ depends on SMC91X || SMC911X || SMSC911X
+ range LINUX_CLI_LEVEL 6
+ default 6
+
+config EXT_SERIAL_IRQ_LEVEL
+ int "External serial port interrupt priority"
+ depends on SERIAL_8250
+ range LINUX_CLI_LEVEL 6
+ default 6
+
+endmenu
+
+source "mm/Kconfig"
+
+menu "Power management options"
+source kernel/power/Kconfig
+endmenu
+
+endmenu
+
+
+menu "Executable formats"
+
+source "fs/Kconfig.binfmt"
+
+endmenu
+
+source "net/Kconfig"
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+source "arch/mn10300/Kconfig.debug"
+
+source "security/Kconfig"
+
+source "crypto/Kconfig"
+
+source "lib/Kconfig"
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
new file mode 100644
index 00000000000..bdbfd444a9f
--- /dev/null
+++ b/arch/mn10300/Kconfig.debug
@@ -0,0 +1,159 @@
+menu "Kernel hacking"
+
+source "lib/Kconfig.debug"
+
+config DEBUG_STACKOVERFLOW
+ bool "Check for stack overflows"
+ depends on DEBUG_KERNEL
+
+config DEBUG_DECOMPRESS_KERNEL
+ bool "Using serial port during decompressing kernel"
+ depends on DEBUG_KERNEL
+ default n
+ help
+ If you say Y here you will confirm the start and the end of
+ decompressing Linux seeing "Uncompressing Linux... " and
+ "Ok, booting the kernel.\n" on console.
+
+config TEST_MISALIGNMENT_HANDLER
+ bool "Run tests on the misalignment handler"
+ depends on DEBUG_KERNEL
+ default n
+ help
+ If you say Y here the kernel will execute a list of misaligned memory
+ accesses to make sure the misalignment handler deals them with
+ correctly. If it does not, the kernel will throw a BUG.
+
+config KPROBES
+ bool "Kprobes"
+ depends on DEBUG_KERNEL
+ help
+ Kprobes allows you to trap at almost any kernel address and
+ execute a callback function. register_kprobe() establishes
+ a probepoint and specifies the callback. Kprobes is useful
+ for kernel debugging, non-intrusive instrumentation and testing.
+ If in doubt, say "N".
+
+config GDBSTUB
+ bool "Remote GDB kernel debugging"
+ depends on DEBUG_KERNEL && DEPRECATED
+ select DEBUG_INFO
+ select FRAME_POINTER
+ help
+ If you say Y here, it will be possible to remotely debug the kernel
+ using gdb. This enlarges your kernel ELF image disk size by several
+ megabytes and requires a machine with more than 16 MB, better 32 MB
+ RAM to avoid excessive linking time. This is only useful for kernel
+ hackers. If unsure, say N.
+
+ This is deprecated in favour of KGDB and will be removed in a later
+ version.
+
+config GDBSTUB_IMMEDIATE
+ bool "Break into GDB stub immediately"
+ depends on GDBSTUB
+ help
+ If you say Y here, GDB stub will break into the program as soon as
+ possible, leaving the program counter at the beginning of
+ start_kernel() in init/main.c.
+
+config GDBSTUB_ALLOW_SINGLE_STEP
+ bool "Allow software single-stepping in GDB stub"
+ depends on GDBSTUB && !SMP && !PREEMPT
+ help
+ Allow GDB stub to perform software single-stepping through the
+ kernel. This doesn't work very well on SMP or preemptible kernels as
+ it uses temporary breakpoints to emulate single-stepping.
+
+config GDB_CONSOLE
+ bool "Console output to GDB"
+ depends on GDBSTUB
+ help
+ If you are using GDB for remote debugging over a serial port and
+ would like kernel messages to be formatted into GDB $O packets so
+ that GDB prints them as program output, say 'Y'.
+
+config GDBSTUB_DEBUGGING
+ bool "Debug GDB stub by messages to serial port"
+ depends on GDBSTUB
+ help
+ This causes debugging messages to be displayed at various points
+ during execution of the GDB stub routines. Such messages will be
+ displayed on ttyS0 if that isn't the GDB stub's port, or ttySM0
+ otherwise.
+
+config GDBSTUB_DEBUG_ENTRY
+ bool "Debug GDB stub entry"
+ depends on GDBSTUB_DEBUGGING
+ help
+ This option causes information to be displayed about entry to or exit
+ from the main GDB stub routine.
+
+config GDBSTUB_DEBUG_PROTOCOL
+ bool "Debug GDB stub protocol"
+ depends on GDBSTUB_DEBUGGING
+ help
+ This option causes information to be displayed about the GDB remote
+ protocol messages generated exchanged with GDB.
+
+config GDBSTUB_DEBUG_IO
+ bool "Debug GDB stub I/O"
+ depends on GDBSTUB_DEBUGGING
+ help
+ This option causes information to be displayed about GDB stub's
+ low-level I/O.
+
+config GDBSTUB_DEBUG_BREAKPOINT
+ bool "Debug GDB stub breakpoint management"
+ depends on GDBSTUB_DEBUGGING
+ help
+ This option causes information to be displayed about GDB stub's
+ breakpoint management.
+
+choice
+ prompt "GDB stub port"
+ default GDBSTUB_ON_TTYSM0
+ depends on GDBSTUB
+ help
+ Select the serial port used for GDB-stub.
+
+config GDBSTUB_ON_TTYSM0
+ bool "/dev/ttySM0 [SIF0]"
+ depends on MN10300_TTYSM0
+ select GDBSTUB_ON_TTYSMx
+
+config GDBSTUB_ON_TTYSM1
+ bool "/dev/ttySM1 [SIF1]"
+ depends on MN10300_TTYSM1
+ select GDBSTUB_ON_TTYSMx
+
+config GDBSTUB_ON_TTYSM2
+ bool "/dev/ttySM2 [SIF2]"
+ depends on MN10300_TTYSM2
+ select GDBSTUB_ON_TTYSMx
+
+config GDBSTUB_ON_TTYS0
+ bool "/dev/ttyS0"
+ select GDBSTUB_ON_TTYSx
+
+config GDBSTUB_ON_TTYS1
+ bool "/dev/ttyS1"
+ select GDBSTUB_ON_TTYSx
+
+endchoice
+
+config GDBSTUB_ON_TTYSMx
+ bool
+ depends on GDBSTUB_ON_TTYSM0 || GDBSTUB_ON_TTYSM1 || GDBSTUB_ON_TTYSM2
+ default y
+
+config GDBSTUB_ON_TTYSx
+ bool
+ depends on GDBSTUB_ON_TTYS0 || GDBSTUB_ON_TTYS1
+ default y
+
+endmenu
+
+config KERNEL_DEBUGGER
+ def_bool y
+ depends on GDBSTUB || KGDB
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile
new file mode 100644
index 00000000000..7120282bf0d
--- /dev/null
+++ b/arch/mn10300/Makefile
@@ -0,0 +1,107 @@
+###############################################################################
+#
+# MN10300 Kernel makefile system specifications
+#
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Modified by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+
+KBUILD_DEFCONFIG := asb2303_defconfig
+
+CCSPECS := $(shell $(CC) -v 2>&1 | grep "^Reading specs from " | head -1 | cut -c20-)
+CCDIR := $(strip $(patsubst %/specs,%,$(CCSPECS)))
+KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include
+
+LDFLAGS :=
+OBJCOPYFLAGS := -O binary -R .note -R .comment -R .GCC-command-line -R .note.gnu.build-id -S
+#LDFLAGS_vmlinux := -Map linkmap.txt
+CHECKFLAGS +=
+
+PROCESSOR := unset
+UNIT := unset
+
+KBUILD_CFLAGS += -mam33 -mmem-funcs -DCPU=AM33
+KBUILD_AFLAGS += -mam33 -DCPU=AM33
+
+ifeq ($(CONFIG_MN10300_CURRENT_IN_E2),y)
+KBUILD_CFLAGS += -ffixed-e2 -fcall-saved-e5
+endif
+
+ifeq ($(CONFIG_MN10300_PROC_MN103E010),y)
+PROCESSOR := mn103e010
+endif
+ifeq ($(CONFIG_MN10300_PROC_MN2WS0050),y)
+PROCESSOR := mn2ws0050
+endif
+
+ifeq ($(CONFIG_MN10300_UNIT_ASB2303),y)
+UNIT := asb2303
+endif
+ifeq ($(CONFIG_MN10300_UNIT_ASB2305),y)
+UNIT := asb2305
+endif
+ifeq ($(CONFIG_MN10300_UNIT_ASB2364),y)
+UNIT := asb2364
+endif
+
+
+head-y := arch/mn10300/kernel/head.o arch/mn10300/kernel/init_task.o
+
+core-y += arch/mn10300/kernel/ arch/mn10300/mm/
+
+ifneq ($(PROCESSOR),unset)
+core-y += arch/mn10300/proc-$(PROCESSOR)/
+endif
+ifneq ($(UNIT),unset)
+core-y += arch/mn10300/unit-$(UNIT)/
+endif
+libs-y += arch/mn10300/lib/
+
+drivers-$(CONFIG_OPROFILE) += arch/mn10300/oprofile/
+
+boot := arch/mn10300/boot
+
+.PHONY: zImage
+
+KBUILD_IMAGE := $(boot)/zImage
+CLEAN_FILES += $(boot)/zImage
+CLEAN_FILES += $(boot)/compressed/vmlinux
+CLEAN_FILES += $(boot)/compressed/vmlinux.bin
+CLEAN_FILES += $(boot)/compressed/vmlinux.bin.gz
+
+zImage: vmlinux
+ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+
+all: zImage
+
+bootstrap:
+ $(Q)$(MAKEBOOT) bootstrap
+
+archclean:
+ $(Q)$(MAKE) $(clean)=arch/mn10300/proc-mn103e010
+ $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2303
+ $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2305
+
+define archhelp
+ echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
+endef
+
+# If you make sure the .S files get compiled with debug info,
+# uncomment the following to disable optimisations
+# that are unhelpful whilst debugging.
+ifdef CONFIG_DEBUG_INFO
+#KBUILD_CFLAGS += -O1
+KBUILD_AFLAGS += -Wa,--gdwarf2
+endif
+
+#
+# include the appropriate processor- and unit-specific headers
+#
+KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/proc-$(PROCESSOR)/include
+KBUILD_CPPFLAGS += -I$(srctree)/arch/mn10300/unit-$(UNIT)/include
diff --git a/arch/mn10300/boot/Makefile b/arch/mn10300/boot/Makefile
new file mode 100644
index 00000000000..36c9caf8ea0
--- /dev/null
+++ b/arch/mn10300/boot/Makefile
@@ -0,0 +1,28 @@
+# MN10300 kernel compressor and wrapper
+#
+# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Written by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+
+targets := vmlinux.bin zImage
+
+subdir- := compressed
+
+# ---------------------------------------------------------------------------
+
+
+$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
+ $(call if_changed,objcopy)
+ @echo 'Kernel: $@ is ready'
+
+$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
+ $(call if_changed,objcopy)
+
+$(obj)/compressed/vmlinux: FORCE
+ $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
diff --git a/arch/mn10300/boot/compressed/Makefile b/arch/mn10300/boot/compressed/Makefile
new file mode 100644
index 00000000000..08a95e17168
--- /dev/null
+++ b/arch/mn10300/boot/compressed/Makefile
@@ -0,0 +1,22 @@
+#
+# Create a compressed vmlinux image from the original vmlinux
+#
+
+targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
+
+LDFLAGS_vmlinux := -Ttext $(CONFIG_KERNEL_ZIMAGE_BASE_ADDRESS) -e startup_32
+
+$(obj)/vmlinux: $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
+ $(call if_changed,ld)
+ @:
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+ $(call if_changed,objcopy)
+
+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,gzip)
+
+LDFLAGS_piggy.o := -r --format binary --oformat elf32-am33lin -T
+
+$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE
+ $(call if_changed,ld)
diff --git a/arch/mn10300/boot/compressed/head.S b/arch/mn10300/boot/compressed/head.S
new file mode 100644
index 00000000000..7b50345b9e8
--- /dev/null
+++ b/arch/mn10300/boot/compressed/head.S
@@ -0,0 +1,151 @@
+/* Boot entry point for a compressed MN10300 kernel
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+ .section .text
+
+#define DEBUG
+
+#include <linux/linkage.h>
+#include <asm/cpu-regs.h>
+#include <asm/cache.h>
+#ifdef CONFIG_SMP
+#include <proc/smp-regs.h>
+#endif
+
+ .globl startup_32
+startup_32:
+#ifdef CONFIG_SMP
+ #
+ # Secondary CPUs jump directly to the kernel entry point
+ #
+ # Must save primary CPU's D0-D2 registers as they hold boot parameters
+ #
+ mov (CPUID), d3
+ and CPUID_MASK,d3
+ beq startup_primary
+ mov CONFIG_KERNEL_TEXT_ADDRESS,a0
+ jmp (a0)
+
+startup_primary:
+#endif /* CONFIG_SMP */
+
+ # first save parameters from bootloader
+ mov param_save_area,a0
+ mov d0,(a0)
+ mov d1,(4,a0)
+ mov d2,(8,a0)
+
+ mov sp,a3
+ mov decomp_stack+0x2000-4,a0
+ mov a0,sp
+
+ # invalidate and enable both of the caches
+ mov CHCTR,a0
+ clr d0
+ movhu d0,(a0) # turn off first
+ mov CHCTR_ICINV|CHCTR_DCINV,d0
+ movhu d0,(a0)
+ setlb
+ mov (a0),d0
+ btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
+ lne
+
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+#ifdef CONFIG_MN10300_CACHE_WBACK
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
+#else
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
+#endif /* WBACK */
+ movhu d0,(a0) # enable
+#endif /* !ENABLED */
+
+ # clear the BSS area
+ mov __bss_start,a0
+ mov _end,a1
+ clr d0
+bssclear:
+ cmp a1,a0
+ bge bssclear_end
+ movbu d0,(a0)
+ inc a0
+ bra bssclear
+bssclear_end:
+
+ # decompress the kernel
+ call decompress_kernel[],0
+#ifdef CONFIG_MN10300_CACHE_WBACK
+ call mn10300_dcache_flush_inv[],0
+#endif
+
+ # disable caches again
+ mov CHCTR,a0
+ clr d0
+ movhu d0,(a0)
+ setlb
+ mov (a0),d0
+ btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
+ lne
+
+ mov param_save_area,a0
+ mov (a0),d0
+ mov (4,a0),d1
+ mov (8,a0),d2
+
+ # jump to the kernel proper entry point
+ mov a3,sp
+ mov CONFIG_KERNEL_TEXT_ADDRESS,a0
+ jmp (a0)
+
+
+###############################################################################
+#
+# Cache flush routines
+#
+###############################################################################
+#ifdef CONFIG_MN10300_CACHE_WBACK
+mn10300_dcache_flush_inv:
+ movhu (CHCTR),d0
+ btst CHCTR_DCEN,d0
+ beq mn10300_dcache_flush_inv_end
+
+ mov L1_CACHE_NENTRIES,d1
+ clr a1
+
+mn10300_dcache_flush_inv_loop:
+ mov (DCACHE_PURGE_WAY0(0),a1),d0 # unconditional purge
+ mov (DCACHE_PURGE_WAY1(0),a1),d0 # unconditional purge
+ mov (DCACHE_PURGE_WAY2(0),a1),d0 # unconditional purge
+ mov (DCACHE_PURGE_WAY3(0),a1),d0 # unconditional purge
+
+ add L1_CACHE_BYTES,a1
+ add -1,d1
+ bne mn10300_dcache_flush_inv_loop
+
+mn10300_dcache_flush_inv_end:
+ ret [],0
+#endif /* CONFIG_MN10300_CACHE_WBACK */
+
+
+###############################################################################
+#
+# Data areas
+#
+###############################################################################
+ .data
+ .align 4
+param_save_area:
+ .rept 3
+ .word 0
+ .endr
+
+ .section .bss
+ .align 4
+decomp_stack:
+ .space 0x2000
diff --git a/arch/mn10300/boot/compressed/misc.c b/arch/mn10300/boot/compressed/misc.c
new file mode 100644
index 00000000000..42cbd77bd43
--- /dev/null
+++ b/arch/mn10300/boot/compressed/misc.c
@@ -0,0 +1,393 @@
+/* MN10300 Miscellaneous helper routines for kernel decompressor
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ * - Derived from arch/x86/boot/compressed/misc_32.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/compiler.h>
+#include <asm/serial-regs.h>
+#include "misc.h"
+
+#ifndef CONFIG_GDBSTUB_ON_TTYSx
+/* display 'Uncompressing Linux... ' messages on ttyS0 or ttyS1 */
+#if 1 /* ttyS0 */
+#define CYG_DEV_BASE 0xA6FB0000
+#else /* ttyS1 */
+#define CYG_DEV_BASE 0xA6FC0000
+#endif
+
+#define CYG_DEV_THR (*((volatile __u8*)(CYG_DEV_BASE + 0x00)))
+#define CYG_DEV_MCR (*((volatile __u8*)(CYG_DEV_BASE + 0x10)))
+#define SIO_MCR_DTR 0x01
+#define SIO_MCR_RTS 0x02
+#define CYG_DEV_LSR (*((volatile __u8*)(CYG_DEV_BASE + 0x14)))
+#define SIO_LSR_THRE 0x20 /* transmitter holding register empty */
+#define SIO_LSR_TEMT 0x40 /* transmitter register empty */
+#define CYG_DEV_MSR (*((volatile __u8*)(CYG_DEV_BASE + 0x18)))
+#define SIO_MSR_CTS 0x10 /* clear to send */
+#define SIO_MSR_DSR 0x20 /* data set ready */
+
+#define LSR_WAIT_FOR(STATE) \
+ do { while (!(CYG_DEV_LSR & SIO_LSR_##STATE)) {} } while (0)
+#define FLOWCTL_QUERY(LINE) \
+ ({ CYG_DEV_MSR & SIO_MSR_##LINE; })
+#define FLOWCTL_WAIT_FOR(LINE) \
+ do { while (!(CYG_DEV_MSR & SIO_MSR_##LINE)) {} } while (0)
+#define FLOWCTL_CLEAR(LINE) \
+ do { CYG_DEV_MCR &= ~SIO_MCR_##LINE; } while (0)
+#define FLOWCTL_SET(LINE) \
+ do { CYG_DEV_MCR |= SIO_MCR_##LINE; } while (0)
+#endif
+
+/*
+ * gzip declarations
+ */
+
+#define OF(args) args
+#define STATIC static
+
+#undef memset
+#undef memcpy
+
+static inline void *memset(const void *s, int c, size_t n)
+{
+ int i;
+ char *ss = (char *) s;
+
+ for (i = 0; i < n; i++)
+ ss[i] = c;
+ return (void *)s;
+}
+
+#define memzero(s, n) memset((s), 0, (n))
+
+static inline void *memcpy(void *__dest, const void *__src, size_t __n)
+{
+ int i;
+ const char *s = __src;
+ char *d = __dest;
+
+ for (i = 0; i < __n; i++)
+ d[i] = s[i];
+ return __dest;
+}
+
+typedef unsigned char uch;
+typedef unsigned short ush;
+typedef unsigned long ulg;
+
+#define WSIZE 0x8000 /* Window size must be at least 32k, and a power of
+ * two */
+
+static uch *inbuf; /* input buffer */
+static uch window[WSIZE]; /* sliding window buffer */
+
+static unsigned insize; /* valid bytes in inbuf */
+static unsigned inptr; /* index of next byte to be processed in inbuf */
+static unsigned outcnt; /* bytes in output buffer */
+
+/* gzip flag byte */
+#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
+#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
+#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
+#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
+#define COMMENT 0x10 /* bit 4 set: file comment present */
+#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
+#define RESERVED 0xC0 /* bit 6,7: reserved */
+
+/* Diagnostic functions */
+#ifdef DEBUG
+# define Assert(cond, msg) { if (!(cond)) error(msg); }
+# define Trace(x) fprintf x
+# define Tracev(x) { if (verbose) fprintf x ; }
+# define Tracevv(x) { if (verbose > 1) fprintf x ; }
+# define Tracec(c, x) { if (verbose && (c)) fprintf x ; }
+# define Tracecv(c, x) { if (verbose > 1 && (c)) fprintf x ; }
+#else
+# define Assert(cond, msg)
+# define Trace(x)
+# define Tracev(x)
+# define Tracevv(x)
+# define Tracec(c, x)
+# define Tracecv(c, x)
+#endif
+
+static int fill_inbuf(void);
+static void flush_window(void);
+static void error(const char *) __attribute__((noreturn));
+static void kputs(const char *);
+
+static inline unsigned char get_byte(void)
+{
+ unsigned char ch = inptr < insize ? inbuf[inptr++] : fill_inbuf();
+
+#if 0
+ char hex[3];
+ hex[0] = ((ch & 0x0f) > 9) ?
+ ((ch & 0x0f) + 'A' - 0xa) : ((ch & 0x0f) + '0');
+ hex[1] = ((ch >> 4) > 9) ?
+ ((ch >> 4) + 'A' - 0xa) : ((ch >> 4) + '0');
+ hex[2] = 0;
+ kputs(hex);
+#endif
+ return ch;
+}
+
+/*
+ * This is set up by the setup-routine at boot-time
+ */
+#define EXT_MEM_K (*(unsigned short *)0x90002)
+#ifndef STANDARD_MEMORY_BIOS_CALL
+#define ALT_MEM_K (*(unsigned long *) 0x901e0)
+#endif
+#define SCREEN_INFO (*(struct screen_info *)0x90000)
+
+static long bytes_out;
+static uch *output_data;
+static unsigned long output_ptr;
+
+
+static unsigned long free_mem_ptr = (unsigned long) &end;
+static unsigned long free_mem_end_ptr = (unsigned long) &end + 0x90000;
+
+#define INPLACE_MOVE_ROUTINE 0x1000
+#define LOW_BUFFER_START 0x2000
+#define LOW_BUFFER_END 0x90000
+#define LOW_BUFFER_SIZE (LOW_BUFFER_END - LOW_BUFFER_START)
+#define HEAP_SIZE 0x3000
+static int high_loaded;
+static uch *high_buffer_start /* = (uch *)(((ulg)&end) + HEAP_SIZE)*/;
+
+static char *vidmem = (char *)0xb8000;
+static int lines, cols;
+
+#define BOOTLOADER_INFLATE
+#include "../../../../lib/inflate.c"
+
+static inline void scroll(void)
+{
+ int i;
+
+ memcpy(vidmem, vidmem + cols * 2, (lines - 1) * cols * 2);
+ for (i = (lines - 1) * cols * 2; i < lines * cols * 2; i += 2)
+ vidmem[i] = ' ';
+}
+
+static inline void kputchar(unsigned char ch)
+{
+#ifdef CONFIG_MN10300_UNIT_ASB2305
+ while (SC0STR & SC01STR_TBF)
+ continue;
+
+ if (ch == 0x0a) {
+ SC0TXB = 0x0d;
+ while (SC0STR & SC01STR_TBF)
+ continue;
+ }
+
+ SC0TXB = ch;
+
+#else
+ while (SC1STR & SC01STR_TBF)
+ continue;
+
+ if (ch == 0x0a) {
+ SC1TXB = 0x0d;
+ while (SC1STR & SC01STR_TBF)
+ continue;
+ }
+
+ SC1TXB = ch;
+
+#endif
+}
+
+static void kputs(const char *s)
+{
+#ifdef CONFIG_DEBUG_DECOMPRESS_KERNEL
+#ifndef CONFIG_GDBSTUB_ON_TTYSx
+ char ch;
+
+ FLOWCTL_SET(DTR);
+
+ while (*s) {
+ LSR_WAIT_FOR(THRE);
+
+ ch = *s++;
+ if (ch == 0x0a) {
+ CYG_DEV_THR = 0x0d;
+ LSR_WAIT_FOR(THRE);
+ }
+ CYG_DEV_THR = ch;
+ }
+
+ FLOWCTL_CLEAR(DTR);
+#else
+
+ for (; *s; s++)
+ kputchar(*s);
+
+#endif
+#endif /* CONFIG_DEBUG_DECOMPRESS_KERNEL */
+}
+
+/* ===========================================================================
+ * Fill the input buffer. This is called only when the buffer is empty
+ * and at least one byte is really needed.
+ */
+static int fill_inbuf()
+{
+ if (insize != 0)
+ error("ran out of input data\n");
+
+ inbuf = input_data;
+ insize = input_len;
+ inptr = 1;
+ return inbuf[0];
+}
+
+/* ===========================================================================
+ * Write the output window window[0..outcnt-1] and update crc and bytes_out.
+ * (Used for the decompressed data only.)
+ */
+static void flush_window_low(void)
+{
+ ulg c = crc; /* temporary variable */
+ unsigned n;
+ uch *in, *out, ch;
+
+ in = window;
+ out = &output_data[output_ptr];
+ for (n = 0; n < outcnt; n++) {
+ ch = *out++ = *in++;
+ c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
+ }
+ crc = c;
+ bytes_out += (ulg)outcnt;
+ output_ptr += (ulg)outcnt;
+ outcnt = 0;
+}
+
+static void flush_window_high(void)
+{
+ ulg c = crc; /* temporary variable */
+ unsigned n;
+ uch *in, ch;
+ in = window;
+ for (n = 0; n < outcnt; n++) {
+ ch = *output_data++ = *in++;
+ if ((ulg) output_data == LOW_BUFFER_END)
+ output_data = high_buffer_start;
+ c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
+ }
+ crc = c;
+ bytes_out += (ulg)outcnt;
+ outcnt = 0;
+}
+
+static void flush_window(void)
+{
+ if (high_loaded)
+ flush_window_high();
+ else
+ flush_window_low();
+}
+
+static void error(const char *x)
+{
+ kputs("\n\n");
+ kputs(x);
+ kputs("\n\n -- System halted");
+
+ while (1)
+ /* Halt */;
+}
+
+#define STACK_SIZE (4096)
+
+long user_stack[STACK_SIZE];
+
+struct {
+ long *a;
+ short b;
+} stack_start = { &user_stack[STACK_SIZE], 0 };
+
+void setup_normal_output_buffer(void)
+{
+#ifdef STANDARD_MEMORY_BIOS_CALL
+ if (EXT_MEM_K < 1024)
+ error("Less than 2MB of memory.\n");
+#else
+ if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024)
+ error("Less than 2MB of memory.\n");
+#endif
+ output_data = (char *) 0x100000; /* Points to 1M */
+}
+
+struct moveparams {
+ uch *low_buffer_start;
+ int lcount;
+ uch *high_buffer_start;
+ int hcount;
+};
+
+void setup_output_buffer_if_we_run_high(struct moveparams *mv)
+{
+ high_buffer_start = (uch *)(((ulg) &end) + HEAP_SIZE);
+#ifdef STANDARD_MEMORY_BIOS_CALL
+ if (EXT_MEM_K < (3 * 1024))
+ error("Less than 4MB of memory.\n");
+#else
+ if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < (3 * 1024))
+ error("Less than 4MB of memory.\n");
+#endif
+ mv->low_buffer_start = output_data = (char *) LOW_BUFFER_START;
+ high_loaded = 1;
+ free_mem_end_ptr = (long) high_buffer_start;
+ if (0x100000 + LOW_BUFFER_SIZE > (ulg) high_buffer_start) {
+ high_buffer_start = (uch *)(0x100000 + LOW_BUFFER_SIZE);
+ mv->hcount = 0; /* say: we need not to move high_buffer */
+ } else {
+ mv->hcount = -1;
+ }
+ mv->high_buffer_start = high_buffer_start;
+}
+
+void close_output_buffer_if_we_run_high(struct moveparams *mv)
+{
+ mv->lcount = bytes_out;
+ if (bytes_out > LOW_BUFFER_SIZE) {
+ mv->lcount = LOW_BUFFER_SIZE;
+ if (mv->hcount)
+ mv->hcount = bytes_out - LOW_BUFFER_SIZE;
+ } else {
+ mv->hcount = 0;
+ }
+}
+
+#undef DEBUGFLAG
+#ifdef DEBUGFLAG
+int debugflag;
+#endif
+
+int decompress_kernel(struct moveparams *mv)
+{
+#ifdef DEBUGFLAG
+ while (!debugflag)
+ barrier();
+#endif
+
+ output_data = (char *) CONFIG_KERNEL_TEXT_ADDRESS;
+
+ makecrc();
+ kputs("Uncompressing Linux... ");
+ gunzip();
+ kputs("Ok, booting the kernel.\n");
+ return 0;
+}
diff --git a/arch/mn10300/boot/compressed/misc.h b/arch/mn10300/boot/compressed/misc.h
new file mode 100644
index 00000000000..da921cd172f
--- /dev/null
+++ b/arch/mn10300/boot/compressed/misc.h
@@ -0,0 +1,18 @@
+/* Internal definitions for the MN10300 kernel decompressor
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+extern int end;
+
+/*
+ * vmlinux.lds
+ */
+extern char input_data[];
+extern int input_len;
diff --git a/arch/mn10300/boot/compressed/vmlinux.lds b/arch/mn10300/boot/compressed/vmlinux.lds
new file mode 100644
index 00000000000..a084903603f
--- /dev/null
+++ b/arch/mn10300/boot/compressed/vmlinux.lds
@@ -0,0 +1,9 @@
+SECTIONS
+{
+ .data : {
+ input_len = .;
+ LONG(input_data_end - input_data) input_data = .;
+ *(.data)
+ input_data_end = .;
+ }
+}
diff --git a/arch/mn10300/boot/install.sh b/arch/mn10300/boot/install.sh
new file mode 100644
index 00000000000..abba3097119
--- /dev/null
+++ b/arch/mn10300/boot/install.sh
@@ -0,0 +1,67 @@
+#!/bin/sh
+#
+# arch/mn10300/boot/install -c.sh
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# Licence. See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1995 by Linus Torvalds
+#
+# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
+#
+# "make install -c" script for i386 architecture
+#
+# Arguments:
+# $1 - kernel version
+# $2 - kernel image file
+# $3 - kernel map file
+# $4 - default install -c path (blank if root directory)
+# $5 - boot rom file
+#
+
+# User may have a custom install -c script
+
+rm -fr $4/../usr/include/linux $4/../usr/include/asm
+install -c -m 0755 $2 $4/vmlinuz
+install -c -m 0755 $5 $4/boot.rom
+install -c -m 0755 -d $4/../usr/include/linux
+cd ${srctree}/include/linux
+for i in `find . -maxdepth 1 -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux
+done
+install -c -m 0755 -d $4/../usr/include/linux/byteorder
+cd ${srctree}/include/linux/byteorder
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/byteorder
+done
+install -c -m 0755 -d $4/../usr/include/linux/lockd
+cd ${srctree}/include/linux/lockd
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/lockd
+done
+install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4
+cd ${srctree}/include/linux/netfilter_ipv4
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4
+done
+install -c -m 0755 -d $4/../usr/include/linux/nfsd
+cd ${srctree}/include/linux/nfsd
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i
+done
+install -c -m 0755 -d $4/../usr/include/linux/raid
+cd ${srctree}/include/linux/raid
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/raid
+done
+install -c -m 0755 -d $4/../usr/include/linux/sunrpc
+cd ${srctree}/include/linux/sunrpc
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/linux/sunrpc
+done
+install -c -m 0755 -d $4/../usr/include/asm
+cd ${srctree}/include/asm
+for i in `find . -name '*.h' -print`; do
+ install -c -m 0644 $i $4/../usr/include/asm
+done
diff --git a/arch/mn10300/boot/tools/build.c b/arch/mn10300/boot/tools/build.c
new file mode 100644
index 00000000000..4f552ead0f8
--- /dev/null
+++ b/arch/mn10300/boot/tools/build.c
@@ -0,0 +1,190 @@
+/*
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ * Copyright (C) 1997 Martin Mares
+ */
+
+/*
+ * This file builds a disk-image from three different files:
+ *
+ * - bootsect: exactly 512 bytes of 8086 machine code, loads the rest
+ * - setup: 8086 machine code, sets up system parm
+ * - system: 80386 code for actual system
+ *
+ * It does some checking that all files are of the correct type, and
+ * just writes the result to stdout, removing headers and padding to
+ * the right amount. It also writes some system data to stderr.
+ */
+
+/*
+ * Changes by tytso to allow root device specification
+ * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
+ * Cross compiling fixes by Gertjan van Wingerde, July 1996
+ * Rewritten by Martin Mares, April 1997
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/sysmacros.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <asm/boot.h>
+
+#define DEFAULT_MAJOR_ROOT 0
+#define DEFAULT_MINOR_ROOT 0
+
+/* Minimal number of setup sectors (see also bootsect.S) */
+#define SETUP_SECTS 4
+
+uint8_t buf[1024];
+int fd;
+int is_big_kernel;
+
+__attribute__((noreturn))
+void die(const char *str, ...)
+{
+ va_list args;
+ va_start(args, str);
+ vfprintf(stderr, str, args);
+ fputc('\n', stderr);
+ exit(1);
+}
+
+void file_open(const char *name)
+{
+ fd = open(name, O_RDONLY, 0);
+ if (fd < 0)
+ die("Unable to open `%s': %m", name);
+}
+
+__attribute__((noreturn))
+void usage(void)
+{
+ die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
+}
+
+int main(int argc, char **argv)
+{
+ unsigned int i, c, sz, setup_sectors;
+ uint32_t sys_size;
+ uint8_t major_root, minor_root;
+ struct stat sb;
+
+ if (argc > 2 && !strcmp(argv[1], "-b")) {
+ is_big_kernel = 1;
+ argc--, argv++;
+ }
+ if ((argc < 4) || (argc > 5))
+ usage();
+ if (argc > 4) {
+ if (!strcmp(argv[4], "CURRENT")) {
+ if (stat("/", &sb)) {
+ perror("/");
+ die("Couldn't stat /");
+ }
+ major_root = major(sb.st_dev);
+ minor_root = minor(sb.st_dev);
+ } else if (strcmp(argv[4], "FLOPPY")) {
+ if (stat(argv[4], &sb)) {
+ perror(argv[4]);
+ die("Couldn't stat root device.");
+ }
+ major_root = major(sb.st_rdev);
+ minor_root = minor(sb.st_rdev);
+ } else {
+ major_root = 0;
+ minor_root = 0;
+ }
+ } else {
+ major_root = DEFAULT_MAJOR_ROOT;
+ minor_root = DEFAULT_MINOR_ROOT;
+ }
+ fprintf(stderr, "Root device is (%d, %d)\n", major_root, minor_root);
+
+ file_open(argv[1]);
+ i = read(fd, buf, sizeof(buf));
+ fprintf(stderr, "Boot sector %d bytes.\n", i);
+ if (i != 512)
+ die("Boot block must be exactly 512 bytes");
+ if (buf[510] != 0x55 || buf[511] != 0xaa)
+ die("Boot block hasn't got boot flag (0xAA55)");
+ buf[508] = minor_root;
+ buf[509] = major_root;
+ if (write(1, buf, 512) != 512)
+ die("Write call failed");
+ close(fd);
+
+ /* Copy the setup code */
+ file_open(argv[2]);
+ for (i = 0; (c = read(fd, buf, sizeof(buf))) > 0; i += c)
+ if (write(1, buf, c) != c)
+ die("Write call failed");
+ if (c != 0)
+ die("read-error on `setup'");
+ close(fd);
+
+ /* Pad unused space with zeros */
+ setup_sectors = (i + 511) / 512;
+ /* for compatibility with ancient versions of LILO. */
+ if (setup_sectors < SETUP_SECTS)
+ setup_sectors = SETUP_SECTS;
+ fprintf(stderr, "Setup is %d bytes.\n", i);
+ memset(buf, 0, sizeof(buf));
+ while (i < setup_sectors * 512) {
+ c = setup_sectors * 512 - i;
+ if (c > sizeof(buf))
+ c = sizeof(buf);
+ if (write(1, buf, c) != c)
+ die("Write call failed");
+ i += c;
+ }
+
+ file_open(argv[3]);
+ if (fstat(fd, &sb))
+ die("Unable to stat `%s': %m", argv[3]);
+ sz = sb.st_size;
+ fprintf(stderr, "System is %d kB\n", sz / 1024);
+ sys_size = (sz + 15) / 16;
+ /* 0x28000*16 = 2.5 MB, conservative estimate for the current maximum */
+ if (sys_size > (is_big_kernel ? 0x28000 : DEF_SYSSIZE))
+ die("System is too big. Try using %smodules.",
+ is_big_kernel ? "" : "bzImage or ");
+ if (sys_size > 0xffff)
+ fprintf(stderr,
+ "warning: kernel is too big for standalone boot "
+ "from floppy\n");
+ while (sz > 0) {
+ int l, n;
+
+ l = (sz > sizeof(buf)) ? sizeof(buf) : sz;
+ n = read(fd, buf, l);
+ if (n != l) {
+ if (n < 0)
+ die("Error reading %s: %m", argv[3]);
+ else
+ die("%s: Unexpected EOF", argv[3]);
+ }
+ if (write(1, buf, l) != l)
+ die("Write failed");
+ sz -= l;
+ }
+ close(fd);
+
+ /* Write sizes to the bootsector */
+ if (lseek(1, 497, SEEK_SET) != 497)
+ die("Output: seek failed");
+ buf[0] = setup_sectors;
+ if (write(1, buf, 1) != 1)
+ die("Write of setup sector count failed");
+ if (lseek(1, 500, SEEK_SET) != 500)
+ die("Output: seek failed");
+ buf[0] = (sys_size & 0xff);
+ buf[1] = ((sys_size >> 8) & 0xff);
+ if (write(1, buf, 2) != 2)
+ die("Write of image length failed");
+
+ return 0;
+}
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig
new file mode 100644
index 00000000000..1fd41ec1dfb
--- /dev/null
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -0,0 +1,73 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TINY_RCU=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+# CONFIG_BLOCK is not set
+CONFIG_PREEMPT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_MN10300_RTC=y
+CONFIG_MN10300_TTYSM_CONSOLE=y
+CONFIG_MN10300_TTYSM0=y
+CONFIG_MN10300_TTYSM1=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_I4=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_SMC91X=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_RTC=y
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_PROC_KCORE=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
diff --git a/arch/mn10300/configs/asb2364_defconfig b/arch/mn10300/configs/asb2364_defconfig
new file mode 100644
index 00000000000..fbb96ae3122
--- /dev/null
+++ b/arch/mn10300/configs/asb2364_defconfig
@@ -0,0 +1,97 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_RELAY=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLOCK is not set
+CONFIG_MN10300_UNIT_ASB2364=y
+CONFIG_PREEMPT=y
+# CONFIG_MN10300_USING_JTAG is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_MN10300_TTYSM_CONSOLE=y
+CONFIG_MN10300_TTYSM0=y
+CONFIG_MN10300_TTYSM0_TIMER2=y
+CONFIG_MN10300_TTYSM1=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_I4=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_SMSC911X=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_PROC_KCORE=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
new file mode 100644
index 00000000000..c68e1680da0
--- /dev/null
+++ b/arch/mn10300/include/asm/Kbuild
@@ -0,0 +1 @@
+include include/asm-generic/Kbuild.asm
diff --git a/arch/mn10300/include/asm/asm-offsets.h b/arch/mn10300/include/asm/asm-offsets.h
new file mode 100644
index 00000000000..d370ee36a18
--- /dev/null
+++ b/arch/mn10300/include/asm/asm-offsets.h
@@ -0,0 +1 @@
+#include <generated/asm-offsets.h>
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
new file mode 100644
index 00000000000..b9a8f846126
--- /dev/null
+++ b/arch/mn10300/include/asm/atomic.h
@@ -0,0 +1,348 @@
+/* MN10300 Atomic counter operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_ATOMIC_H
+#define _ASM_ATOMIC_H
+
+#include <asm/irqflags.h>
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_SMP
+#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+static inline
+unsigned long __xchg(volatile unsigned long *m, unsigned long val)
+{
+ unsigned long status;
+ unsigned long oldval;
+
+ asm volatile(
+ "1: mov %4,(_AAR,%3) \n"
+ " mov (_ADR,%3),%1 \n"
+ " mov %5,(_ADR,%3) \n"
+ " mov (_ADR,%3),%0 \n" /* flush */
+ " mov (_ASR,%3),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=&r"(oldval), "=m"(*m)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(m), "r"(val)
+ : "memory", "cc");
+
+ return oldval;
+}
+
+static inline unsigned long __cmpxchg(volatile unsigned long *m,
+ unsigned long old, unsigned long new)
+{
+ unsigned long status;
+ unsigned long oldval;
+
+ asm volatile(
+ "1: mov %4,(_AAR,%3) \n"
+ " mov (_ADR,%3),%1 \n"
+ " cmp %5,%1 \n"
+ " bne 2f \n"
+ " mov %6,(_ADR,%3) \n"
+ "2: mov (_ADR,%3),%0 \n" /* flush */
+ " mov (_ASR,%3),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=&r"(oldval), "=m"(*m)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(m),
+ "r"(old), "r"(new)
+ : "memory", "cc");
+
+ return oldval;
+}
+#else /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
+#error "No SMP atomic operation support!"
+#endif /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
+
+#else /* CONFIG_SMP */
+
+/*
+ * Emulate xchg for non-SMP MN10300
+ */
+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((struct __xchg_dummy *)(x))
+
+static inline
+unsigned long __xchg(volatile unsigned long *m, unsigned long val)
+{
+ unsigned long oldval;
+ unsigned long flags;
+
+ flags = arch_local_cli_save();
+ oldval = *m;
+ *m = val;
+ arch_local_irq_restore(flags);
+ return oldval;
+}
+
+/*
+ * Emulate cmpxchg for non-SMP MN10300
+ */
+static inline unsigned long __cmpxchg(volatile unsigned long *m,
+ unsigned long old, unsigned long new)
+{
+ unsigned long oldval;
+ unsigned long flags;
+
+ flags = arch_local_cli_save();
+ oldval = *m;
+ if (oldval == old)
+ *m = new;
+ arch_local_irq_restore(flags);
+ return oldval;
+}
+
+#endif /* CONFIG_SMP */
+
+#define xchg(ptr, v) \
+ ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
+ (unsigned long)(v)))
+
+#define cmpxchg(ptr, o, n) \
+ ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n)))
+
+#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
+#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
+
+#endif /* !__ASSEMBLY__ */
+
+#ifndef CONFIG_SMP
+#include <asm-generic/atomic.h>
+#else
+
+/*
+ * Atomic operations that C can't guarantee us. Useful for
+ * resource counting etc..
+ */
+
+#define ATOMIC_INIT(i) { (i) }
+
+#ifdef __KERNEL__
+
+/**
+ * atomic_read - read atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically reads the value of @v. Note that the guaranteed
+ * useful range of an atomic_t is only 24 bits.
+ */
+#define atomic_read(v) (ACCESS_ONCE((v)->counter))
+
+/**
+ * atomic_set - set atomic variable
+ * @v: pointer of type atomic_t
+ * @i: required value
+ *
+ * Atomically sets the value of @v to @i. Note that the guaranteed
+ * useful range of an atomic_t is only 24 bits.
+ */
+#define atomic_set(v, i) (((v)->counter) = (i))
+
+/**
+ * atomic_add_return - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic_t
+ *
+ * Atomically adds @i to @v and returns the result
+ * Note that the guaranteed useful range of an atomic_t is only 24 bits.
+ */
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+ int retval;
+#ifdef CONFIG_SMP
+ int status;
+
+ asm volatile(
+ "1: mov %4,(_AAR,%3) \n"
+ " mov (_ADR,%3),%1 \n"
+ " add %5,%1 \n"
+ " mov %1,(_ADR,%3) \n"
+ " mov (_ADR,%3),%0 \n" /* flush */
+ " mov (_ASR,%3),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=&r"(retval), "=m"(v->counter)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(&v->counter), "r"(i)
+ : "memory", "cc");
+
+#else
+ unsigned long flags;
+
+ flags = arch_local_cli_save();
+ retval = v->counter;
+ retval += i;
+ v->counter = retval;
+ arch_local_irq_restore(flags);
+#endif
+ return retval;
+}
+
+/**
+ * atomic_sub_return - subtract integer from atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically subtracts @i from @v and returns the result
+ * Note that the guaranteed useful range of an atomic_t is only 24 bits.
+ */
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+ int retval;
+#ifdef CONFIG_SMP
+ int status;
+
+ asm volatile(
+ "1: mov %4,(_AAR,%3) \n"
+ " mov (_ADR,%3),%1 \n"
+ " sub %5,%1 \n"
+ " mov %1,(_ADR,%3) \n"
+ " mov (_ADR,%3),%0 \n" /* flush */
+ " mov (_ASR,%3),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=&r"(retval), "=m"(v->counter)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(&v->counter), "r"(i)
+ : "memory", "cc");
+
+#else
+ unsigned long flags;
+ flags = arch_local_cli_save();
+ retval = v->counter;
+ retval -= i;
+ v->counter = retval;
+ arch_local_irq_restore(flags);
+#endif
+ return retval;
+}
+
+static inline int atomic_add_negative(int i, atomic_t *v)
+{
+ return atomic_add_return(i, v) < 0;
+}
+
+static inline void atomic_add(int i, atomic_t *v)
+{
+ atomic_add_return(i, v);
+}
+
+static inline void atomic_sub(int i, atomic_t *v)
+{
+ atomic_sub_return(i, v);
+}
+
+static inline void atomic_inc(atomic_t *v)
+{
+ atomic_add_return(1, v);
+}
+
+static inline void atomic_dec(atomic_t *v)
+{
+ atomic_sub_return(1, v);
+}
+
+#define atomic_dec_return(v) atomic_sub_return(1, (v))
+#define atomic_inc_return(v) atomic_add_return(1, (v))
+
+#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
+#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
+
+#define __atomic_add_unless(v, a, u) \
+({ \
+ int c, old; \
+ c = atomic_read(v); \
+ while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
+ c = old; \
+ c; \
+})
+
+
+/**
+ * atomic_clear_mask - Atomically clear bits in memory
+ * @mask: Mask of the bits to be cleared
+ * @v: pointer to word in memory
+ *
+ * Atomically clears the bits set in mask from the memory word specified.
+ */
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+#ifdef CONFIG_SMP
+ int status;
+
+ asm volatile(
+ "1: mov %3,(_AAR,%2) \n"
+ " mov (_ADR,%2),%0 \n"
+ " and %4,%0 \n"
+ " mov %0,(_ADR,%2) \n"
+ " mov (_ADR,%2),%0 \n" /* flush */
+ " mov (_ASR,%2),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=m"(*addr)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(addr), "r"(~mask)
+ : "memory", "cc");
+#else
+ unsigned long flags;
+
+ mask = ~mask;
+ flags = arch_local_cli_save();
+ *addr &= mask;
+ arch_local_irq_restore(flags);
+#endif
+}
+
+/**
+ * atomic_set_mask - Atomically set bits in memory
+ * @mask: Mask of the bits to be set
+ * @v: pointer to word in memory
+ *
+ * Atomically sets the bits set in mask from the memory word specified.
+ */
+static inline void atomic_set_mask(unsigned long mask, unsigned long *addr)
+{
+#ifdef CONFIG_SMP
+ int status;
+
+ asm volatile(
+ "1: mov %3,(_AAR,%2) \n"
+ " mov (_ADR,%2),%0 \n"
+ " or %4,%0 \n"
+ " mov %0,(_ADR,%2) \n"
+ " mov (_ADR,%2),%0 \n" /* flush */
+ " mov (_ASR,%2),%0 \n"
+ " or %0,%0 \n"
+ " bne 1b \n"
+ : "=&r"(status), "=m"(*addr)
+ : "a"(ATOMIC_OPS_BASE_ADDR), "r"(addr), "r"(mask)
+ : "memory", "cc");
+#else
+ unsigned long flags;
+
+ flags = arch_local_cli_save();
+ *addr |= mask;
+ arch_local_irq_restore(flags);
+#endif
+}
+
+/* Atomic operations are already serializing on MN10300??? */
+#define smp_mb__before_atomic_dec() barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc() barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+#endif /* __KERNEL__ */
+#endif /* CONFIG_SMP */
+#endif /* _ASM_ATOMIC_H */
diff --git a/arch/mn10300/include/asm/auxvec.h b/arch/mn10300/include/asm/auxvec.h
new file mode 100644
index 00000000000..4fdb60b2ae3
--- /dev/null
+++ b/arch/mn10300/include/asm/auxvec.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_AUXVEC_H
+#define _ASM_AUXVEC_H
+
+#endif
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
new file mode 100644
index 00000000000..596bb2706d8
--- /dev/null
+++ b/arch/mn10300/include/asm/bitops.h
@@ -0,0 +1,234 @@
+/* MN10300 bit operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ * These have to be done with inline assembly: that way the bit-setting
+ * is guaranteed to be atomic. All bit operations return 0 if the bit
+ * was cleared before the operation and != 0 if it was not.
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ */
+#ifndef __ASM_BITOPS_H
+#define __ASM_BITOPS_H
+
+#include <asm/cpu-regs.h>
+
+#define smp_mb__before_clear_bit() barrier()
+#define smp_mb__after_clear_bit() barrier()
+
+/*
+ * set bit
+ */
+#define __set_bit(nr, addr) \
+({ \
+ volatile unsigned char *_a = (unsigned char *)(addr); \
+ const unsigned shift = (nr) & 7; \
+ _a += (nr) >> 3; \
+ \
+ asm volatile("bset %2,(%1) # set_bit reg" \
+ : "=m"(*_a) \
+ : "a"(_a), "d"(1 << shift), "m"(*_a) \
+ : "memory", "cc"); \
+})
+
+#define set_bit(nr, addr) __set_bit((nr), (addr))
+
+/*
+ * clear bit
+ */
+#define ___clear_bit(nr, addr) \
+({ \
+ volatile unsigned char *_a = (unsigned char *)(addr); \
+ const unsigned shift = (nr) & 7; \
+ _a += (nr) >> 3; \
+ \
+ asm volatile("bclr %2,(%1) # clear_bit reg" \
+ : "=m"(*_a) \
+ : "a"(_a), "d"(1 << shift), "m"(*_a) \
+ : "memory", "cc"); \
+})
+
+#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
+
+
+static inline void __clear_bit(unsigned long nr, volatile void *addr)
+{
+ unsigned int *a = (unsigned int *) addr;
+ int mask;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ *a &= ~mask;
+}
+
+/*
+ * test bit
+ */
+static inline int test_bit(unsigned long nr, const volatile void *addr)
+{
+ return 1UL & (((const volatile unsigned int *) addr)[nr >> 5] >> (nr & 31));
+}
+
+/*
+ * change bit
+ */
+static inline void __change_bit(unsigned long nr, volatile void *addr)
+{
+ int mask;
+ unsigned int *a = (unsigned int *) addr;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ *a ^= mask;
+}
+
+extern void change_bit(unsigned long nr, volatile void *addr);
+
+/*
+ * test and set bit
+ */
+#define __test_and_set_bit(nr,addr) \
+({ \
+ volatile unsigned char *_a = (unsigned char *)(addr); \
+ const unsigned shift = (nr) & 7; \
+ unsigned epsw; \
+ _a += (nr) >> 3; \
+ \
+ asm volatile("bset %3,(%2) # test_set_bit reg\n" \
+ "mov epsw,%1" \
+ : "=m"(*_a), "=d"(epsw) \
+ : "a"(_a), "d"(1 << shift), "m"(*_a) \
+ : "memory", "cc"); \
+ \
+ !(epsw & EPSW_FLAG_Z); \
+})
+
+#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
+
+/*
+ * test and clear bit
+ */
+#define __test_and_clear_bit(nr, addr) \
+({ \
+ volatile unsigned char *_a = (unsigned char *)(addr); \
+ const unsigned shift = (nr) & 7; \
+ unsigned epsw; \
+ _a += (nr) >> 3; \
+ \
+ asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
+ "mov epsw,%1" \
+ : "=m"(*_a), "=d"(epsw) \
+ : "a"(_a), "d"(1 << shift), "m"(*_a) \
+ : "memory", "cc"); \
+ \
+ !(epsw & EPSW_FLAG_Z); \
+})
+
+#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
+
+/*
+ * test and change bit
+ */
+static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
+{
+ int mask, retval;
+ unsigned int *a = (unsigned int *)addr;
+
+ a += nr >> 5;
+ mask = 1 << (nr & 0x1f);
+ retval = (mask & *a) != 0;
+ *a ^= mask;
+
+ return retval;
+}
+
+extern int test_and_change_bit(unsigned long nr, volatile void *addr);
+
+#include <asm-generic/bitops/lock.h>
+
+#ifdef __KERNEL__
+
+/**
+ * __ffs - find first bit set
+ * @x: the word to search
+ *
+ * - return 31..0 to indicate bit 31..0 most least significant bit set
+ * - if no bits are set in x, the result is undefined
+ */
+static inline __attribute__((const))
+unsigned long __ffs(unsigned long x)
+{
+ int bit;
+ asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
+ return bit;
+}
+
+/*
+ * special slimline version of fls() for calculating ilog2_u32()
+ * - note: no protection against n == 0
+ */
+static inline __attribute__((const))
+int __ilog2_u32(u32 n)
+{
+ int bit;
+ asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
+ return bit;
+}
+
+/**
+ * fls - find last bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as ffs:
+ * - return 32..1 to indicate bit 31..0 most significant bit set
+ * - return 0 to indicate no bits set
+ */
+static inline __attribute__((const))
+int fls(int x)
+{
+ return (x != 0) ? __ilog2_u32(x) + 1 : 0;
+}
+
+/**
+ * __fls - find last (most-significant) set bit in a long word
+ * @word: the word to search
+ *
+ * Undefined if no set bit exists, so code should check against 0 first.
+ */
+static inline unsigned long __fls(unsigned long word)
+{
+ return __ilog2_u32(word);
+}
+
+/**
+ * ffs - find first bit set
+ * @x: the word to search
+ *
+ * - return 32..1 to indicate bit 31..0 most least significant bit set
+ * - return 0 to indicate no bits set
+ */
+static inline __attribute__((const))
+int ffs(int x)
+{
+ /* Note: (x & -x) gives us a mask that is the least significant
+ * (rightmost) 1-bit of the value in x.
+ */
+ return fls(x & -x);
+}
+
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/find.h>
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/ext2-atomic-setbit.h>
+#include <asm-generic/bitops/le.h>
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_BITOPS_H */
diff --git a/arch/mn10300/include/asm/bitsperlong.h b/arch/mn10300/include/asm/bitsperlong.h
new file mode 100644
index 00000000000..6dc0bb0c13b
--- /dev/null
+++ b/arch/mn10300/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/mn10300/include/asm/bug.h b/arch/mn10300/include/asm/bug.h
new file mode 100644
index 00000000000..aa6a3888639
--- /dev/null
+++ b/arch/mn10300/include/asm/bug.h
@@ -0,0 +1,37 @@
+/* MN10300 Kernel bug reporting
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BUG_H
+#define _ASM_BUG_H
+
+#ifdef CONFIG_BUG
+
+/*
+ * Tell the user there is some problem.
+ */
+#define BUG() \
+do { \
+ asm volatile( \
+ " syscall 15 \n" \
+ "0: \n" \
+ " .section __bug_table,\"a\" \n" \
+ " .long 0b,%0,%1 \n" \
+ " .previous \n" \
+ : \
+ : "i"(__FILE__), "i"(__LINE__) \
+ ); \
+} while (1)
+
+#define HAVE_ARCH_BUG
+#endif /* CONFIG_BUG */
+
+#include <asm-generic/bug.h>
+
+#endif /* _ASM_BUG_H */
diff --git a/arch/mn10300/include/asm/bugs.h b/arch/mn10300/include/asm/bugs.h
new file mode 100644
index 00000000000..31c8bc592b4
--- /dev/null
+++ b/arch/mn10300/include/asm/bugs.h
@@ -0,0 +1,20 @@
+/* MN10300 Checks for architecture-dependent bugs
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BUGS_H
+#define _ASM_BUGS_H
+
+#include <asm/processor.h>
+
+static inline void __init check_bugs(void)
+{
+}
+
+#endif /* _ASM_BUGS_H */
diff --git a/arch/mn10300/include/asm/busctl-regs.h b/arch/mn10300/include/asm/busctl-regs.h
new file mode 100644
index 00000000000..1632aef7340
--- /dev/null
+++ b/arch/mn10300/include/asm/busctl-regs.h
@@ -0,0 +1,151 @@
+/* AM33v2 on-board bus controller registers
+ *
+ * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_BUSCTL_REGS_H
+#define _ASM_BUSCTL_REGS_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+
+/* bus controller registers */
+#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
+#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
+#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
+#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
+#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
+#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
+#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
+#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
+#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
+#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
+#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
+#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
+#define BCCR_API 0x00070000 /* bus arbitration priority */
+#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
+#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
+#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
+#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
+#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
+#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
+#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
+#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
+#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
+#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
+#define BCCR_TMON 0x03000000 /* timeout value settings */
+#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
+#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
+#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
+#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
+#define BCCR_TMOE 0x10000000 /* timeout detection enable */
+
+#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
+#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
+#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
+#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
+#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
+#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
+#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
+#define BCBERR_BERW 0x00000100 /* type of access */
+#define BCBERR_BERW_WRITE 0x00000000 /* - write */
+#define BCBERR_BERW_READ 0x00000100 /* - read */
+#define BCBERR_BESD 0x00000200 /* error detector */
+#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
+#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
+#define BCBERR_BEBST 0x00000400 /* type of access */
+#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
+#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
+#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
+#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
+#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
+#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
+#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
+#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
+
+#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
+
+/* system bus controller registers */
+#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
+#define SBBASE_BE 0x00000001 /* bank enable */
+#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
+#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
+
+#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
+#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
+#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
+#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
+#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
+#define SBCNTRL0_DAH 0x0f000000 /* data hold */
+#define SBCNTRL0_ADH 0xf0000000 /* address hold */
+
+#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
+#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
+#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
+#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
+#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
+#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
+#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
+
+#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
+#define SBCNTRL2_WC 0x000000ff /* wait count */
+#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
+#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
+#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
+#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
+#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
+#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
+#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
+#define SBCNTRL2_BW 0x04000000 /* bus width */
+#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
+#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
+#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
+#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
+#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
+#define SBCNTRL2_BT 0x70000000 /* bus type setting */
+#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
+#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
+#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
+#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
+
+/* memory bus controller */
+#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
+#define SDBASE_CE 0x00000001 /* chip enable */
+#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
+#define SDBASE_CBAM_SHIFT 16
+#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
+
+#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
+#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
+#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
+#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
+#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
+#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
+#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
+#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
+#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
+#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
+#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
+#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
+#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
+#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
+#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
+#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
+#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
+#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
+
+#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
+#define SDREFCNT_PERI 0x00000fff /* refresh period */
+
+#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/byteorder.h b/arch/mn10300/include/asm/byteorder.h
new file mode 100644
index 00000000000..5dd0bdd9fee
--- /dev/null
+++ b/arch/mn10300/include/asm/byteorder.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_BYTEORDER_H
+#define _ASM_BYTEORDER_H
+
+#include <linux/byteorder/little_endian.h>
+
+#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
new file mode 100644
index 00000000000..f29cde2cfc9
--- /dev/null
+++ b/arch/mn10300/include/asm/cache.h
@@ -0,0 +1,60 @@
+/* MN10300 cache management registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_CACHE_H
+#define _ASM_CACHE_H
+
+#include <asm/cpu-regs.h>
+#include <proc/cache.h>
+
+#ifndef __ASSEMBLY__
+#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
+#else
+#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
+#endif
+
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
+/* data cache purge registers
+ * - read from the register to unconditionally purge that cache line
+ * - write address & 0xffffff00 to conditionally purge that cache line
+ * - clear LSB to request invalidation as well
+ */
+#define DCACHE_PURGE(WAY, ENTRY) \
+ __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
+ (ENTRY) * L1_CACHE_BYTES, u32)
+
+#define DCACHE_PURGE_WAY0(ENTRY) \
+ __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY1(ENTRY) \
+ __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY2(ENTRY) \
+ __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY3(ENTRY) \
+ __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+
+/* instruction cache access registers */
+#define ICACHE_DATA(WAY, ENTRY, OFF) \
+ __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + \
+ (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
+#define ICACHE_TAG(WAY, ENTRY) \
+ __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + \
+ (ENTRY) * L1_CACHE_BYTES, u32)
+
+/* data cache access registers */
+#define DCACHE_DATA(WAY, ENTRY, OFF) \
+ __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + \
+ (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
+#define DCACHE_TAG(WAY, ENTRY) \
+ __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + \
+ (ENTRY) * L1_CACHE_BYTES, u32)
+
+#endif /* _ASM_CACHE_H */
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h
new file mode 100644
index 00000000000..faed90240de
--- /dev/null
+++ b/arch/mn10300/include/asm/cacheflush.h
@@ -0,0 +1,171 @@
+/* MN10300 Cache flushing
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CACHEFLUSH_H
+#define _ASM_CACHEFLUSH_H
+
+#ifndef __ASSEMBLY__
+
+/* Keep includes the same across arches. */
+#include <linux/mm.h>
+
+/*
+ * Primitive routines
+ */
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+extern void mn10300_local_icache_inv(void);
+extern void mn10300_local_icache_inv_page(unsigned long start);
+extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size);
+extern void mn10300_local_dcache_inv(void);
+extern void mn10300_local_dcache_inv_page(unsigned long start);
+extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size);
+extern void mn10300_icache_inv(void);
+extern void mn10300_icache_inv_page(unsigned long start);
+extern void mn10300_icache_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size);
+extern void mn10300_dcache_inv(void);
+extern void mn10300_dcache_inv_page(unsigned long start);
+extern void mn10300_dcache_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_dcache_inv_range2(unsigned long start, unsigned long size);
+#ifdef CONFIG_MN10300_CACHE_WBACK
+extern void mn10300_local_dcache_flush(void);
+extern void mn10300_local_dcache_flush_page(unsigned long start);
+extern void mn10300_local_dcache_flush_range(unsigned long start, unsigned long end);
+extern void mn10300_local_dcache_flush_range2(unsigned long start, unsigned long size);
+extern void mn10300_local_dcache_flush_inv(void);
+extern void mn10300_local_dcache_flush_inv_page(unsigned long start);
+extern void mn10300_local_dcache_flush_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_local_dcache_flush_inv_range2(unsigned long start, unsigned long size);
+extern void mn10300_dcache_flush(void);
+extern void mn10300_dcache_flush_page(unsigned long start);
+extern void mn10300_dcache_flush_range(unsigned long start, unsigned long end);
+extern void mn10300_dcache_flush_range2(unsigned long start, unsigned long size);
+extern void mn10300_dcache_flush_inv(void);
+extern void mn10300_dcache_flush_inv_page(unsigned long start);
+extern void mn10300_dcache_flush_inv_range(unsigned long start, unsigned long end);
+extern void mn10300_dcache_flush_inv_range2(unsigned long start, unsigned long size);
+#else
+#define mn10300_local_dcache_flush() do {} while (0)
+#define mn10300_local_dcache_flush_page(start) do {} while (0)
+#define mn10300_local_dcache_flush_range(start, end) do {} while (0)
+#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)
+#define mn10300_local_dcache_flush_inv() \
+ mn10300_local_dcache_inv()
+#define mn10300_local_dcache_flush_inv_page(start) \
+ mn10300_local_dcache_inv_page(start)
+#define mn10300_local_dcache_flush_inv_range(start, end) \
+ mn10300_local_dcache_inv_range(start, end)
+#define mn10300_local_dcache_flush_inv_range2(start, size) \
+ mn10300_local_dcache_inv_range2(start, size)
+#define mn10300_dcache_flush() do {} while (0)
+#define mn10300_dcache_flush_page(start) do {} while (0)
+#define mn10300_dcache_flush_range(start, end) do {} while (0)
+#define mn10300_dcache_flush_range2(start, size) do {} while (0)
+#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
+#define mn10300_dcache_flush_inv_page(start) \
+ mn10300_dcache_inv_page((start))
+#define mn10300_dcache_flush_inv_range(start, end) \
+ mn10300_dcache_inv_range((start), (end))
+#define mn10300_dcache_flush_inv_range2(start, size) \
+ mn10300_dcache_inv_range2((start), (size))
+#endif /* CONFIG_MN10300_CACHE_WBACK */
+#else
+#define mn10300_local_icache_inv() do {} while (0)
+#define mn10300_local_icache_inv_page(start) do {} while (0)
+#define mn10300_local_icache_inv_range(start, end) do {} while (0)
+#define mn10300_local_icache_inv_range2(start, size) do {} while (0)
+#define mn10300_local_dcache_inv() do {} while (0)
+#define mn10300_local_dcache_inv_page(start) do {} while (0)
+#define mn10300_local_dcache_inv_range(start, end) do {} while (0)
+#define mn10300_local_dcache_inv_range2(start, size) do {} while (0)
+#define mn10300_local_dcache_flush() do {} while (0)
+#define mn10300_local_dcache_flush_inv_page(start) do {} while (0)
+#define mn10300_local_dcache_flush_inv() do {} while (0)
+#define mn10300_local_dcache_flush_inv_range(start, end)do {} while (0)
+#define mn10300_local_dcache_flush_inv_range2(start, size) do {} while (0)
+#define mn10300_local_dcache_flush_page(start) do {} while (0)
+#define mn10300_local_dcache_flush_range(start, end) do {} while (0)
+#define mn10300_local_dcache_flush_range2(start, size) do {} while (0)
+#define mn10300_icache_inv() do {} while (0)
+#define mn10300_icache_inv_page(start) do {} while (0)
+#define mn10300_icache_inv_range(start, end) do {} while (0)
+#define mn10300_icache_inv_range2(start, size) do {} while (0)
+#define mn10300_dcache_inv() do {} while (0)
+#define mn10300_dcache_inv_page(start) do {} while (0)
+#define mn10300_dcache_inv_range(start, end) do {} while (0)
+#define mn10300_dcache_inv_range2(start, size) do {} while (0)
+#define mn10300_dcache_flush() do {} while (0)
+#define mn10300_dcache_flush_inv_page(start) do {} while (0)
+#define mn10300_dcache_flush_inv() do {} while (0)
+#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
+#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
+#define mn10300_dcache_flush_page(start) do {} while (0)
+#define mn10300_dcache_flush_range(start, end) do {} while (0)
+#define mn10300_dcache_flush_range2(start, size) do {} while (0)
+#endif /* CONFIG_MN10300_CACHE_ENABLED */
+
+/*
+ * Virtually-indexed cache management (our cache is physically indexed)
+ */
+#define flush_cache_all() do {} while (0)
+#define flush_cache_mm(mm) do {} while (0)
+#define flush_cache_dup_mm(mm) do {} while (0)
+#define flush_cache_range(mm, start, end) do {} while (0)
+#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
+#define flush_cache_vmap(start, end) do {} while (0)
+#define flush_cache_vunmap(start, end) do {} while (0)
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
+#define flush_dcache_page(page) do {} while (0)
+#define flush_dcache_mmap_lock(mapping) do {} while (0)
+#define flush_dcache_mmap_unlock(mapping) do {} while (0)
+
+/*
+ * Physically-indexed cache management
+ */
+#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE)
+extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
+extern void flush_icache_range(unsigned long start, unsigned long end);
+#elif defined(CONFIG_MN10300_CACHE_INV_ICACHE)
+static inline void flush_icache_page(struct vm_area_struct *vma,
+ struct page *page)
+{
+ mn10300_icache_inv_page(page_to_phys(page));
+}
+extern void flush_icache_range(unsigned long start, unsigned long end);
+#else
+#define flush_icache_range(start, end) do {} while (0)
+#define flush_icache_page(vma, pg) do {} while (0)
+#endif
+
+
+#define flush_icache_user_range(vma, pg, adr, len) \
+ flush_icache_range(adr, adr + len)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+ do { \
+ memcpy(dst, src, len); \
+ flush_icache_page(vma, page); \
+ } while (0)
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+ memcpy(dst, src, len)
+
+/*
+ * Internal debugging function
+ */
+#ifdef CONFIG_DEBUG_PAGEALLOC
+extern void kernel_map_pages(struct page *page, int numpages, int enable);
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/mn10300/include/asm/checksum.h b/arch/mn10300/include/asm/checksum.h
new file mode 100644
index 00000000000..9fb2a8d8826
--- /dev/null
+++ b/arch/mn10300/include/asm/checksum.h
@@ -0,0 +1,86 @@
+/* MN10300 Optimised checksumming code
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CHECKSUM_H
+#define _ASM_CHECKSUM_H
+
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
+ int len, __wsum sum);
+extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
+ int len, __wsum sum,
+ int *err_ptr);
+extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+extern __sum16 ip_compute_csum(const void *buff, int len);
+
+#define csum_partial_copy_fromuser csum_partial_copy
+extern __wsum csum_partial_copy(const void *src, void *dst, int len,
+ __wsum sum);
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+ asm(
+ " add %1,%0 \n"
+ " addc 0xffff,%0 \n"
+ : "=r" (sum)
+ : "r" (sum << 16), "0" (sum & 0xffff0000)
+ : "cc"
+ );
+ return (~sum) >> 16;
+}
+
+static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
+ unsigned long daddr,
+ unsigned short len,
+ unsigned short proto,
+ __wsum sum)
+{
+ __wsum tmp;
+
+ tmp = (__wsum) ntohs(len) << 16;
+ tmp += (__wsum) proto << 8;
+
+ asm(
+ " add %1,%0 \n"
+ " addc %2,%0 \n"
+ " addc %3,%0 \n"
+ " addc 0,%0 \n"
+ : "=r" (sum)
+ : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
+ : "cc"
+ );
+ return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
+ unsigned long daddr,
+ unsigned short len,
+ unsigned short proto,
+ __wsum sum)
+{
+ return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
+}
+
+#undef _HAVE_ARCH_IPV6_CSUM
+
+/*
+ * Copy and checksum to user
+ */
+#define HAVE_CSUM_COPY_USER
+extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
+ __wsum sum, int *err_ptr);
+
+
+#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h
new file mode 100644
index 00000000000..c54effae220
--- /dev/null
+++ b/arch/mn10300/include/asm/cpu-regs.h
@@ -0,0 +1,353 @@
+/* MN10300 Core system registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CPU_REGS_H
+#define _ASM_CPU_REGS_H
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#endif
+
+/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
+ * the FP regs, but tell the assembler that we're actually allowed AM33v2
+ * instructions */
+#ifndef __ASSEMBLY__
+asm(" .am33_2\n");
+#else
+.am33_2
+#endif
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
+#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
+#else
+#define __SYSREG(ADDR, TYPE) ADDR
+#define __SYSREGC(ADDR, TYPE) ADDR
+#endif
+
+/* CPU registers */
+#define EPSW_FLAG_Z 0x00000001 /* zero flag */
+#define EPSW_FLAG_N 0x00000002 /* negative flag */
+#define EPSW_FLAG_C 0x00000004 /* carry flag */
+#define EPSW_FLAG_V 0x00000008 /* overflow flag */
+#define EPSW_IM 0x00000700 /* interrupt mode */
+#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
+#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
+#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
+#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
+#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
+#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
+#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
+#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
+#define EPSW_IE 0x00000800 /* interrupt enable */
+#define EPSW_S 0x00003000 /* software auxiliary bits */
+#define EPSW_T 0x00008000 /* trace enable */
+#define EPSW_nSL 0x00010000 /* not supervisor level */
+#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
+#define EPSW_nAR 0x00040000 /* register bank control */
+#define EPSW_ML 0x00080000 /* monitor level */
+#define EPSW_FE 0x00100000 /* FPU enable */
+#define EPSW_IM_SHIFT 8 /* EPSW_IM_SHIFT determines the interrupt mode */
+
+#define NUM2EPSW_IM(num) ((num) << EPSW_IM_SHIFT)
+
+/* FPU registers */
+#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
+#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
+#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
+#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
+#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
+#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
+#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
+#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
+#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
+#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
+#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
+#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
+#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
+#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
+#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
+#define FPCR_RM 0x00030000 /* rounding mode */
+#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
+#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
+#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
+#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
+#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
+#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
+
+/* CPU control registers */
+#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
+#define CPUP_DWBD 0x0020 /* write buffer disable flag */
+#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
+#define CPUP_EXM 0x0080 /* exception operation mode */
+#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
+#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
+
+#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
+#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
+#define CPUM_HALT 0x0008 /* set to enter halt state */
+#define CPUM_STOP 0x0010 /* set to enter stop state */
+
+#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
+#define CPUREV_TYPE 0x0000000f /* CPU type */
+#define CPUREV_TYPE_S 0
+#define CPUREV_TYPE_AM33_1 0x00000000 /* - AM33-1 core, AM33/1.00 arch */
+#define CPUREV_TYPE_AM33_2 0x00000001 /* - AM33-2 core, AM33/2.00 arch */
+#define CPUREV_TYPE_AM34_1 0x00000002 /* - AM34-1 core, AM33/2.00 arch */
+#define CPUREV_TYPE_AM33_3 0x00000003 /* - AM33-3 core, AM33/2.00 arch */
+#define CPUREV_TYPE_AM34_2 0x00000004 /* - AM34-2 core, AM33/3.00 arch */
+#define CPUREV_REVISION 0x000000f0 /* CPU revision */
+#define CPUREV_REVISION_S 4
+#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
+#define CPUREV_ICWAY_S 8
+#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
+#define CPUREV_ICSIZE_S 12
+#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
+#define CPUREV_DCWAY_S 16
+#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
+#define CPUREV_DCSIZE_S 20
+#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
+#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
+#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
+
+#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
+
+/* interrupt/exception control registers */
+#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
+#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
+#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
+#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
+#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
+#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
+#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
+
+#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
+#define TBR_TB 0xff000000 /* table base address bits 31-24 */
+#define TBR_INT_CODE 0x00ffffff /* interrupt code */
+
+#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
+
+#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
+#define sISR_IRQICE 0x00000001 /* ICE interrupt */
+#define sISR_ISTEP 0x00000002 /* single step interrupt */
+#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
+#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
+#define sISR_PIEXE 0x00000010 /* program interrupt */
+#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
+#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
+#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
+#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
+#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
+#define sISR_OBREAK 0x00000400 /* operand break interrupt */
+#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
+#define sISR_BUSERR 0x00001000 /* bus error fault */
+#define sISR_DBLFT 0x00002000 /* double fault */
+#define sISR_DBG 0x00008000 /* debug reserved interrupt */
+#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
+#define sISR_DTMISS 0x00020000 /* data TLB miss */
+#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
+#define sISR_DTEX 0x00080000 /* data TLB access exception */
+#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
+#define sISR_ILGDA 0x00200000 /* illegal data access exception */
+#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
+#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
+#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
+#define sISR_DISA 0x02000000 /* data space instruction access excep */
+#define sISR_SYSC 0x04000000 /* system call instruction excep */
+#define sISR_FPUD 0x08000000 /* FPU disabled excep */
+#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
+#define sISR_FPUOP 0x20000000 /* FPU operation excep */
+#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
+
+/* cache control registers */
+#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
+#define CHCTR_ICEN 0x0001 /* instruction cache enable */
+#define CHCTR_DCEN 0x0002 /* data cache enable */
+#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
+#define CHCTR_DCBUSY 0x0008 /* data cache busy */
+#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
+#define CHCTR_DCINV 0x0020 /* data cache invalidate */
+#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
+#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
+#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
+#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
+#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
+#define CHCTR_DCWMD 0xf000 /* data cache way mode */
+
+#ifdef CONFIG_AM34_2
+#define ICIVCR __SYSREG(0xc0000c00, u32) /* icache area invalidate control */
+#define ICIVCR_ICIVBSY 0x00000008 /* icache area invalidate busy */
+#define ICIVCR_ICI 0x00000001 /* icache area invalidate */
+
+#define ICIVMR __SYSREG(0xc0000c04, u32) /* icache area invalidate mask */
+
+#define DCPGCR __SYSREG(0xc0000c10, u32) /* data cache area purge control */
+#define DCPGCR_DCPGBSY 0x00000008 /* data cache area purge busy */
+#define DCPGCR_DCP 0x00000002 /* data cache area purge */
+#define DCPGCR_DCI 0x00000001 /* data cache area invalidate */
+
+#define DCPGMR __SYSREG(0xc0000c14, u32) /* data cache area purge mask */
+#endif /* CONFIG_AM34_2 */
+
+/* MMU control registers */
+#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
+#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
+#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
+#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
+#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
+#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
+#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
+#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
+#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
+#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
+#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
+#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
+#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
+#define MMUCTR_DTE 0x00400000 /* data TLB enable */
+#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
+#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
+#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
+#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
+#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
+#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
+#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
+#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
+#ifdef CONFIG_AM34_2
+#define MMUCTR_WTE 0x80000000 /* write-through cache TLB entry bit enable */
+#endif
+
+#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
+#define PIDR_PID 0x00ff /* process identifier */
+
+#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
+
+#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
+#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
+#define xPTEL_V 0x00000001 /* TLB entry valid */
+#define xPTEL_UNUSED1 0x00000002 /* unused bit */
+#define xPTEL_UNUSED2 0x00000004 /* unused bit */
+#define xPTEL_C 0x00000008 /* cached if set */
+#define xPTEL_PV 0x00000010 /* page valid */
+#define xPTEL_D 0x00000020 /* dirty */
+#define xPTEL_PR 0x000001c0 /* page protection */
+#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
+#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
+#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
+#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
+#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
+#define xPTEL_G 0x00000200 /* global (use PID if 0) */
+#define xPTEL_PS 0x00000c00 /* page size */
+#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
+#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
+#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
+#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
+#define xPTEL_PPN 0xfffff006 /* physical page number */
+
+#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
+#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
+#define xPTEU_VPN 0xfffffc00 /* virtual page number */
+#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
+
+#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
+#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
+#define xPTEL2_V 0x00000001 /* TLB entry valid */
+#define xPTEL2_C 0x00000002 /* cacheable */
+#define xPTEL2_PV 0x00000004 /* page valid */
+#define xPTEL2_D 0x00000008 /* dirty */
+#define xPTEL2_PR 0x00000070 /* page protection */
+#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
+#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
+#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
+#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
+#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
+#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
+#define xPTEL2_PS 0x00000300 /* page size */
+#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
+#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
+#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
+#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
+#define xPTEL2_CWT 0x00000400 /* cacheable write-through */
+#define xPTEL2_UNUSED1 0x00000800 /* unused bit (broadcast mask) */
+#define xPTEL2_PPN 0xfffff000 /* physical page number */
+
+#define xPTEL2_V_BIT 0 /* bit numbers corresponding to above masks */
+#define xPTEL2_C_BIT 1
+#define xPTEL2_PV_BIT 2
+#define xPTEL2_D_BIT 3
+#define xPTEL2_G_BIT 7
+#define xPTEL2_UNUSED1_BIT 11
+
+#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
+#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
+#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
+#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
+#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
+#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
+#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
+#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
+#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
+#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
+#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
+#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
+#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
+#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
+#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
+#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
+#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
+#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
+#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
+#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
+
+#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+/* atomic operation registers */
+#define AAR __SYSREG(0xc0000a00, u32) /* cacheable address */
+#define AAR2 __SYSREG(0xc0000a04, u32) /* uncacheable address */
+#define ADR __SYSREG(0xc0000a08, u32) /* data */
+#define ASR __SYSREG(0xc0000a0c, u32) /* status */
+#define AARU __SYSREG(0xd400aa00, u32) /* user address */
+#define ADRU __SYSREG(0xd400aa08, u32) /* user data */
+#define ASRU __SYSREG(0xd400aa0c, u32) /* user status */
+
+#define ASR_RW 0x00000008 /* read */
+#define ASR_BW 0x00000004 /* bus error */
+#define ASR_IW 0x00000002 /* interrupt */
+#define ASR_LW 0x00000001 /* bus lock */
+
+#define ASRU_RW ASR_RW /* read */
+#define ASRU_BW ASR_BW /* bus error */
+#define ASRU_IW ASR_IW /* interrupt */
+#define ASRU_LW ASR_LW /* bus lock */
+
+/* in inline ASM, we stick the base pointer in to a reg and use offsets from
+ * it */
+#define ATOMIC_OPS_BASE_ADDR 0xc0000a00
+#ifndef __ASSEMBLY__
+asm(
+ "_AAR = 0\n"
+ "_AAR2 = 4\n"
+ "_ADR = 8\n"
+ "_ASR = 12\n");
+#else
+#define _AAR 0
+#define _AAR2 4
+#define _ADR 8
+#define _ASR 12
+#endif
+
+/* physical page address for userspace atomic operations registers */
+#define USER_ATOMIC_OPS_PAGE_ADDR 0xd400a000
+
+#endif /* CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_CPU_REGS_H */
diff --git a/arch/mn10300/include/asm/cputime.h b/arch/mn10300/include/asm/cputime.h
new file mode 100644
index 00000000000..6d68ad7e0ea
--- /dev/null
+++ b/arch/mn10300/include/asm/cputime.h
@@ -0,0 +1 @@
+#include <asm-generic/cputime.h>
diff --git a/arch/mn10300/include/asm/current.h b/arch/mn10300/include/asm/current.h
new file mode 100644
index 00000000000..ca6027d8374
--- /dev/null
+++ b/arch/mn10300/include/asm/current.h
@@ -0,0 +1,37 @@
+/* MN10300 Current task structure accessor
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CURRENT_H
+#define _ASM_CURRENT_H
+
+#include <linux/thread_info.h>
+
+/*
+ * dedicate E2 to keeping the current task pointer
+ */
+#ifdef CONFIG_MN10300_CURRENT_IN_E2
+
+register struct task_struct *const current asm("e2") __attribute__((used));
+
+#define get_current() current
+
+extern struct task_struct *__current;
+
+#else
+static inline __attribute__((const))
+struct task_struct *get_current(void)
+{
+ return current_thread_info()->task;
+}
+
+#define current get_current()
+#endif
+
+#endif /* _ASM_CURRENT_H */
diff --git a/arch/mn10300/include/asm/debugger.h b/arch/mn10300/include/asm/debugger.h
new file mode 100644
index 00000000000..e1d3b083696
--- /dev/null
+++ b/arch/mn10300/include/asm/debugger.h
@@ -0,0 +1,43 @@
+/* Kernel debugger for MN10300
+ *
+ * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_DEBUGGER_H
+#define _ASM_DEBUGGER_H
+
+#if defined(CONFIG_KERNEL_DEBUGGER)
+
+extern int debugger_intercept(enum exception_code, int, int, struct pt_regs *);
+extern int at_debugger_breakpoint(struct pt_regs *);
+
+#ifndef CONFIG_MN10300_DEBUGGER_CACHE_NO_FLUSH
+extern void debugger_local_cache_flushinv(void);
+extern void debugger_local_cache_flushinv_one(u8 *);
+#else
+static inline void debugger_local_cache_flushinv(void) {}
+static inline void debugger_local_cache_flushinv_one(u8 *addr) {}
+#endif
+
+#else /* CONFIG_KERNEL_DEBUGGER */
+
+static inline int debugger_intercept(enum exception_code excep,
+ int signo, int si_code,
+ struct pt_regs *regs)
+{
+ return 0;
+}
+
+static inline int at_debugger_breakpoint(struct pt_regs *regs)
+{
+ return 0;
+}
+
+#endif /* CONFIG_KERNEL_DEBUGGER */
+#endif /* _ASM_DEBUGGER_H */
diff --git a/arch/mn10300/include/asm/delay.h b/arch/mn10300/include/asm/delay.h
new file mode 100644
index 00000000000..34517b35939
--- /dev/null
+++ b/arch/mn10300/include/asm/delay.h
@@ -0,0 +1,19 @@
+/* MN10300 Uninterruptible delay routines
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DELAY_H
+#define _ASM_DELAY_H
+
+extern void __udelay(unsigned long usecs);
+extern void __delay(unsigned long loops);
+
+#define udelay(n) __udelay(n)
+
+#endif /* _ASM_DELAY_H */
diff --git a/arch/mn10300/include/asm/device.h b/arch/mn10300/include/asm/device.h
new file mode 100644
index 00000000000..f0a4c256403
--- /dev/null
+++ b/arch/mn10300/include/asm/device.h
@@ -0,0 +1 @@
+#include <asm-generic/device.h>
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
new file mode 100644
index 00000000000..503efab2a51
--- /dev/null
+++ b/arch/mn10300/include/asm/div64.h
@@ -0,0 +1,115 @@
+/* MN10300 64-bit division
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DIV64
+#define _ASM_DIV64
+
+#include <linux/types.h>
+
+extern void ____unhandled_size_in_do_div___(void);
+
+/*
+ * Beginning with gcc 4.6, the MDR register is represented explicitly. We
+ * must, therefore, at least explicitly clobber the register when we make
+ * changes to it. The following assembly fragments *could* be rearranged in
+ * order to leave the moves to/from the MDR register to the compiler, but the
+ * gains would be minimal at best.
+ */
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
+# define CLOBBER_MDR_CC "mdr", "cc"
+#else
+# define CLOBBER_MDR_CC "cc"
+#endif
+
+/*
+ * divide n by base, leaving the result in n and returning the remainder
+ * - we can do this quite efficiently on the MN10300 by cascading the divides
+ * through the MDR register
+ */
+#define do_div(n, base) \
+({ \
+ unsigned __rem = 0; \
+ if (sizeof(n) <= 4) { \
+ asm("mov %1,mdr \n" \
+ "divu %2,%0 \n" \
+ "mov mdr,%1 \n" \
+ : "+r"(n), "=d"(__rem) \
+ : "r"(base), "1"(__rem) \
+ : CLOBBER_MDR_CC \
+ ); \
+ } else if (sizeof(n) <= 8) { \
+ union { \
+ unsigned long long l; \
+ u32 w[2]; \
+ } __quot; \
+ __quot.l = n; \
+ asm("mov %0,mdr \n" /* MDR = 0 */ \
+ "divu %3,%1 \n" \
+ /* __quot.MSL = __div.MSL / base, */ \
+ /* MDR = MDR:__div.MSL % base */ \
+ "divu %3,%2 \n" \
+ /* __quot.LSL = MDR:__div.LSL / base, */ \
+ /* MDR = MDR:__div.LSL % base */ \
+ "mov mdr,%0 \n" \
+ : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
+ : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
+ "2"(__quot.w[0]) \
+ : CLOBBER_MDR_CC \
+ ); \
+ n = __quot.l; \
+ } else { \
+ ____unhandled_size_in_do_div___(); \
+ } \
+ __rem; \
+})
+
+/*
+ * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
+ * so as not to lose accuracy
+ * - we use the MDR register to hold the MSW of the product
+ */
+static inline __attribute__((const))
+unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
+{
+ unsigned result;
+
+ asm("mulu %2,%0 \n" /* MDR:val = val*mult */
+ "divu %3,%0 \n" /* val = MDR:val/div;
+ * MDR = MDR:val%div */
+ : "=r"(result)
+ : "0"(val), "ir"(mult), "r"(div)
+ : CLOBBER_MDR_CC
+ );
+
+ return result;
+}
+
+/*
+ * do a signed 32-bit multiply and divide with intermediate 64-bit product so
+ * as not to lose accuracy
+ * - we use the MDR register to hold the MSW of the product
+ */
+static inline __attribute__((const))
+signed __muldiv64s(signed val, signed mult, signed div)
+{
+ signed result;
+
+ asm("mul %2,%0 \n" /* MDR:val = val*mult */
+ "div %3,%0 \n" /* val = MDR:val/div;
+ * MDR = MDR:val%div */
+ : "=r"(result)
+ : "0"(val), "ir"(mult), "r"(div)
+ : CLOBBER_MDR_CC
+ );
+
+ return result;
+}
+
+#endif /* _ASM_DIV64 */
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
new file mode 100644
index 00000000000..c1be4397b1e
--- /dev/null
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -0,0 +1,171 @@
+/* DMA mapping routines for the MN10300 arch
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
+
+#include <linux/mm.h>
+#include <linux/scatterlist.h>
+
+#include <asm/cache.h>
+#include <asm/io.h>
+
+/*
+ * See Documentation/DMA-API.txt for the description of how the
+ * following DMA API should work.
+ */
+
+extern void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, int flag);
+
+extern void dma_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle);
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
+
+static inline
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+ mn10300_dcache_flush_inv();
+ return virt_to_bus(ptr);
+}
+
+static inline
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+static inline
+int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
+ enum dma_data_direction direction)
+{
+ struct scatterlist *sg;
+ int i;
+
+ BUG_ON(!valid_dma_direction(direction));
+ WARN_ON(nents == 0 || sglist[0].length == 0);
+
+ for_each_sg(sglist, sg, nents, i) {
+ BUG_ON(!sg_page(sg));
+
+ sg->dma_address = sg_phys(sg);
+ }
+
+ mn10300_dcache_flush_inv();
+ return nents;
+}
+
+static inline
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+ enum dma_data_direction direction)
+{
+ BUG_ON(!valid_dma_direction(direction));
+}
+
+static inline
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+ return page_to_bus(page) + offset;
+}
+
+static inline
+void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+static inline
+void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ size_t size, enum dma_data_direction direction)
+{
+}
+
+static inline
+void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
+ size_t size, enum dma_data_direction direction)
+{
+ mn10300_dcache_flush_inv();
+}
+
+static inline
+void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+}
+
+static inline void
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ mn10300_dcache_flush_inv();
+}
+
+
+static inline
+void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ int nelems, enum dma_data_direction direction)
+{
+}
+
+static inline
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+ int nelems, enum dma_data_direction direction)
+{
+ mn10300_dcache_flush_inv();
+}
+
+static inline
+int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+ return 0;
+}
+
+static inline
+int dma_supported(struct device *dev, u64 mask)
+{
+ /*
+ * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
+ * guarantee allocations that must be within a tighter range than
+ * GFP_DMA
+ */
+ if (mask < 0x00ffffff)
+ return 0;
+ return 1;
+}
+
+static inline
+int dma_set_mask(struct device *dev, u64 mask)
+{
+ if (!dev->dma_mask || !dma_supported(dev, mask))
+ return -EIO;
+
+ *dev->dma_mask = mask;
+ return 0;
+}
+
+static inline
+void dma_cache_sync(void *vaddr, size_t size,
+ enum dma_data_direction direction)
+{
+ mn10300_dcache_flush_inv();
+}
+
+#endif
diff --git a/arch/mn10300/include/asm/dma.h b/arch/mn10300/include/asm/dma.h
new file mode 100644
index 00000000000..098df2e617a
--- /dev/null
+++ b/arch/mn10300/include/asm/dma.h
@@ -0,0 +1,118 @@
+/* MN10300 ISA DMA handlers and definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMA_H
+#define _ASM_DMA_H
+
+#include <asm/system.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
+#define MAX_DMA_ADDRESS 0xbfffffff
+
+extern spinlock_t dma_spin_lock;
+
+static inline unsigned long claim_dma_lock(void)
+{
+ unsigned long flags;
+ spin_lock_irqsave(&dma_spin_lock, flags);
+ return flags;
+}
+
+static inline void release_dma_lock(unsigned long flags)
+{
+ spin_unlock_irqrestore(&dma_spin_lock, flags);
+}
+
+/* enable/disable a specific DMA channel */
+static inline void enable_dma(unsigned int dmanr)
+{
+}
+
+static inline void disable_dma(unsigned int dmanr)
+{
+}
+
+/* Clear the 'DMA Pointer Flip Flop'.
+ * Write 0 for LSB/MSB, 1 for MSB/LSB access.
+ * Use this once to initialize the FF to a known state.
+ * After that, keep track of it. :-)
+ * --- In order to do that, the DMA routines below should ---
+ * --- only be used while holding the DMA lock ! ---
+ */
+static inline void clear_dma_ff(unsigned int dmanr)
+{
+}
+
+/* set mode (above) for a specific DMA channel */
+static inline void set_dma_mode(unsigned int dmanr, char mode)
+{
+}
+
+/* Set only the page register bits of the transfer address.
+ * This is used for successive transfers when we know the contents of
+ * the lower 16 bits of the DMA current address register, but a 64k boundary
+ * may have been crossed.
+ */
+static inline void set_dma_page(unsigned int dmanr, char pagenr)
+{
+}
+
+
+/* Set transfer address & page bits for specific DMA channel.
+ * Assumes dma flipflop is clear.
+ */
+static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
+{
+}
+
+
+/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
+ * a specific DMA channel.
+ * You must ensure the parameters are valid.
+ * NOTE: from a manual: "the number of transfers is one more
+ * than the initial word count"! This is taken into account.
+ * Assumes dma flip-flop is clear.
+ * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
+ */
+static inline void set_dma_count(unsigned int dmanr, unsigned int count)
+{
+}
+
+
+/* Get DMA residue count. After a DMA transfer, this
+ * should return zero. Reading this while a DMA transfer is
+ * still in progress will return unpredictable results.
+ * If called before the channel has been used, it may return 1.
+ * Otherwise, it returns the number of _bytes_ left to transfer.
+ *
+ * Assumes DMA flip-flop is clear.
+ */
+static inline int get_dma_residue(unsigned int dmanr)
+{
+ return 0;
+}
+
+
+/* These are in kernel/dma.c: */
+extern int request_dma(unsigned int dmanr, const char *device_id);
+extern void free_dma(unsigned int dmanr);
+
+/* From PCI */
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy (0)
+#endif
+
+#endif /* _ASM_DMA_H */
diff --git a/arch/mn10300/include/asm/dmactl-regs.h b/arch/mn10300/include/asm/dmactl-regs.h
new file mode 100644
index 00000000000..80337b339c9
--- /dev/null
+++ b/arch/mn10300/include/asm/dmactl-regs.h
@@ -0,0 +1,16 @@
+/* MN10300 on-board DMA controller registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMACTL_REGS_H
+#define _ASM_DMACTL_REGS_H
+
+#include <proc/dmactl-regs.h>
+
+#endif /* _ASM_DMACTL_REGS_H */
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
new file mode 100644
index 00000000000..8157c9267f4
--- /dev/null
+++ b/arch/mn10300/include/asm/elf.h
@@ -0,0 +1,157 @@
+/* MN10300 ELF constant and register definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_ELF_H
+#define _ASM_ELF_H
+
+#include <linux/utsname.h>
+#include <asm/ptrace.h>
+#include <asm/user.h>
+
+/*
+ * AM33 relocations
+ */
+#define R_MN10300_NONE 0 /* No reloc. */
+#define R_MN10300_32 1 /* Direct 32 bit. */
+#define R_MN10300_16 2 /* Direct 16 bit. */
+#define R_MN10300_8 3 /* Direct 8 bit. */
+#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
+#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
+#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
+#define R_MN10300_24 9 /* Direct 24 bit. */
+#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
+#define R_MN10300_SYM_DIFF 33 /* Adjustment when relaxing. */
+#define R_MN10300_ALIGN 34 /* Alignment requirement. */
+
+/*
+ * AM33/AM34 HW Capabilities
+ */
+#define HWCAP_MN10300_ATOMIC_OP_UNIT 1 /* Has AM34 Atomic Operations */
+
+
+/*
+ * ELF register definitions..
+ */
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG ((sizeof(struct pt_regs) / sizeof(elf_greg_t)) - 1)
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+#define ELF_NFPREG 32
+typedef float elf_fpreg_t;
+
+typedef struct {
+ elf_fpreg_t fpregs[ELF_NFPREG];
+ u_int32_t fpcr;
+} elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture
+ */
+#define elf_check_arch(x) \
+ (((x)->e_machine == EM_CYGNUS_MN10300) || \
+ ((x)->e_machine == EM_MN10300))
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS ELFCLASS32
+#define ELF_DATA ELFDATA2LSB
+#define ELF_ARCH EM_MN10300
+
+/*
+ * ELF process initialiser
+ */
+#define ELF_PLAT_INIT(_r, load_addr) \
+do { \
+ struct pt_regs *_ur = current->thread.uregs; \
+ _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
+ _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
+ _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
+ _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
+ _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
+ _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
+} while (0)
+
+#define CORE_DUMP_USE_REGSET
+#define ELF_EXEC_PAGESIZE 4096
+
+/*
+ * This is the location that an ET_DYN program is loaded if exec'ed. Typical
+ * use of this is to invoke "./ld.so someprog" to test out a new version of
+ * the loader. We need to make sure that it is out of the way of the program
+ * that it will "exec", and that there is sufficient room for the brk.
+ * - must clear the VMALLOC area
+ */
+#define ELF_ET_DYN_BASE 0x04000000
+
+/*
+ * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
+ * now struct user_regs, they are different)
+ * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
+ */
+#define ELF_CORE_COPY_REGS(pr_reg, regs) \
+do { \
+ pr_reg[0] = regs->a3; \
+ pr_reg[1] = regs->a2; \
+ pr_reg[2] = regs->d3; \
+ pr_reg[3] = regs->d2; \
+ pr_reg[4] = regs->mcvf; \
+ pr_reg[5] = regs->mcrl; \
+ pr_reg[6] = regs->mcrh; \
+ pr_reg[7] = regs->mdrq; \
+ pr_reg[8] = regs->e1; \
+ pr_reg[9] = regs->e0; \
+ pr_reg[10] = regs->e7; \
+ pr_reg[11] = regs->e6; \
+ pr_reg[12] = regs->e5; \
+ pr_reg[13] = regs->e4; \
+ pr_reg[14] = regs->e3; \
+ pr_reg[15] = regs->e2; \
+ pr_reg[16] = regs->sp; \
+ pr_reg[17] = regs->lar; \
+ pr_reg[18] = regs->lir; \
+ pr_reg[19] = regs->mdr; \
+ pr_reg[20] = regs->a1; \
+ pr_reg[21] = regs->a0; \
+ pr_reg[22] = regs->d1; \
+ pr_reg[23] = regs->d0; \
+ pr_reg[24] = regs->orig_d0; \
+ pr_reg[25] = regs->epsw; \
+ pr_reg[26] = regs->pc; \
+} while (0);
+
+/*
+ * This yields a mask that user programs can use to figure out what
+ * instruction set this CPU supports. This could be done in user space,
+ * but it's not easy, and we've already done it here.
+ */
+#ifdef CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+#define ELF_HWCAP (HWCAP_MN10300_ATOMIC_OP_UNIT)
+#else
+#define ELF_HWCAP (0)
+#endif
+
+/*
+ * This yields a string that ld.so will use to load implementation
+ * specific libraries for optimization. This is more specific in
+ * intent than poking at uname or /proc/cpuinfo.
+ *
+ * For the moment, we have only optimizations for the Intel generations,
+ * but that could change...
+ */
+#define ELF_PLATFORM (NULL)
+
+#ifdef __KERNEL__
+#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
+#endif
+
+#endif /* _ASM_ELF_H */
diff --git a/arch/mn10300/include/asm/emergency-restart.h b/arch/mn10300/include/asm/emergency-restart.h
new file mode 100644
index 00000000000..3711bd9d50b
--- /dev/null
+++ b/arch/mn10300/include/asm/emergency-restart.h
@@ -0,0 +1 @@
+#include <asm-generic/emergency-restart.h>
diff --git a/arch/mn10300/include/asm/errno.h b/arch/mn10300/include/asm/errno.h
new file mode 100644
index 00000000000..4c82b503d92
--- /dev/null
+++ b/arch/mn10300/include/asm/errno.h
@@ -0,0 +1 @@
+#include <asm-generic/errno.h>
diff --git a/arch/mn10300/include/asm/exceptions.h b/arch/mn10300/include/asm/exceptions.h
new file mode 100644
index 00000000000..95a4d42c3a0
--- /dev/null
+++ b/arch/mn10300/include/asm/exceptions.h
@@ -0,0 +1,121 @@
+/* MN10300 Microcontroller core exceptions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_EXCEPTIONS_H
+#define _ASM_EXCEPTIONS_H
+
+#include <linux/linkage.h>
+
+/*
+ * define the breakpoint instruction opcode to use
+ * - note that the JTAG unit steals 0xFF, so you can't use JTAG and GDBSTUB at
+ * the same time.
+ */
+#define GDBSTUB_BKPT 0xFF
+
+#ifndef __ASSEMBLY__
+
+/*
+ * enumeration of exception codes (as extracted from TBR MSW)
+ */
+enum exception_code {
+ EXCEP_RESET = 0x000000, /* reset */
+
+ /* MMU exceptions */
+ EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
+ EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
+ EXCEP_IAERROR = 0x000110, /* instruction address */
+ EXCEP_DAERROR = 0x000118, /* data address */
+
+ /* system exceptions */
+ EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
+ EXCEP_ISTEP = 0x000130, /* single step */
+ EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
+ EXCEP_OBREAK = 0x000158, /* operand breakpoint */
+ EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
+ EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
+ EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
+ EXCEP_MEMERR = 0x000178, /* illegal memory access */
+ EXCEP_MISALIGN = 0x000180, /* misalignment */
+ EXCEP_BUSERROR = 0x000188, /* bus error */
+ EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
+ EXCEP_ILLDATACC = 0x000198, /* illegal data access */
+ EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
+ EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
+ EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
+ EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
+ EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
+
+ /* FPU exceptions */
+ EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
+ EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
+ EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
+
+ /* interrupts */
+ EXCEP_WDT = 0x000240, /* watchdog timer overflow */
+ EXCEP_NMI = 0x000248, /* non-maskable interrupt */
+ EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
+ EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
+ EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
+ EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
+ EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
+ EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
+ EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
+
+ /* system calls */
+ EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
+ EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
+ EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
+ EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
+ EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
+ EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
+ EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
+ EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
+ EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
+ EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
+ EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
+ EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
+ EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
+ EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
+ EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
+ EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
+};
+
+extern void __set_intr_stub(enum exception_code code, void *handler);
+extern void set_intr_stub(enum exception_code code, void *handler);
+
+struct pt_regs;
+
+extern asmlinkage void __common_exception(void);
+extern asmlinkage void itlb_miss(void);
+extern asmlinkage void dtlb_miss(void);
+extern asmlinkage void itlb_aerror(void);
+extern asmlinkage void dtlb_aerror(void);
+extern asmlinkage void raw_bus_error(void);
+extern asmlinkage void double_fault(void);
+extern asmlinkage int system_call(struct pt_regs *);
+extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
+extern asmlinkage void uninitialised_exception(struct pt_regs *,
+ enum exception_code);
+extern asmlinkage void irq_handler(void);
+extern asmlinkage void profile_handler(void);
+extern asmlinkage void nmi_handler(void);
+extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
+
+extern void die(const char *, struct pt_regs *, enum exception_code)
+ __noreturn;
+
+extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
+
+#define NUM2EXCEP_IRQ_LEVEL(num) (EXCEP_IRQ_LEVEL0 + (num) * 8)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_EXCEPTIONS_H */
diff --git a/arch/mn10300/include/asm/fb.h b/arch/mn10300/include/asm/fb.h
new file mode 100644
index 00000000000..697b24a91e1
--- /dev/null
+++ b/arch/mn10300/include/asm/fb.h
@@ -0,0 +1,23 @@
+/* MN10300 Frame buffer stuff
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FB_H
+#define _ASM_FB_H
+
+#include <linux/fb.h>
+
+#define fb_pgprotect(...) do {} while (0)
+
+static inline int fb_is_primary_device(struct fb_info *info)
+{
+ return 0;
+}
+
+#endif /* _ASM_FB_H */
diff --git a/arch/mn10300/include/asm/fcntl.h b/arch/mn10300/include/asm/fcntl.h
new file mode 100644
index 00000000000..46ab12db573
--- /dev/null
+++ b/arch/mn10300/include/asm/fcntl.h
@@ -0,0 +1 @@
+#include <asm-generic/fcntl.h>
diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h
new file mode 100644
index 00000000000..738ff72659d
--- /dev/null
+++ b/arch/mn10300/include/asm/fpu.h
@@ -0,0 +1,134 @@
+/* MN10300 FPU definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FPU_H
+#define _ASM_FPU_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/sched.h>
+#include <asm/exceptions.h>
+#include <asm/sigcontext.h>
+
+#ifdef __KERNEL__
+
+extern asmlinkage void fpu_disabled(void);
+
+#ifdef CONFIG_FPU
+
+#ifdef CONFIG_LAZY_SAVE_FPU
+/* the task that currently owns the FPU state */
+extern struct task_struct *fpu_state_owner;
+#endif
+
+#if (THREAD_USING_FPU & ~0xff)
+#error THREAD_USING_FPU must be smaller than 0x100.
+#endif
+
+static inline void set_using_fpu(struct task_struct *tsk)
+{
+ asm volatile(
+ "bset %0,(0,%1)"
+ :
+ : "i"(THREAD_USING_FPU), "a"(&tsk->thread.fpu_flags)
+ : "memory", "cc");
+}
+
+static inline void clear_using_fpu(struct task_struct *tsk)
+{
+ asm volatile(
+ "bclr %0,(0,%1)"
+ :
+ : "i"(THREAD_USING_FPU), "a"(&tsk->thread.fpu_flags)
+ : "memory", "cc");
+}
+
+#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
+
+extern asmlinkage void fpu_kill_state(struct task_struct *);
+extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
+extern asmlinkage void fpu_init_state(void);
+extern asmlinkage void fpu_save(struct fpu_state_struct *);
+extern int fpu_setup_sigcontext(struct fpucontext *buf);
+extern int fpu_restore_sigcontext(struct fpucontext *buf);
+
+static inline void unlazy_fpu(struct task_struct *tsk)
+{
+ preempt_disable();
+#ifndef CONFIG_LAZY_SAVE_FPU
+ if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
+ fpu_save(&tsk->thread.fpu_state);
+ tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
+ tsk->thread.uregs->epsw &= ~EPSW_FE;
+ }
+#else
+ if (fpu_state_owner == tsk)
+ fpu_save(&tsk->thread.fpu_state);
+#endif
+ preempt_enable();
+}
+
+static inline void exit_fpu(void)
+{
+#ifdef CONFIG_LAZY_SAVE_FPU
+ struct task_struct *tsk = current;
+
+ preempt_disable();
+ if (fpu_state_owner == tsk)
+ fpu_state_owner = NULL;
+ preempt_enable();
+#endif
+}
+
+static inline void flush_fpu(void)
+{
+ struct task_struct *tsk = current;
+
+ preempt_disable();
+#ifndef CONFIG_LAZY_SAVE_FPU
+ if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
+ tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
+ tsk->thread.uregs->epsw &= ~EPSW_FE;
+ }
+#else
+ if (fpu_state_owner == tsk) {
+ fpu_state_owner = NULL;
+ tsk->thread.uregs->epsw &= ~EPSW_FE;
+ }
+#endif
+ preempt_enable();
+ clear_using_fpu(tsk);
+}
+
+#else /* CONFIG_FPU */
+
+extern asmlinkage
+void unexpected_fpu_exception(struct pt_regs *, enum exception_code);
+#define fpu_exception unexpected_fpu_exception
+
+struct task_struct;
+struct fpu_state_struct;
+static inline bool is_using_fpu(struct task_struct *tsk) { return false; }
+static inline void set_using_fpu(struct task_struct *tsk) {}
+static inline void clear_using_fpu(struct task_struct *tsk) {}
+static inline void fpu_init_state(void) {}
+static inline void fpu_save(struct fpu_state_struct *s) {}
+static inline void fpu_kill_state(struct task_struct *tsk) {}
+static inline void unlazy_fpu(struct task_struct *tsk) {}
+static inline void exit_fpu(void) {}
+static inline void flush_fpu(void) {}
+static inline int fpu_setup_sigcontext(struct fpucontext *buf) { return 0; }
+static inline int fpu_restore_sigcontext(struct fpucontext *buf) { return 0; }
+#endif /* CONFIG_FPU */
+
+#endif /* __KERNEL__ */
+#endif /* !__ASSEMBLY__ */
+#endif /* _ASM_FPU_H */
diff --git a/arch/mn10300/include/asm/frame.inc b/arch/mn10300/include/asm/frame.inc
new file mode 100644
index 00000000000..2ee58e3eb6b
--- /dev/null
+++ b/arch/mn10300/include/asm/frame.inc
@@ -0,0 +1,97 @@
+/* MN10300 Microcontroller core system register definitions -*- asm -*-
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FRAME_INC
+#define _ASM_FRAME_INC
+
+#ifndef __ASSEMBLY__
+#error not for use in C files
+#endif
+
+#ifndef __ASM_OFFSETS_H__
+#include <asm/asm-offsets.h>
+#endif
+#include <asm/thread_info.h>
+
+#define pi break
+
+#define fp a3
+
+###############################################################################
+#
+# build a stack frame from the registers
+# - the caller has subtracted 4 from SP before coming here
+#
+###############################################################################
+.macro SAVE_ALL
+ add -4,sp # next exception frame ptr save area
+ movm [other],(sp)
+ mov usp,a1
+ mov a1,(sp) # USP in MOVM[other] dummy slot
+ movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
+ mov sp,fp # FRAME pointer in A3
+ add -12,sp # allow for calls to be made
+
+ # push the exception frame onto the front of the list
+ GET_THREAD_INFO a1
+ mov (TI_frame,a1),a0
+ mov a0,(REG_NEXT,fp)
+ mov fp,(TI_frame,a1)
+
+ # disable the FPU inside the kernel
+ and ~EPSW_FE,epsw
+
+ # we may be holding current in E2
+#ifdef CONFIG_MN10300_CURRENT_IN_E2
+ mov (__current),e2
+#endif
+.endm
+
+###############################################################################
+#
+# restore the registers from a stack frame
+#
+###############################################################################
+.macro RESTORE_ALL
+ # peel back the stack to the calling frame
+ # - this permits execve() to discard extra frames due to kernel syscalls
+ GET_THREAD_INFO a0
+ mov (TI_frame,a0),fp
+ mov fp,sp
+ mov (REG_NEXT,fp),d0
+ mov d0,(TI_frame,a0) # userspace has regs->next == 0
+
+#ifndef CONFIG_MN10300_USING_JTAG
+ mov (REG_EPSW,fp),d0
+ btst EPSW_T,d0
+ beq 99f
+
+ or EPSW_NMID,epsw
+ movhu (DCR),d1
+ or 0x0001, d1
+ movhu d1,(DCR)
+
+99:
+#endif
+ movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
+
+ # must restore usp even if returning to kernel space,
+ # when CONFIG_PREEMPT is enabled.
+ mov (sp),a1 # USP in MOVM[other] dummy slot
+ mov a1,usp
+
+ movm (sp),[other]
+ add 8,sp
+ rti
+
+.endm
+
+
+#endif /* _ASM_FRAME_INC */
diff --git a/arch/mn10300/include/asm/ftrace.h b/arch/mn10300/include/asm/ftrace.h
new file mode 100644
index 00000000000..40a8c178f10
--- /dev/null
+++ b/arch/mn10300/include/asm/ftrace.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/arch/mn10300/include/asm/futex.h b/arch/mn10300/include/asm/futex.h
new file mode 100644
index 00000000000..0b745828f42
--- /dev/null
+++ b/arch/mn10300/include/asm/futex.h
@@ -0,0 +1 @@
+#include <asm-generic/futex.h>
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
new file mode 100644
index 00000000000..f5495ad82b7
--- /dev/null
+++ b/arch/mn10300/include/asm/gdb-stub.h
@@ -0,0 +1,182 @@
+/* MN10300 Kernel GDB stub definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_GDB_STUB_H
+#define _ASM_GDB_STUB_H
+
+#include <asm/exceptions.h>
+
+/*
+ * register ID numbers in GDB remote protocol
+ */
+
+#define GDB_REGID_PC 9
+#define GDB_REGID_FP 7
+#define GDB_REGID_SP 8
+
+/*
+ * virtual stack layout for the GDB exception handler
+ */
+#define NUMREGS 64
+
+#define GDB_FR_D0 (0 * 4)
+#define GDB_FR_D1 (1 * 4)
+#define GDB_FR_D2 (2 * 4)
+#define GDB_FR_D3 (3 * 4)
+#define GDB_FR_A0 (4 * 4)
+#define GDB_FR_A1 (5 * 4)
+#define GDB_FR_A2 (6 * 4)
+#define GDB_FR_A3 (7 * 4)
+
+#define GDB_FR_SP (8 * 4)
+#define GDB_FR_PC (9 * 4)
+#define GDB_FR_MDR (10 * 4)
+#define GDB_FR_EPSW (11 * 4)
+#define GDB_FR_LIR (12 * 4)
+#define GDB_FR_LAR (13 * 4)
+#define GDB_FR_MDRQ (14 * 4)
+
+#define GDB_FR_E0 (15 * 4)
+#define GDB_FR_E1 (16 * 4)
+#define GDB_FR_E2 (17 * 4)
+#define GDB_FR_E3 (18 * 4)
+#define GDB_FR_E4 (19 * 4)
+#define GDB_FR_E5 (20 * 4)
+#define GDB_FR_E6 (21 * 4)
+#define GDB_FR_E7 (22 * 4)
+
+#define GDB_FR_SSP (23 * 4)
+#define GDB_FR_MSP (24 * 4)
+#define GDB_FR_USP (25 * 4)
+#define GDB_FR_MCRH (26 * 4)
+#define GDB_FR_MCRL (27 * 4)
+#define GDB_FR_MCVF (28 * 4)
+
+#define GDB_FR_FPCR (29 * 4)
+#define GDB_FR_DUMMY0 (30 * 4)
+#define GDB_FR_DUMMY1 (31 * 4)
+
+#define GDB_FR_FS0 (32 * 4)
+
+#define GDB_FR_SIZE (NUMREGS * 4)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This is the same as above, but for the high-level
+ * part of the GDB stub.
+ */
+
+struct gdb_regs {
+ /* saved main processor registers */
+ u32 d0, d1, d2, d3, a0, a1, a2, a3;
+ u32 sp, pc, mdr, epsw, lir, lar, mdrq;
+ u32 e0, e1, e2, e3, e4, e5, e6, e7;
+ u32 ssp, msp, usp, mcrh, mcrl, mcvf;
+
+ /* saved floating point registers */
+ u32 fpcr, _dummy0, _dummy1;
+ u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
+ u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
+ u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
+ u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
+};
+
+/*
+ * Prototypes
+ */
+extern void show_registers_only(struct pt_regs *regs);
+
+extern asmlinkage void gdbstub_init(void);
+extern asmlinkage void gdbstub_exit(int status);
+extern asmlinkage void gdbstub_io_init(void);
+extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
+extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
+extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
+extern asmlinkage void gdbstub_io_tx_flush(void);
+
+extern asmlinkage void gdbstub_io_rx_handler(void);
+extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
+extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
+extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
+extern asmlinkage void __gdbstub_bug_trap(void);
+extern asmlinkage void __gdbstub_pause(void);
+
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+extern asmlinkage void gdbstub_purge_cache(void);
+#else
+#define gdbstub_purge_cache() do {} while (0)
+#endif
+
+/* Used to prevent crashes in memory access */
+extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
+extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
+extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
+extern asmlinkage int gdbstub_write_byte(u32, u8 *);
+extern asmlinkage int gdbstub_write_word(u32, u8 *);
+extern asmlinkage int gdbstub_write_dword(u32, u8 *);
+
+extern asmlinkage void gdbstub_read_byte_guard(void);
+extern asmlinkage void gdbstub_read_byte_cont(void);
+extern asmlinkage void gdbstub_read_word_guard(void);
+extern asmlinkage void gdbstub_read_word_cont(void);
+extern asmlinkage void gdbstub_read_dword_guard(void);
+extern asmlinkage void gdbstub_read_dword_cont(void);
+extern asmlinkage void gdbstub_write_byte_guard(void);
+extern asmlinkage void gdbstub_write_byte_cont(void);
+extern asmlinkage void gdbstub_write_word_guard(void);
+extern asmlinkage void gdbstub_write_word_cont(void);
+extern asmlinkage void gdbstub_write_dword_guard(void);
+extern asmlinkage void gdbstub_write_dword_cont(void);
+
+extern u8 gdbstub_rx_buffer[PAGE_SIZE];
+extern u32 gdbstub_rx_inp;
+extern u32 gdbstub_rx_outp;
+extern u8 gdbstub_rx_overflow;
+extern u8 gdbstub_busy;
+extern u8 gdbstub_rx_unget;
+
+#ifdef CONFIG_GDBSTUB_DEBUGGING
+extern void gdbstub_printk(const char *fmt, ...)
+ __attribute__((format(printf, 1, 2)));
+#else
+static inline __attribute__((format(printf, 1, 2)))
+void gdbstub_printk(const char *fmt, ...)
+{
+}
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
+#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_entry(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
+#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_proto(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_IO
+#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_io(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
+#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_bkpt(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* _ASM_GDB_STUB_H */
diff --git a/arch/mn10300/include/asm/hardirq.h b/arch/mn10300/include/asm/hardirq.h
new file mode 100644
index 00000000000..0000d650b55
--- /dev/null
+++ b/arch/mn10300/include/asm/hardirq.h
@@ -0,0 +1,49 @@
+/* MN10300 Hardware IRQ statistics and management
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HARDIRQ_H
+#define _ASM_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <linux/irq.h>
+#include <asm/exceptions.h>
+
+/* assembly code in softirq.h is sensitive to the offsets of these fields */
+typedef struct {
+ unsigned int __softirq_pending;
+#ifdef CONFIG_MN10300_WD_TIMER
+ unsigned int __nmi_count; /* arch dependent */
+ unsigned int __irq_count; /* arch dependent */
+#endif
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
+
+extern void ack_bad_irq(int irq);
+
+/*
+ * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
+ * - these should jump to __common_exception in entry.S unless there's a good
+ * reason to do otherwise (see trap_preinit() in traps.c)
+ */
+typedef void (*intr_stub_fnx)(struct pt_regs *regs,
+ enum exception_code intcode);
+
+/*
+ * manipulate pointers in the Exception table (see entry.S)
+ * - these are indexed by decoding the lower 24 bits of the TBR register
+ * - note that the MN103E010 doesn't always trap through the correct vector,
+ * but does always set the TBR correctly
+ */
+extern asmlinkage void set_excp_vector(enum exception_code code,
+ intr_stub_fnx handler);
+
+#endif /* _ASM_HARDIRQ_H */
diff --git a/arch/mn10300/include/asm/highmem.h b/arch/mn10300/include/asm/highmem.h
new file mode 100644
index 00000000000..bfe2d88604d
--- /dev/null
+++ b/arch/mn10300/include/asm/highmem.h
@@ -0,0 +1,128 @@
+/* MN10300 Virtual kernel memory mappings for high memory
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-i386/highmem.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HIGHMEM_H
+#define _ASM_HIGHMEM_H
+
+#ifdef __KERNEL__
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/highmem.h>
+#include <asm/kmap_types.h>
+#include <asm/pgtable.h>
+
+/* undef for production */
+#undef HIGHMEM_DEBUG
+
+/* declarations for highmem.c */
+extern unsigned long highstart_pfn, highend_pfn;
+
+extern pte_t *kmap_pte;
+extern pgprot_t kmap_prot;
+extern pte_t *pkmap_page_table;
+
+extern void __init kmap_init(void);
+
+/*
+ * Right now we initialize only a single pte table. It can be extended
+ * easily, subsequent pte tables have to be allocated in one physical
+ * chunk of RAM.
+ */
+#define PKMAP_BASE 0xfe000000UL
+#define LAST_PKMAP 1024
+#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
+#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
+#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
+
+extern unsigned long kmap_high(struct page *page);
+extern void kunmap_high(struct page *page);
+
+static inline unsigned long kmap(struct page *page)
+{
+ if (in_interrupt())
+ BUG();
+ if (page < highmem_start_page)
+ return page_address(page);
+ return kmap_high(page);
+}
+
+static inline void kunmap(struct page *page)
+{
+ if (in_interrupt())
+ BUG();
+ if (page < highmem_start_page)
+ return;
+ kunmap_high(page);
+}
+
+/*
+ * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
+ * gives a more generic (and caching) interface. But kmap_atomic can
+ * be used in IRQ contexts, so in some (very limited) cases we need
+ * it.
+ */
+static inline unsigned long __kmap_atomic(struct page *page)
+{
+ unsigned long vaddr;
+ int idx, type;
+
+ pagefault_disable();
+ if (page < highmem_start_page)
+ return page_address(page);
+
+ type = kmap_atomic_idx_push();
+ idx = type + KM_TYPE_NR * smp_processor_id();
+ vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+#if HIGHMEM_DEBUG
+ if (!pte_none(*(kmap_pte - idx)))
+ BUG();
+#endif
+ set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
+ local_flush_tlb_one(vaddr);
+
+ return vaddr;
+}
+
+static inline void __kunmap_atomic(unsigned long vaddr)
+{
+ int type;
+
+ if (vaddr < FIXADDR_START) { /* FIXME */
+ pagefault_enable();
+ return;
+ }
+
+ type = kmap_atomic_idx();
+
+#if HIGHMEM_DEBUG
+ {
+ unsigned int idx;
+ idx = type + KM_TYPE_NR * smp_processor_id();
+
+ if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
+ BUG();
+
+ /*
+ * force other mappings to Oops if they'll try to access
+ * this pte without first remap it
+ */
+ pte_clear(kmap_pte - idx);
+ local_flush_tlb_one(vaddr);
+ }
+#endif
+
+ kmap_atomic_idx_pop();
+ pagefault_enable();
+}
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/mn10300/include/asm/hw_irq.h b/arch/mn10300/include/asm/hw_irq.h
new file mode 100644
index 00000000000..70619901098
--- /dev/null
+++ b/arch/mn10300/include/asm/hw_irq.h
@@ -0,0 +1,14 @@
+/* MN10300 Hardware interrupt definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HW_IRQ_H
+#define _ASM_HW_IRQ_H
+
+#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h
new file mode 100644
index 00000000000..d65bbeebe50
--- /dev/null
+++ b/arch/mn10300/include/asm/intctl-regs.h
@@ -0,0 +1,71 @@
+/* MN10300 On-board interrupt controller registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_INTCTL_REGS_H
+#define _ASM_INTCTL_REGS_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+
+/*
+ * Interrupt controller registers
+ * - Registers 64-191 are at addresses offset from the main array
+ */
+#define GxICR(X) \
+ __SYSREG(0xd4000000 + (X) * 4 + \
+ (((X) >= 64) && ((X) < 192)) * 0xf00, u16)
+
+#define GxICR_u8(X) \
+ __SYSREG(0xd4000000 + (X) * 4 + \
+ (((X) >= 64) && ((X) < 192)) * 0xf00, u8)
+
+#include <proc/intctl-regs.h>
+
+#define XIRQ_TRIGGER_LOWLEVEL 0
+#define XIRQ_TRIGGER_HILEVEL 1
+#define XIRQ_TRIGGER_NEGEDGE 2
+#define XIRQ_TRIGGER_POSEDGE 3
+
+/* non-maskable interrupt control */
+#define NMIIRQ 0
+#define NMICR GxICR(NMIIRQ) /* NMI control register */
+#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
+#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
+#define NMICR_ABUSERR 0x0008 /* async bus error flag */
+
+/* maskable interrupt control */
+#define GxICR_DETECT 0x0001 /* interrupt detect flag */
+#define GxICR_REQUEST 0x0010 /* interrupt request flag */
+#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
+#define GxICR_LEVEL 0x7000 /* interrupt priority level */
+#define GxICR_LEVEL_0 0x0000 /* - level 0 */
+#define GxICR_LEVEL_1 0x1000 /* - level 1 */
+#define GxICR_LEVEL_2 0x2000 /* - level 2 */
+#define GxICR_LEVEL_3 0x3000 /* - level 3 */
+#define GxICR_LEVEL_4 0x4000 /* - level 4 */
+#define GxICR_LEVEL_5 0x5000 /* - level 5 */
+#define GxICR_LEVEL_6 0x6000 /* - level 6 */
+#define GxICR_LEVEL_SHIFT 12
+#define GxICR_NMI 0x8000 /* nmi request flag */
+
+#define NUM2GxICR_LEVEL(num) ((num) << GxICR_LEVEL_SHIFT)
+
+#ifndef __ASSEMBLY__
+extern void set_intr_level(int irq, u16 level);
+extern void mn10300_set_lateack_irq_type(int irq);
+#endif
+
+/* external interrupts */
+#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_INTCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h
new file mode 100644
index 00000000000..139df8c53de
--- /dev/null
+++ b/arch/mn10300/include/asm/io.h
@@ -0,0 +1,313 @@
+/* MN10300 I/O port emulation and memory-mapped I/O
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IO_H
+#define _ASM_IO_H
+
+#include <asm/page.h> /* I/O is all done through memory accesses */
+#include <asm/cpu-regs.h>
+#include <asm/cacheflush.h>
+
+#define mmiowb() do {} while (0)
+
+/*****************************************************************************/
+/*
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the x86 architecture, we just read/write the
+ * memory location directly.
+ */
+static inline u8 readb(const volatile void __iomem *addr)
+{
+ return *(const volatile u8 *) addr;
+}
+
+static inline u16 readw(const volatile void __iomem *addr)
+{
+ return *(const volatile u16 *) addr;
+}
+
+static inline u32 readl(const volatile void __iomem *addr)
+{
+ return *(const volatile u32 *) addr;
+}
+
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+
+#define readb_relaxed readb
+#define readw_relaxed readw
+#define readl_relaxed readl
+
+static inline void writeb(u8 b, volatile void __iomem *addr)
+{
+ *(volatile u8 *) addr = b;
+}
+
+static inline void writew(u16 b, volatile void __iomem *addr)
+{
+ *(volatile u16 *) addr = b;
+}
+
+static inline void writel(u32 b, volatile void __iomem *addr)
+{
+ *(volatile u32 *) addr = b;
+}
+
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+/*****************************************************************************/
+/*
+ * traditional input/output functions
+ */
+static inline u8 inb_local(unsigned long addr)
+{
+ return readb((volatile void __iomem *) addr);
+}
+
+static inline void outb_local(u8 b, unsigned long addr)
+{
+ return writeb(b, (volatile void __iomem *) addr);
+}
+
+static inline u8 inb(unsigned long addr)
+{
+ return readb((volatile void __iomem *) addr);
+}
+
+static inline u16 inw(unsigned long addr)
+{
+ return readw((volatile void __iomem *) addr);
+}
+
+static inline u32 inl(unsigned long addr)
+{
+ return readl((volatile void __iomem *) addr);
+}
+
+static inline void outb(u8 b, unsigned long addr)
+{
+ return writeb(b, (volatile void __iomem *) addr);
+}
+
+static inline void outw(u16 b, unsigned long addr)
+{
+ return writew(b, (volatile void __iomem *) addr);
+}
+
+static inline void outl(u32 b, unsigned long addr)
+{
+ return writel(b, (volatile void __iomem *) addr);
+}
+
+#define inb_p(addr) inb(addr)
+#define inw_p(addr) inw(addr)
+#define inl_p(addr) inl(addr)
+#define outb_p(x, addr) outb((x), (addr))
+#define outw_p(x, addr) outw((x), (addr))
+#define outl_p(x, addr) outl((x), (addr))
+
+static inline void insb(unsigned long addr, void *buffer, int count)
+{
+ if (count) {
+ u8 *buf = buffer;
+ do {
+ u8 x = inb(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+
+static inline void insw(unsigned long addr, void *buffer, int count)
+{
+ if (count) {
+ u16 *buf = buffer;
+ do {
+ u16 x = inw(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+
+static inline void insl(unsigned long addr, void *buffer, int count)
+{
+ if (count) {
+ u32 *buf = buffer;
+ do {
+ u32 x = inl(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+
+static inline void outsb(unsigned long addr, const void *buffer, int count)
+{
+ if (count) {
+ const u8 *buf = buffer;
+ do {
+ outb(*buf++, addr);
+ } while (--count);
+ }
+}
+
+static inline void outsw(unsigned long addr, const void *buffer, int count)
+{
+ if (count) {
+ const u16 *buf = buffer;
+ do {
+ outw(*buf++, addr);
+ } while (--count);
+ }
+}
+
+extern void __outsl(unsigned long addr, const void *buffer, int count);
+static inline void outsl(unsigned long addr, const void *buffer, int count)
+{
+ if ((unsigned long) buffer & 0x3)
+ return __outsl(addr, buffer, count);
+
+ if (count) {
+ const u32 *buf = buffer;
+ do {
+ outl(*buf++, addr);
+ } while (--count);
+ }
+}
+
+#define ioread8(addr) readb(addr)
+#define ioread16(addr) readw(addr)
+#define ioread32(addr) readl(addr)
+
+#define iowrite8(v, addr) writeb((v), (addr))
+#define iowrite16(v, addr) writew((v), (addr))
+#define iowrite32(v, addr) writel((v), (addr))
+
+#define ioread8_rep(p, dst, count) \
+ insb((unsigned long) (p), (dst), (count))
+#define ioread16_rep(p, dst, count) \
+ insw((unsigned long) (p), (dst), (count))
+#define ioread32_rep(p, dst, count) \
+ insl((unsigned long) (p), (dst), (count))
+
+#define iowrite8_rep(p, src, count) \
+ outsb((unsigned long) (p), (src), (count))
+#define iowrite16_rep(p, src, count) \
+ outsw((unsigned long) (p), (src), (count))
+#define iowrite32_rep(p, src, count) \
+ outsl((unsigned long) (p), (src), (count))
+
+#define readsb(p, dst, count) \
+ insb((unsigned long) (p), (dst), (count))
+#define readsw(p, dst, count) \
+ insw((unsigned long) (p), (dst), (count))
+#define readsl(p, dst, count) \
+ insl((unsigned long) (p), (dst), (count))
+
+#define writesb(p, src, count) \
+ outsb((unsigned long) (p), (src), (count))
+#define writesw(p, src, count) \
+ outsw((unsigned long) (p), (src), (count))
+#define writesl(p, src, count) \
+ outsl((unsigned long) (p), (src), (count))
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#ifdef __KERNEL__
+
+#include <linux/vmalloc.h>
+#define __io_virt(x) ((void *) (x))
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
+{
+}
+
+/*
+ * Change virtual addresses to physical addresses and vv.
+ * These are pretty trivial
+ */
+static inline unsigned long virt_to_phys(volatile void *address)
+{
+ return __pa(address);
+}
+
+static inline void *phys_to_virt(unsigned long address)
+{
+ return __va(address);
+}
+
+/*
+ * Change "struct page" to physical address.
+ */
+static inline void __iomem *__ioremap(unsigned long offset, unsigned long size,
+ unsigned long flags)
+{
+ return (void __iomem *) offset;
+}
+
+static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
+{
+ return (void __iomem *) offset;
+}
+
+/*
+ * This one maps high address device memory and turns off caching for that
+ * area. it's useful if some control registers are in such an area and write
+ * combining or read caching is not desirable:
+ */
+static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size)
+{
+ return (void __iomem *) (offset | 0x20000000);
+}
+
+#define ioremap_wc ioremap_nocache
+
+static inline void iounmap(void __iomem *addr)
+{
+}
+
+static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
+{
+ return (void __iomem *) port;
+}
+
+static inline void ioport_unmap(void __iomem *p)
+{
+}
+
+#define xlate_dev_kmem_ptr(p) ((void *) (p))
+#define xlate_dev_mem_ptr(p) ((void *) (p))
+
+/*
+ * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
+ */
+static inline unsigned long virt_to_bus(volatile void *address)
+{
+ return ((unsigned long) address) & ~0x20000000;
+}
+
+static inline void *bus_to_virt(unsigned long address)
+{
+ return (void *) address;
+}
+
+#define page_to_bus page_to_phys
+
+#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
+#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
+#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_IO_H */
diff --git a/arch/mn10300/include/asm/ioctl.h b/arch/mn10300/include/asm/ioctl.h
new file mode 100644
index 00000000000..b279fe06dfe
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctl.h
@@ -0,0 +1 @@
+#include <asm-generic/ioctl.h>
diff --git a/arch/mn10300/include/asm/ioctls.h b/arch/mn10300/include/asm/ioctls.h
new file mode 100644
index 00000000000..0212f4b2255
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctls.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_IOCTLS_H
+#define _ASM_IOCTLS_H
+
+#include <asm-generic/ioctls.h>
+
+#endif /* _ASM_IOCTLS_H */
diff --git a/arch/mn10300/include/asm/ipc.h b/arch/mn10300/include/asm/ipc.h
new file mode 100644
index 00000000000..a46e3d9c2a3
--- /dev/null
+++ b/arch/mn10300/include/asm/ipc.h
@@ -0,0 +1 @@
+#include <asm-generic/ipc.h>
diff --git a/arch/mn10300/include/asm/ipcbuf.h b/arch/mn10300/include/asm/ipcbuf.h
new file mode 100644
index 00000000000..84c7e51cb6d
--- /dev/null
+++ b/arch/mn10300/include/asm/ipcbuf.h
@@ -0,0 +1 @@
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/mn10300/include/asm/irq.h b/arch/mn10300/include/asm/irq.h
new file mode 100644
index 00000000000..1a73fb3f60c
--- /dev/null
+++ b/arch/mn10300/include/asm/irq.h
@@ -0,0 +1,40 @@
+/* MN10300 Hardware interrupt definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-i386/irq.h:
+ * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IRQ_H
+#define _ASM_IRQ_H
+
+#include <asm/intctl-regs.h>
+#include <asm/reset-regs.h>
+#include <proc/irq.h>
+
+/* this number is used when no interrupt has been assigned */
+#define NO_IRQ INT_MAX
+
+/*
+ * hardware irq numbers
+ * - the ASB2364 has an FPGA with an IRQ multiplexer on it
+ */
+#ifdef CONFIG_MN10300_UNIT_ASB2364
+#include <unit/irq.h>
+#else
+#define NR_CPU_IRQS GxICR_NUM_IRQS
+#define NR_IRQS NR_CPU_IRQS
+#endif
+
+/* external hardware irq numbers */
+#define NR_XIRQS GxICR_NUM_XIRQS
+
+#define irq_canonicalize(IRQ) (IRQ)
+
+#endif /* _ASM_IRQ_H */
diff --git a/arch/mn10300/include/asm/irq_regs.h b/arch/mn10300/include/asm/irq_regs.h
new file mode 100644
index 00000000000..97d0cb5af80
--- /dev/null
+++ b/arch/mn10300/include/asm/irq_regs.h
@@ -0,0 +1,28 @@
+/* MN10300 IRQ registers pointer definition
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IRQ_REGS_H
+#define _ASM_IRQ_REGS_H
+
+/*
+ * Per-cpu current frame pointer - the location of the last exception frame on
+ * the stack
+ */
+#define ARCH_HAS_OWN_IRQ_REGS
+
+#ifndef __ASSEMBLY__
+static inline __attribute__((const))
+struct pt_regs *get_irq_regs(void)
+{
+ return current_frame();
+}
+#endif
+
+#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/mn10300/include/asm/irqflags.h b/arch/mn10300/include/asm/irqflags.h
new file mode 100644
index 00000000000..678f68d5f37
--- /dev/null
+++ b/arch/mn10300/include/asm/irqflags.h
@@ -0,0 +1,216 @@
+/* MN10300 IRQ flag handling
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_IRQFLAGS_H
+#define _ASM_IRQFLAGS_H
+
+#include <asm/cpu-regs.h>
+#ifndef __ASSEMBLY__
+#include <linux/smp.h>
+#endif
+
+/*
+ * interrupt control
+ * - "disabled": run in IM1/2
+ * - level 0 - kernel debugger
+ * - level 1 - virtual serial DMA (if present)
+ * - level 5 - normal interrupt priority
+ * - level 6 - timer interrupt
+ * - "enabled": run in IM7
+ */
+#define MN10300_CLI_LEVEL (CONFIG_LINUX_CLI_LEVEL << EPSW_IM_SHIFT)
+
+#ifndef __ASSEMBLY__
+
+static inline unsigned long arch_local_save_flags(void)
+{
+ unsigned long flags;
+
+ asm volatile("mov epsw,%0" : "=d"(flags));
+ return flags;
+}
+
+static inline void arch_local_irq_disable(void)
+{
+ asm volatile(
+ " and %0,epsw \n"
+ " or %1,epsw \n"
+ " nop \n"
+ " nop \n"
+ " nop \n"
+ :
+ : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)
+ : "memory");
+}
+
+static inline unsigned long arch_local_irq_save(void)
+{
+ unsigned long flags;
+
+ flags = arch_local_save_flags();
+ arch_local_irq_disable();
+ return flags;
+}
+
+/*
+ * we make sure arch_irq_enable() doesn't cause priority inversion
+ */
+extern unsigned long __mn10300_irq_enabled_epsw[];
+
+static inline void arch_local_irq_enable(void)
+{
+ unsigned long tmp;
+ int cpu = raw_smp_processor_id();
+
+ asm volatile(
+ " mov epsw,%0 \n"
+ " and %1,%0 \n"
+ " or %2,%0 \n"
+ " mov %0,epsw \n"
+ : "=&d"(tmp)
+ : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw[cpu])
+ : "memory", "cc");
+}
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+ asm volatile(
+ " mov %0,epsw \n"
+ " nop \n"
+ " nop \n"
+ " nop \n"
+ :
+ : "d"(flags)
+ : "memory", "cc");
+}
+
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
+{
+ return (flags & (EPSW_IE | EPSW_IM)) != (EPSW_IE | EPSW_IM_7);
+}
+
+static inline bool arch_irqs_disabled(void)
+{
+ return arch_irqs_disabled_flags(arch_local_save_flags());
+}
+
+/*
+ * Hook to save power by halting the CPU
+ * - called from the idle loop
+ * - must reenable interrupts (which takes three instruction cycles to complete)
+ */
+static inline void arch_safe_halt(void)
+{
+#ifdef CONFIG_SMP
+ arch_local_irq_enable();
+#else
+ asm volatile(
+ " or %0,epsw \n"
+ " nop \n"
+ " nop \n"
+ " bset %2,(%1) \n"
+ :
+ : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)
+ : "cc");
+#endif
+}
+
+#define __sleep_cpu() \
+do { \
+ asm volatile( \
+ " bset %1,(%0)\n" \
+ "1: btst %1,(%0)\n" \
+ " bne 1b\n" \
+ : \
+ : "i"(&CPUM), "i"(CPUM_SLEEP) \
+ : "cc" \
+ ); \
+} while (0)
+
+static inline void arch_local_cli(void)
+{
+ asm volatile(
+ " and %0,epsw \n"
+ " nop \n"
+ " nop \n"
+ " nop \n"
+ :
+ : "i"(~EPSW_IE)
+ : "memory"
+ );
+}
+
+static inline unsigned long arch_local_cli_save(void)
+{
+ unsigned long flags = arch_local_save_flags();
+ arch_local_cli();
+ return flags;
+}
+
+static inline void arch_local_sti(void)
+{
+ asm volatile(
+ " or %0,epsw \n"
+ :
+ : "i"(EPSW_IE)
+ : "memory");
+}
+
+static inline void arch_local_change_intr_mask_level(unsigned long level)
+{
+ asm volatile(
+ " and %0,epsw \n"
+ " or %1,epsw \n"
+ :
+ : "i"(~EPSW_IM), "i"(EPSW_IE | level)
+ : "cc", "memory");
+}
+
+#else /* !__ASSEMBLY__ */
+
+#define LOCAL_SAVE_FLAGS(reg) \
+ mov epsw,reg
+
+#define LOCAL_IRQ_DISABLE \
+ and ~EPSW_IM,epsw; \
+ or EPSW_IE|MN10300_CLI_LEVEL,epsw; \
+ nop; \
+ nop; \
+ nop
+
+#define LOCAL_IRQ_ENABLE \
+ or EPSW_IE|EPSW_IM_7,epsw
+
+#define LOCAL_IRQ_RESTORE(reg) \
+ mov reg,epsw
+
+#define LOCAL_CLI_SAVE(reg) \
+ mov epsw,reg; \
+ and ~EPSW_IE,epsw; \
+ nop; \
+ nop; \
+ nop
+
+#define LOCAL_CLI \
+ and ~EPSW_IE,epsw; \
+ nop; \
+ nop; \
+ nop
+
+#define LOCAL_STI \
+ or EPSW_IE,epsw
+
+#define LOCAL_CHANGE_INTR_MASK_LEVEL(level) \
+ and ~EPSW_IM,epsw; \
+ or EPSW_IE|(level),epsw
+
+#endif /* __ASSEMBLY__ */
+#endif /* _ASM_IRQFLAGS_H */
diff --git a/arch/mn10300/include/asm/kdebug.h b/arch/mn10300/include/asm/kdebug.h
new file mode 100644
index 00000000000..0f47e112190
--- /dev/null
+++ b/arch/mn10300/include/asm/kdebug.h
@@ -0,0 +1,22 @@
+/* MN10300 In-kernel death knells
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_KDEBUG_H
+#define _ASM_KDEBUG_H
+
+/* Grossly misnamed. */
+enum die_val {
+ DIE_OOPS = 1,
+ DIE_BREAKPOINT,
+ DIE_GPF,
+};
+
+#endif /* _ASM_KDEBUG_H */
diff --git a/arch/mn10300/include/asm/kgdb.h b/arch/mn10300/include/asm/kgdb.h
new file mode 100644
index 00000000000..eb245f18a70
--- /dev/null
+++ b/arch/mn10300/include/asm/kgdb.h
@@ -0,0 +1,81 @@
+/* Kernel debugger for MN10300
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_KGDB_H
+#define _ASM_KGDB_H
+
+/*
+ * BUFMAX defines the maximum number of characters in inbound/outbound
+ * buffers at least NUMREGBYTES*2 are needed for register packets
+ * Longer buffer is needed to list all threads
+ */
+#define BUFMAX 1024
+
+/*
+ * Note that this register image is in a different order than the register
+ * image that Linux produces at interrupt time.
+ */
+enum regnames {
+ GDB_FR_D0 = 0,
+ GDB_FR_D1 = 1,
+ GDB_FR_D2 = 2,
+ GDB_FR_D3 = 3,
+ GDB_FR_A0 = 4,
+ GDB_FR_A1 = 5,
+ GDB_FR_A2 = 6,
+ GDB_FR_A3 = 7,
+
+ GDB_FR_SP = 8,
+ GDB_FR_PC = 9,
+ GDB_FR_MDR = 10,
+ GDB_FR_EPSW = 11,
+ GDB_FR_LIR = 12,
+ GDB_FR_LAR = 13,
+ GDB_FR_MDRQ = 14,
+
+ GDB_FR_E0 = 15,
+ GDB_FR_E1 = 16,
+ GDB_FR_E2 = 17,
+ GDB_FR_E3 = 18,
+ GDB_FR_E4 = 19,
+ GDB_FR_E5 = 20,
+ GDB_FR_E6 = 21,
+ GDB_FR_E7 = 22,
+
+ GDB_FR_SSP = 23,
+ GDB_FR_MSP = 24,
+ GDB_FR_USP = 25,
+ GDB_FR_MCRH = 26,
+ GDB_FR_MCRL = 27,
+ GDB_FR_MCVF = 28,
+
+ GDB_FR_FPCR = 29,
+ GDB_FR_DUMMY0 = 30,
+ GDB_FR_DUMMY1 = 31,
+
+ GDB_FR_FS0 = 32,
+
+ GDB_FR_SIZE = 64,
+};
+
+#define GDB_ORIG_D0 41
+#define NUMREGBYTES (GDB_FR_SIZE*4)
+
+static inline void arch_kgdb_breakpoint(void)
+{
+ asm(".globl __arch_kgdb_breakpoint; __arch_kgdb_breakpoint: break");
+}
+extern u8 __arch_kgdb_breakpoint;
+
+#define BREAK_INSTR_SIZE 1
+#define CACHE_FLUSH_IS_SAFE 1
+
+#endif /* _ASM_KGDB_H */
diff --git a/arch/mn10300/include/asm/kmap_types.h b/arch/mn10300/include/asm/kmap_types.h
new file mode 100644
index 00000000000..76d093b58d4
--- /dev/null
+++ b/arch/mn10300/include/asm/kmap_types.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_KMAP_TYPES_H
+#define _ASM_KMAP_TYPES_H
+
+#include <asm-generic/kmap_types.h>
+
+#endif /* _ASM_KMAP_TYPES_H */
diff --git a/arch/mn10300/include/asm/kprobes.h b/arch/mn10300/include/asm/kprobes.h
new file mode 100644
index 00000000000..c800b590183
--- /dev/null
+++ b/arch/mn10300/include/asm/kprobes.h
@@ -0,0 +1,50 @@
+/* MN10300 Kernel Probes support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public Licence as published by
+ * the Free Software Foundation; either version 2 of the Licence, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public Licence for more details.
+ *
+ * You should have received a copy of the GNU General Public Licence
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+#ifndef _ASM_KPROBES_H
+#define _ASM_KPROBES_H
+
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+struct kprobe;
+
+typedef unsigned char kprobe_opcode_t;
+#define BREAKPOINT_INSTRUCTION 0xff
+#define MAX_INSN_SIZE 8
+#define MAX_STACK_SIZE 128
+
+/* Architecture specific copy of original instruction */
+struct arch_specific_insn {
+ /* copy of original instruction
+ */
+ kprobe_opcode_t insn[MAX_INSN_SIZE];
+};
+
+extern const int kretprobe_blacklist_size;
+
+extern int kprobe_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data);
+
+#define flush_insn_slot(p) do {} while (0)
+
+extern void arch_remove_kprobe(struct kprobe *p);
+
+#endif /* _ASM_KPROBES_H */
diff --git a/arch/mn10300/include/asm/linkage.h b/arch/mn10300/include/asm/linkage.h
new file mode 100644
index 00000000000..dda3002a5df
--- /dev/null
+++ b/arch/mn10300/include/asm/linkage.h
@@ -0,0 +1,20 @@
+/* MN10300 Linkage and calling-convention overrides
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_LINKAGE_H
+#define _ASM_LINKAGE_H
+
+/* don't override anything */
+#define asmlinkage
+
+#define __ALIGN .align 4,0xcb
+#define __ALIGN_STR ".align 4,0xcb"
+
+#endif
diff --git a/arch/mn10300/include/asm/local.h b/arch/mn10300/include/asm/local.h
new file mode 100644
index 00000000000..c11c530f74d
--- /dev/null
+++ b/arch/mn10300/include/asm/local.h
@@ -0,0 +1 @@
+#include <asm-generic/local.h>
diff --git a/arch/mn10300/include/asm/local64.h b/arch/mn10300/include/asm/local64.h
new file mode 100644
index 00000000000..36c93b5cc23
--- /dev/null
+++ b/arch/mn10300/include/asm/local64.h
@@ -0,0 +1 @@
+#include <asm-generic/local64.h>
diff --git a/arch/mn10300/include/asm/mc146818rtc.h b/arch/mn10300/include/asm/mc146818rtc.h
new file mode 100644
index 00000000000..df6bc6e0e8c
--- /dev/null
+++ b/arch/mn10300/include/asm/mc146818rtc.h
@@ -0,0 +1 @@
+#include <asm/rtc-regs.h>
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
new file mode 100644
index 00000000000..db5c53da73c
--- /dev/null
+++ b/arch/mn10300/include/asm/mman.h
@@ -0,0 +1,6 @@
+#include <asm-generic/mman.h>
+
+#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */
+
+#define arch_mmap_check(addr, len, flags) \
+ (((flags) & MAP_FIXED && (addr) < MIN_MAP_ADDR) ? -EINVAL : 0)
diff --git a/arch/mn10300/include/asm/mmu.h b/arch/mn10300/include/asm/mmu.h
new file mode 100644
index 00000000000..2d2d097e730
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu.h
@@ -0,0 +1,19 @@
+/* MN10300 Memory management context
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-frv/mmu.h
+ */
+
+#ifndef _ASM_MMU_H
+#define _ASM_MMU_H
+
+/*
+ * MMU context
+ */
+typedef struct {
+ unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
+ * each CPU */
+} mm_context_t;
+
+#endif /* _ASM_MMU_H */
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
new file mode 100644
index 00000000000..c67c2b5365a
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -0,0 +1,161 @@
+/* MN10300 MMU context management
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-m32r/mmu_context.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * This implements an algorithm to provide TLB PID mappings to provide
+ * selective access to the TLB for processes, thus reducing the number of TLB
+ * flushes required.
+ *
+ * Note, however, that the M32R algorithm is technically broken as it does not
+ * handle version wrap-around, and could, theoretically, have a problem with a
+ * very long lived program that sleeps long enough for the version number to
+ * wrap all the way around so that its TLB mappings appear valid once again.
+ */
+#ifndef _ASM_MMU_CONTEXT_H
+#define _ASM_MMU_CONTEXT_H
+
+#include <linux/atomic.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+#include <asm-generic/mm_hooks.h>
+
+#define MMU_CONTEXT_TLBPID_NR 256
+#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
+#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
+#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
+#define MMU_NO_CONTEXT 0x00000000UL
+#define MMU_CONTEXT_TLBPID_LOCK_NR 0
+
+#define enter_lazy_tlb(mm, tsk) do {} while (0)
+
+static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
+{
+#ifdef CONFIG_SMP
+ cpumask_set_cpu(cpu, mm_cpumask(mm));
+#endif
+}
+
+static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
+{
+#ifdef CONFIG_SMP
+ return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
+#else
+ return true;
+#endif
+}
+
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
+extern unsigned long mmu_context_cache[NR_CPUS];
+#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
+
+/**
+ * allocate_mmu_context - Allocate storage for the arch-specific MMU data
+ * @mm: The userspace VM context being set up
+ */
+static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
+{
+ unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
+ unsigned long mc = ++(*pmc);
+
+ if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
+ /* we exhausted the TLB PIDs of this version on this CPU, so we
+ * flush this CPU's TLB in its entirety and start new cycle */
+ local_flush_tlb_all();
+
+ /* fix the TLB version if needed (we avoid version #0 so as to
+ * distingush MMU_NO_CONTEXT) */
+ if (!mc)
+ *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
+ }
+ mm_context(mm) = mc;
+ return mc;
+}
+
+/*
+ * get an MMU context if one is needed
+ */
+static inline unsigned long get_mmu_context(struct mm_struct *mm)
+{
+ unsigned long mc = MMU_NO_CONTEXT, cache;
+
+ if (mm) {
+ cache = mmu_context_cache[smp_processor_id()];
+ mc = mm_context(mm);
+
+ /* if we have an old version of the context, replace it */
+ if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
+ mc = allocate_mmu_context(mm);
+ }
+ return mc;
+}
+
+/*
+ * initialise the context related info for a new mm_struct instance
+ */
+static inline int init_new_context(struct task_struct *tsk,
+ struct mm_struct *mm)
+{
+ int num_cpus = NR_CPUS, i;
+
+ for (i = 0; i < num_cpus; i++)
+ mm->context.tlbpid[i] = MMU_NO_CONTEXT;
+ return 0;
+}
+
+/*
+ * after we have set current->mm to a new value, this activates the context for
+ * the new mm so we see the new mappings.
+ */
+static inline void activate_context(struct mm_struct *mm)
+{
+ PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
+}
+#else /* CONFIG_MN10300_TLB_USE_PIDR */
+
+#define init_new_context(tsk, mm) (0)
+#define activate_context(mm) local_flush_tlb()
+
+#endif /* CONFIG_MN10300_TLB_USE_PIDR */
+
+/**
+ * destroy_context - Destroy mm context information
+ * @mm: The MM being destroyed.
+ *
+ * Destroy context related info for an mm_struct that is about to be put to
+ * rest
+ */
+#define destroy_context(mm) do {} while (0)
+
+/**
+ * switch_mm - Change between userspace virtual memory contexts
+ * @prev: The outgoing MM context.
+ * @next: The incoming MM context.
+ * @tsk: The incoming task.
+ */
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+ struct task_struct *tsk)
+{
+ int cpu = smp_processor_id();
+
+ if (prev != next) {
+#ifdef CONFIG_SMP
+ per_cpu(cpu_tlbstate, cpu).active_mm = next;
+#endif
+ cpu_ran_vm(cpu, next);
+ PTBR = (unsigned long) next->pgd;
+ activate_context(next);
+ }
+}
+
+#define deactivate_mm(tsk, mm) do {} while (0)
+#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
+
+#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/arch/mn10300/include/asm/module.h b/arch/mn10300/include/asm/module.h
new file mode 100644
index 00000000000..5d7057d0149
--- /dev/null
+++ b/arch/mn10300/include/asm/module.h
@@ -0,0 +1,27 @@
+/* MN10300 Arch-specific module definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ * Derived from include/asm-i386/module.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_MODULE_H
+#define _ASM_MODULE_H
+
+struct mod_arch_specific {
+};
+
+#define Elf_Shdr Elf32_Shdr
+#define Elf_Sym Elf32_Sym
+#define Elf_Ehdr Elf32_Ehdr
+
+/*
+ * Include the MN10300 architecture version.
+ */
+#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
+
+#endif /* _ASM_MODULE_H */
diff --git a/arch/mn10300/include/asm/msgbuf.h b/arch/mn10300/include/asm/msgbuf.h
new file mode 100644
index 00000000000..8b602450cc4
--- /dev/null
+++ b/arch/mn10300/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
+#ifndef _ASM_MSGBUF_H
+#define _ASM_MSGBUF_H
+
+/*
+ * The msqid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+ struct ipc64_perm msg_perm;
+ __kernel_time_t msg_stime; /* last msgsnd time */
+ unsigned long __unused1;
+ __kernel_time_t msg_rtime; /* last msgrcv time */
+ unsigned long __unused2;
+ __kernel_time_t msg_ctime; /* last change time */
+ unsigned long __unused3;
+ unsigned long msg_cbytes; /* current number of bytes on queue */
+ unsigned long msg_qnum; /* number of messages in queue */
+ unsigned long msg_qbytes; /* max number of bytes on queue */
+ __kernel_pid_t msg_lspid; /* pid of last msgsnd */
+ __kernel_pid_t msg_lrpid; /* last receive pid */
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+#endif /* _ASM_MSGBUF_H */
diff --git a/arch/mn10300/include/asm/mutex.h b/arch/mn10300/include/asm/mutex.h
new file mode 100644
index 00000000000..84f5490c6fb
--- /dev/null
+++ b/arch/mn10300/include/asm/mutex.h
@@ -0,0 +1,16 @@
+/* MN10300 Mutex fastpath
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * TODO: implement optimized primitives instead, or leave the generic
+ * implementation in place, or pick the atomic_xchg() based generic
+ * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+#include <asm-generic/mutex-null.h>
diff --git a/arch/mn10300/include/asm/nmi.h b/arch/mn10300/include/asm/nmi.h
new file mode 100644
index 00000000000..f3671cbbc11
--- /dev/null
+++ b/arch/mn10300/include/asm/nmi.h
@@ -0,0 +1,14 @@
+/* MN10300 NMI handling
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_NMI_H
+#define _ASM_NMI_H
+
+#endif /* _ASM_NMI_H */
diff --git a/arch/mn10300/include/asm/page.h b/arch/mn10300/include/asm/page.h
new file mode 100644
index 00000000000..8288e124165
--- /dev/null
+++ b/arch/mn10300/include/asm/page.h
@@ -0,0 +1,128 @@
+/* MN10300 Page table definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PAGE_H
+#define _ASM_PAGE_H
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT 12
+
+#ifndef __ASSEMBLY__
+#define PAGE_SIZE (1UL << PAGE_SHIFT)
+#define PAGE_MASK (~(PAGE_SIZE - 1))
+#else
+#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
+ * immediate val not an addr */
+#define PAGE_MASK +(~(PAGE_SIZE - 1))
+#endif
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
+
+#define clear_user_page(addr, vaddr, page) clear_page(addr)
+#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+
+#define PTE_MASK PAGE_MASK
+#define HPAGE_SHIFT 22
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
+#define HPAGE_MASK (~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#define pte_val(x) ((x).pte)
+#define pgd_val(x) ((x).pgd)
+#define pgprot_val(x) ((x).pgprot)
+
+#define __pte(x) ((pte_t) { (x) })
+#define __pgd(x) ((pgd_t) { (x) })
+#define __pgprot(x) ((pgprot_t) { (x) })
+
+#include <asm-generic/pgtable-nopmd.h>
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * This handles the memory map.. We could make this a config
+ * option, but too many people screw it up, and too few need
+ * it.
+ *
+ * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
+ * a virtual address space of one gigabyte, which limits the
+ * amount of physical memory you can use to about 950MB.
+ */
+
+#ifndef __ASSEMBLY__
+
+/* Pure 2^n version of get_order */
+static inline int get_order(unsigned long size) __attribute__((const));
+static inline int get_order(unsigned long size)
+{
+ int order;
+
+ size = (size - 1) >> (PAGE_SHIFT - 1);
+ order = -1;
+ do {
+ size >>= 1;
+ order++;
+ } while (size);
+ return order;
+}
+
+#endif /* __ASSEMBLY__ */
+
+#include <asm/page_offset.h>
+
+#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
+#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
+
+/*
+ * main RAM and kernel working space are coincident at 0x90000000, but to make
+ * life more interesting, there's also an uncached virtual shadow at 0xb0000000
+ * - these mappings are fixed in the MMU
+ */
+#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
+
+#define __pa(x) ((unsigned long)(x))
+#define __va(x) ((void *)(unsigned long)(x))
+#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
+#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
+#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
+
+#define pfn_valid(pfn) \
+({ \
+ unsigned long __pfn = (pfn) - __pfn_disp; \
+ __pfn < max_mapnr; \
+})
+
+#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
+
+#define VM_DATA_DEFAULT_FLAGS \
+ (VM_READ | VM_WRITE | \
+ ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
+ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_PAGE_H */
diff --git a/arch/mn10300/include/asm/page_offset.h b/arch/mn10300/include/asm/page_offset.h
new file mode 100644
index 00000000000..8eb5b16ad86
--- /dev/null
+++ b/arch/mn10300/include/asm/page_offset.h
@@ -0,0 +1,11 @@
+/* MN10300 Kernel base address
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ */
+#ifndef _ASM_PAGE_OFFSET_H
+#define _ASM_PAGE_OFFSET_H
+
+#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
+
+#endif
diff --git a/arch/mn10300/include/asm/param.h b/arch/mn10300/include/asm/param.h
new file mode 100644
index 00000000000..02a0ca6f13c
--- /dev/null
+++ b/arch/mn10300/include/asm/param.h
@@ -0,0 +1,18 @@
+/* MN10300 Kernel parameters
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PARAM_H
+#define _ASM_PARAM_H
+
+#include <asm-generic/param.h>
+
+#define COMMAND_LINE_SIZE 256
+
+#endif /* _ASM_PARAM_H */
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
new file mode 100644
index 00000000000..6095a28561d
--- /dev/null
+++ b/arch/mn10300/include/asm/pci.h
@@ -0,0 +1,122 @@
+/* MN10300 PCI definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PCI_H
+#define _ASM_PCI_H
+
+#ifdef __KERNEL__
+#include <linux/mm.h> /* for struct page */
+
+#if 0
+#define __pcbdebug(FMT, ADDR, ...) \
+ printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
+ (u32)(ADDR), ##__VA_ARGS__)
+
+#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
+do { \
+ printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
+ (BUS)->number, \
+ PCI_SLOT(DEVFN), \
+ PCI_FUNC(DEVFN), \
+ (u32)(WHERE), ##__VA_ARGS__); \
+} while (0)
+
+#else
+#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
+#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
+#endif
+
+/* Can be used to override the logic in pci_scan_bus for skipping
+ * already-configured bus numbers - to be used for buggy BIOSes or
+ * architectures with incomplete PCI setup by the loader */
+
+#ifdef CONFIG_PCI
+#define pcibios_assign_all_busses() 1
+extern void unit_pci_init(void);
+#else
+#define pcibios_assign_all_busses() 0
+#endif
+
+extern unsigned long pci_mem_start;
+#define PCIBIOS_MIN_IO 0xBE000004
+#define PCIBIOS_MIN_MEM 0xB8000000
+
+void pcibios_set_master(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq);
+
+/* Dynamic DMA mapping stuff.
+ * i386 has everything mapped statically.
+ */
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <asm/scatterlist.h>
+#include <linux/string.h>
+#include <asm/io.h>
+
+struct pci_dev;
+
+/* The PCI address space does equal the physical memory
+ * address space. The networking and block device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS (1)
+
+/* Return the index of the PCI controller for device. */
+static inline int pci_controller_num(struct pci_dev *dev)
+{
+ return 0;
+}
+
+#define HAVE_PCI_MMAP
+extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state,
+ int write_combine);
+
+#endif /* __KERNEL__ */
+
+/* implement the pci_ DMA API in terms of the generic device dma_ one */
+#include <asm-generic/pci-dma-compat.h>
+
+/**
+ * pcibios_resource_to_bus - convert resource to PCI bus address
+ * @dev: device which owns this resource
+ * @region: converted bus-centric region (start,end)
+ * @res: resource to convert
+ *
+ * Convert a resource to a PCI device bus address or bus window.
+ */
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+ struct pci_bus_region *region,
+ struct resource *res);
+
+extern void pcibios_bus_to_resource(struct pci_dev *dev,
+ struct resource *res,
+ struct pci_bus_region *region);
+
+static inline struct resource *
+pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+{
+ struct resource *root = NULL;
+
+ if (res->flags & IORESOURCE_IO)
+ root = &ioport_resource;
+ if (res->flags & IORESOURCE_MEM)
+ root = &iomem_resource;
+
+ return root;
+}
+
+static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
+{
+ return channel ? 15 : 14;
+}
+
+#endif /* _ASM_PCI_H */
diff --git a/arch/mn10300/include/asm/percpu.h b/arch/mn10300/include/asm/percpu.h
new file mode 100644
index 00000000000..06a959d6723
--- /dev/null
+++ b/arch/mn10300/include/asm/percpu.h
@@ -0,0 +1 @@
+#include <asm-generic/percpu.h>
diff --git a/arch/mn10300/include/asm/pgalloc.h b/arch/mn10300/include/asm/pgalloc.h
new file mode 100644
index 00000000000..146bacf193e
--- /dev/null
+++ b/arch/mn10300/include/asm/pgalloc.h
@@ -0,0 +1,55 @@
+/* MN10300 Page and page table/directory allocation
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PGALLOC_H
+#define _ASM_PGALLOC_H
+
+#include <asm/page.h>
+#include <linux/threads.h>
+#include <linux/mm.h> /* for struct page */
+
+struct mm_struct;
+struct page;
+
+/* attach a page table to a PMD entry */
+#define pmd_populate_kernel(mm, pmd, pte) \
+ set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
+
+static inline
+void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
+{
+ set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
+}
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+/*
+ * Allocate and free page tables.
+ */
+
+extern pgd_t *pgd_alloc(struct mm_struct *);
+extern void pgd_free(struct mm_struct *, pgd_t *);
+
+extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
+extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+ free_page((unsigned long) pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, struct page *pte)
+{
+ __free_page(pte);
+}
+
+
+#define __pte_free_tlb(tlb, pte, addr) tlb_remove_page((tlb), (pte))
+
+#endif /* _ASM_PGALLOC_H */
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
new file mode 100644
index 00000000000..a1e894b5f65
--- /dev/null
+++ b/arch/mn10300/include/asm/pgtable.h
@@ -0,0 +1,506 @@
+/* MN10300 Page table manipulators and constants
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * The Linux memory management assumes a three-level page table setup. On
+ * the i386, we use that, but "fold" the mid level into the top-level page
+ * table, so that we physically have the same two-level page table as the
+ * i386 mmu expects.
+ *
+ * This file contains the functions and defines necessary to modify and use
+ * the i386 page table tree for the purposes of the MN10300 TLB handler
+ * functions.
+ */
+#ifndef _ASM_PGTABLE_H
+#define _ASM_PGTABLE_H
+
+#include <asm/cpu-regs.h>
+
+#ifndef __ASSEMBLY__
+#include <asm/processor.h>
+#include <asm/cache.h>
+#include <linux/threads.h>
+
+#include <asm/bitops.h>
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
+
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+extern unsigned long empty_zero_page[1024];
+extern spinlock_t pgd_lock;
+extern struct page *pgd_list;
+
+extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
+extern void pgtable_cache_init(void);
+extern void paging_init(void);
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * The Linux mn10300 paging architecture only implements both the traditional
+ * 2-level page tables
+ */
+#define PGDIR_SHIFT 22
+#define PTRS_PER_PGD 1024
+#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
+#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
+#define PTRS_PER_PTE 1024
+
+#define PGD_SIZE PAGE_SIZE
+#define PMD_SIZE (1UL << PMD_SHIFT)
+#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE - 1))
+
+#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
+#define FIRST_USER_ADDRESS 0
+
+#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
+#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
+
+#define TWOLEVEL_PGDIR_SHIFT 22
+#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
+#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
+
+#ifndef __ASSEMBLY__
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+#endif
+
+/*
+ * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
+ * area has to be in the lower half of the virtual address range (the upper
+ * half is not translated through the TLB).
+ *
+ * So in this case, the vmalloc area goes at the bottom of the address map
+ * (leaving a hole at the very bottom to catch addressing errors), and
+ * userspace starts immediately above.
+ *
+ * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
+ * area to catch addressing errors.
+ */
+#ifndef __ASSEMBLY__
+#define VMALLOC_OFFSET (8UL * 1024 * 1024)
+#define VMALLOC_START (0x70000000UL)
+#define VMALLOC_END (0x7C000000UL)
+#else
+#define VMALLOC_OFFSET (8 * 1024 * 1024)
+#define VMALLOC_START (0x70000000)
+#define VMALLOC_END (0x7C000000)
+#endif
+
+#ifndef __ASSEMBLY__
+extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
+#endif
+
+/* IPTEL2/DPTEL2 bit assignments */
+#define _PAGE_BIT_VALID xPTEL2_V_BIT
+#define _PAGE_BIT_CACHE xPTEL2_C_BIT
+#define _PAGE_BIT_PRESENT xPTEL2_PV_BIT
+#define _PAGE_BIT_DIRTY xPTEL2_D_BIT
+#define _PAGE_BIT_GLOBAL xPTEL2_G_BIT
+#define _PAGE_BIT_ACCESSED xPTEL2_UNUSED1_BIT /* mustn't be loaded into IPTEL2/DPTEL2 */
+
+#define _PAGE_VALID xPTEL2_V
+#define _PAGE_CACHE xPTEL2_C
+#define _PAGE_PRESENT xPTEL2_PV
+#define _PAGE_DIRTY xPTEL2_D
+#define _PAGE_PROT xPTEL2_PR
+#define _PAGE_PROT_RKNU xPTEL2_PR_ROK
+#define _PAGE_PROT_WKNU xPTEL2_PR_RWK
+#define _PAGE_PROT_RKRU xPTEL2_PR_ROK_ROU
+#define _PAGE_PROT_WKRU xPTEL2_PR_RWK_ROU
+#define _PAGE_PROT_WKWU xPTEL2_PR_RWK_RWU
+#define _PAGE_GLOBAL xPTEL2_G
+#define _PAGE_PS_MASK xPTEL2_PS
+#define _PAGE_PS_4Kb xPTEL2_PS_4Kb
+#define _PAGE_PS_128Kb xPTEL2_PS_128Kb
+#define _PAGE_PS_1Kb xPTEL2_PS_1Kb
+#define _PAGE_PS_4Mb xPTEL2_PS_4Mb
+#define _PAGE_PSE xPTEL2_PS_4Mb /* 4MB page */
+#define _PAGE_CACHE_WT xPTEL2_CWT
+#define _PAGE_ACCESSED xPTEL2_UNUSED1
+#define _PAGE_NX 0 /* no-execute bit */
+
+/* If _PAGE_VALID is clear, we use these: */
+#define _PAGE_FILE xPTEL2_C /* set:pagecache unset:swap */
+#define _PAGE_PROTNONE 0x000 /* If not present */
+
+#define __PAGE_PROT_UWAUX 0x010
+#define __PAGE_PROT_USER 0x020
+#define __PAGE_PROT_WRITE 0x040
+
+#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
+
+#ifndef __ASSEMBLY__
+
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+
+#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+
+#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
+
+#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
+#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
+#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
+#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
+#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
+#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
+#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
+#define PAGE_COPY PAGE_COPY_NOEXEC
+#define PAGE_READONLY PAGE_READONLY_NOEXEC
+#define PAGE_SHARED PAGE_SHARED_EXEC
+
+#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
+
+#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
+#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
+#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
+#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
+#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
+#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
+
+#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
+#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
+#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
+#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
+#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
+#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
+
+#define __PAGE_USERIO (__PAGE_KERNEL_BASE | _PAGE_PROT_WKWU | _PAGE_NX)
+#define PAGE_USERIO __pgprot(__PAGE_USERIO)
+
+/*
+ * Whilst the MN10300 can do page protection for execute (given separate data
+ * and insn TLBs), we are not supporting it at the moment. Write permission,
+ * however, always implies read permission (but not execute permission).
+ */
+#define __P000 PAGE_NONE
+#define __P001 PAGE_READONLY_NOEXEC
+#define __P010 PAGE_COPY_NOEXEC
+#define __P011 PAGE_COPY_NOEXEC
+#define __P100 PAGE_READONLY_EXEC
+#define __P101 PAGE_READONLY_EXEC
+#define __P110 PAGE_COPY_EXEC
+#define __P111 PAGE_COPY_EXEC
+
+#define __S000 PAGE_NONE
+#define __S001 PAGE_READONLY_NOEXEC
+#define __S010 PAGE_SHARED_NOEXEC
+#define __S011 PAGE_SHARED_NOEXEC
+#define __S100 PAGE_READONLY_EXEC
+#define __S101 PAGE_READONLY_EXEC
+#define __S110 PAGE_SHARED_EXEC
+#define __S111 PAGE_SHARED_EXEC
+
+/*
+ * Define this to warn about kernel memory accesses that are
+ * done without a 'verify_area(VERIFY_WRITE,..)'
+ */
+#undef TEST_VERIFY_AREA
+
+#define pte_present(x) (pte_val(x) & _PAGE_VALID)
+#define pte_clear(mm, addr, xp) \
+do { \
+ set_pte_at((mm), (addr), (xp), __pte(0)); \
+} while (0)
+
+#define pmd_none(x) (!pmd_val(x))
+#define pmd_present(x) (!pmd_none(x))
+#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
+#define pmd_bad(x) 0
+
+
+#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
+
+#ifndef __ASSEMBLY__
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
+static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
+static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
+static inline int pte_special(pte_t pte){ return 0; }
+
+/*
+ * The following only works if pte_present() is not true.
+ */
+static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
+
+static inline pte_t pte_rdprotect(pte_t pte)
+{
+ pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
+}
+static inline pte_t pte_exprotect(pte_t pte)
+{
+ pte_val(pte) |= _PAGE_NX; return pte;
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
+
+static inline pte_t pte_mkread(pte_t pte)
+{
+ pte_val(pte) |= __PAGE_PROT_USER;
+ if (pte_write(pte))
+ pte_val(pte) |= __PAGE_PROT_UWAUX;
+ return pte;
+}
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+ pte_val(pte) |= __PAGE_PROT_WRITE;
+ if (pte_val(pte) & __PAGE_PROT_USER)
+ pte_val(pte) |= __PAGE_PROT_UWAUX;
+ return pte;
+}
+
+static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
+
+#define pte_ERROR(e) \
+ printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
+ __FILE__, __LINE__, pte_val(e))
+#define pgd_ERROR(e) \
+ printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
+ __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+#define pgd_clear(xp) do { } while (0)
+
+/*
+ * Certain architectures need to do special things when PTEs
+ * within a page table are directly modified. Thus, the following
+ * hook is made available.
+ */
+#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
+#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
+#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
+
+/*
+ * (pmds are folded into pgds so this doesn't get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
+
+#define ptep_get_and_clear(mm, addr, ptep) \
+ __pte(xchg(&(ptep)->pte, 0))
+#define pte_same(a, b) (pte_val(a) == pte_val(b))
+#define pte_page(x) pfn_to_page(pte_pfn(x))
+#define pte_none(x) (!pte_val(x))
+#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
+#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
+#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
+#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
+
+/*
+ * All present user pages are user-executable:
+ */
+static inline int pte_exec(pte_t pte)
+{
+ return pte_user(pte);
+}
+
+/*
+ * All present pages are kernel-executable:
+ */
+static inline int pte_exec_kernel(pte_t pte)
+{
+ return 1;
+}
+
+#define PTE_FILE_MAX_BITS 30
+
+#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
+#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
+
+/* Encode and de-code a swap entry */
+#define __swp_type(x) (((x).val >> 2) & 0x3f)
+#define __swp_offset(x) ((x).val >> 8)
+#define __swp_entry(type, offset) \
+ ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x) __pte((x).val)
+
+static inline
+int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
+ pte_t *ptep)
+{
+ if (!pte_dirty(*ptep))
+ return 0;
+ return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
+}
+
+static inline
+int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
+ pte_t *ptep)
+{
+ if (!pte_young(*ptep))
+ return 0;
+ return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
+}
+
+static inline
+void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+ pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
+}
+
+static inline void ptep_mkdirty(pte_t *ptep)
+{
+ set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
+}
+
+/*
+ * Macro to mark a page protection value as "uncacheable". On processors which
+ * do not support it, this is a no-op.
+ */
+#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHE)
+
+/*
+ * Macro to mark a page protection value as "Write-Through".
+ * On processors which do not support it, this is a no-op.
+ */
+#define pgprot_through(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE_WT)
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+
+#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+#define mk_pte_huge(entry) \
+ ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+ pte_val(pte) &= _PAGE_CHG_MASK;
+ pte_val(pte) |= pgprot_val(newprot);
+ return pte;
+}
+
+#define page_pte(page) page_pte_prot((page), __pgprot(0))
+
+#define pmd_page_kernel(pmd) \
+ ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+
+#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
+
+#define pmd_large(pmd) \
+ ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
+ (_PAGE_PSE | _PAGE_PRESENT))
+
+/*
+ * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
+ *
+ * this macro returns the index of the entry in the pgd page which would
+ * control the given virtual address
+ */
+#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
+
+/*
+ * pgd_offset() returns a (pgd_t *)
+ * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
+ */
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/*
+ * a shortcut which implies the use of the kernel's pgd, instead
+ * of a process's
+ */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+/*
+ * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
+ *
+ * this macro returns the index of the entry in the pmd page which would
+ * control the given virtual address
+ */
+#define pmd_index(address) \
+ (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+
+/*
+ * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
+ *
+ * this macro returns the index of the entry in the pte page which would
+ * control the given virtual address
+ */
+#define pte_index(address) \
+ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+
+#define pte_offset_kernel(dir, address) \
+ ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
+
+/*
+ * Make a given kernel text page executable/non-executable.
+ * Returns the previous executability setting of that page (which
+ * is used to restore the previous state). Used by the SMP bootup code.
+ * NOTE: this is an __init function for security reasons.
+ */
+static inline int set_kernel_exec(unsigned long vaddr, int enable)
+{
+ return 0;
+}
+
+#define pte_offset_map(dir, address) \
+ ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
+#define pte_unmap(pte) do {} while (0)
+
+/*
+ * The MN10300 has external MMU info in the form of a TLB: this is adapted from
+ * the kernel page tables containing the necessary information by tlb-mn10300.S
+ */
+extern void update_mmu_cache(struct vm_area_struct *vma,
+ unsigned long address, pte_t *ptep);
+
+#endif /* !__ASSEMBLY__ */
+
+#define kern_addr_valid(addr) (1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+ remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
+
+#define MK_IOSPACE_PFN(space, pfn) (pfn)
+#define GET_IOSPACE(pfn) 0
+#define GET_PFN(pfn) (pfn)
+
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
+#define __HAVE_ARCH_PTEP_SET_WRPROTECT
+#define __HAVE_ARCH_PTEP_MKDIRTY
+#define __HAVE_ARCH_PTE_SAME
+#include <asm-generic/pgtable.h>
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_PGTABLE_H */
diff --git a/arch/mn10300/include/asm/pio-regs.h b/arch/mn10300/include/asm/pio-regs.h
new file mode 100644
index 00000000000..96bc8182d0b
--- /dev/null
+++ b/arch/mn10300/include/asm/pio-regs.h
@@ -0,0 +1,233 @@
+/* MN10300 On-board I/O port module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PIO_REGS_H
+#define _ASM_PIO_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/* I/O port 0 */
+#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
+#define P0MD_0 0x0003 /* mask */
+#define P0MD_0_IN 0x0000 /* input mode */
+#define P0MD_0_OUT 0x0001 /* output mode */
+#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
+#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
+#define P0MD_1 0x000c
+#define P0MD_1_IN 0x0000
+#define P0MD_1_OUT 0x0004
+#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
+#define P0MD_1_EYED 0x000c /* test signal output (data) */
+#define P0MD_2 0x0030
+#define P0MD_2_IN 0x0000
+#define P0MD_2_OUT 0x0010
+#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
+#define P0MD_3 0x00c0
+#define P0MD_3_IN 0x0000
+#define P0MD_3_OUT 0x0040
+#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
+#define P0MD_4 0x0300
+#define P0MD_4_IN 0x0000
+#define P0MD_4_OUT 0x0100
+#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
+#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
+#define P0MD_5 0x0c00
+#define P0MD_5_IN 0x0000
+#define P0MD_5_OUT 0x0400
+#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
+#define P0MD_6 0x3000
+#define P0MD_6_IN 0x0000
+#define P0MD_6_OUT 0x1000
+#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
+#define P0MD_7 0xc000
+#define P0MD_7_IN 0x0000
+#define P0MD_7_OUT 0x4000
+#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
+
+#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
+#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
+
+#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
+#define P0TMIO_TM0_IN 0x00
+#define P0TMIO_TM0_OUT 0x01
+#define P0TMIO_TM1_IN 0x00
+#define P0TMIO_TM1_OUT 0x02
+#define P0TMIO_TM2_IN 0x00
+#define P0TMIO_TM2_OUT 0x04
+#define P0TMIO_TM3_IN 0x00
+#define P0TMIO_TM3_OUT 0x08
+#define P0TMIO_TM4_IN 0x00
+#define P0TMIO_TM4_OUT 0x10
+#define P0TMIO_TM5_IN 0x00
+#define P0TMIO_TM5_OUT 0x20
+#define P0TMIO_TM6A_IN 0x00
+#define P0TMIO_TM6A_OUT 0x40
+#define P0TMIO_TM6B_IN 0x00
+#define P0TMIO_TM6B_OUT 0x80
+
+/* I/O port 1 */
+#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
+#define P1MD_0 0x0003 /* mask */
+#define P1MD_0_IN 0x0000 /* input mode */
+#define P1MD_0_OUT 0x0001 /* output mode */
+#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
+#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
+#define P1MD_1 0x000c
+#define P1MD_1_IN 0x0000
+#define P1MD_1_OUT 0x0004
+#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
+#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
+#define P1MD_2 0x0030
+#define P1MD_2_IN 0x0000
+#define P1MD_2_OUT 0x0010
+#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
+#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
+#define P1MD_3 0x00c0
+#define P1MD_3_IN 0x0000
+#define P1MD_3_OUT 0x0040
+#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
+#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
+#define P1MD_4 0x0300
+#define P1MD_4_IN 0x0000
+#define P1MD_4_OUT 0x0100
+#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
+#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
+
+#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
+#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
+#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
+#define P1TMIO_TM11_IN 0x00
+#define P1TMIO_TM11_OUT 0x01
+#define P1TMIO_TM10_IN 0x00
+#define P1TMIO_TM10_OUT 0x02
+#define P1TMIO_TM9_IN 0x00
+#define P1TMIO_TM9_OUT 0x04
+#define P1TMIO_TM8_IN 0x00
+#define P1TMIO_TM8_OUT 0x08
+#define P1TMIO_TM7_IN 0x00
+#define P1TMIO_TM7_OUT 0x10
+
+/* I/O port 2 */
+#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
+#define P2MD_0 0x0003 /* mask */
+#define P2MD_0_IN 0x0000 /* input mode */
+#define P2MD_0_OUT 0x0001 /* output mode */
+#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
+#define P2MD_1 0x000c
+#define P2MD_1_IN 0x0000
+#define P2MD_1_OUT 0x0004
+#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
+#define P2MD_2 0x0030
+#define P2MD_2_IN 0x0000
+#define P2MD_2_OUT 0x0010
+#define P2MD_3 0x00c0
+#define P2MD_3_IN 0x0000
+#define P2MD_3_OUT 0x0040
+#define P2MD_3_CKIO 0x00c0 /* mode */
+#define P2MD_4 0x0300
+#define P2MD_4_IN 0x0000
+#define P2MD_4_OUT 0x0100
+#define P2MD_4_CMOD 0x0300 /* mode */
+
+#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
+#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
+#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
+
+/* I/O port 3 */
+#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
+#define P3MD_0 0x0003 /* mask */
+#define P3MD_0_IN 0x0000 /* input mode */
+#define P3MD_0_OUT 0x0001 /* output mode */
+#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
+#define P3MD_1 0x000c
+#define P3MD_1_IN 0x0000
+#define P3MD_1_OUT 0x0004
+#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
+#define P3MD_2 0x0030
+#define P3MD_2_IN 0x0000
+#define P3MD_2_OUT 0x0010
+#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
+#define P3MD_3 0x00c0
+#define P3MD_3_IN 0x0000
+#define P3MD_3_OUT 0x0040
+#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
+#define P3MD_4 0x0300
+#define P3MD_4_IN 0x0000
+#define P3MD_4_OUT 0x0100
+#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
+
+#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
+#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
+
+/* I/O port 4 */
+#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
+#define P4MD_0 0x0003 /* mask */
+#define P4MD_0_IN 0x0000 /* input mode */
+#define P4MD_0_OUT 0x0001 /* output mode */
+#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
+#define P4MD_1 0x000c
+#define P4MD_1_IN 0x0000
+#define P4MD_1_OUT 0x0004
+#define P4MD_1_SDA0 0x0008
+#define P4MD_2 0x0030
+#define P4MD_2_IN 0x0000
+#define P4MD_2_OUT 0x0010
+#define P4MD_2_SCL1 0x0020
+#define P4MD_3 0x00c0
+#define P4MD_3_IN 0x0000
+#define P4MD_3_OUT 0x0040
+#define P4MD_3_SDA1 0x0080
+#define P4MD_4 0x0300
+#define P4MD_4_IN 0x0000
+#define P4MD_4_OUT 0x0100
+#define P4MD_4_SBO0 0x0200
+#define P4MD_5 0x0c00
+#define P4MD_5_IN 0x0000
+#define P4MD_5_OUT 0x0400
+#define P4MD_5_SBO1 0x0800
+#define P4MD_6 0x3000
+#define P4MD_6_IN 0x0000
+#define P4MD_6_OUT 0x1000
+#define P4MD_6_SBT0 0x2000
+#define P4MD_7 0xc000
+#define P4MD_7_IN 0x0000
+#define P4MD_7_OUT 0x4000
+#define P4MD_7_SBT1 0x8000
+
+#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
+#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
+
+/* I/O port 5 */
+#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
+#define P5MD_0 0x0003 /* mask */
+#define P5MD_0_IN 0x0000 /* input mode */
+#define P5MD_0_OUT 0x0001 /* output mode */
+#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
+#define P5MD_0_SOUT 0x0004 /* serial mode */
+#define P5MD_1 0x000c
+#define P5MD_1_IN 0x0000
+#define P5MD_1_OUT 0x0004
+#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
+#define P5MD_1_SIN 0x000c /* serial mode */
+#define P5MD_2 0x0030
+#define P5MD_2_IN 0x0000
+#define P5MD_2_OUT 0x0010
+#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
+
+#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
+#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_PIO_REGS_H */
diff --git a/arch/mn10300/include/asm/poll.h b/arch/mn10300/include/asm/poll.h
new file mode 100644
index 00000000000..c98509d3149
--- /dev/null
+++ b/arch/mn10300/include/asm/poll.h
@@ -0,0 +1 @@
+#include <asm-generic/poll.h>
diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/asm/posix_types.h
new file mode 100644
index 00000000000..56ffbc15879
--- /dev/null
+++ b/arch/mn10300/include/asm/posix_types.h
@@ -0,0 +1,137 @@
+/* MN10300 POSIX types
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_POSIX_TYPES_H
+#define _ASM_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+#if __GNUC__ == 4
+typedef unsigned int __kernel_size_t;
+typedef signed int __kernel_ssize_t;
+#else
+typedef unsigned long __kernel_size_t;
+typedef signed long __kernel_ssize_t;
+#endif
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_timer_t;
+typedef int __kernel_clockid_t;
+typedef int __kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+typedef unsigned short __kernel_old_dev_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+ unsigned long __tmp = __fd / __NFDBITS;
+ unsigned long __rem = __fd % __NFDBITS;
+ __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
+}
+
+#undef __FD_CLR
+static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+ unsigned long __tmp = __fd / __NFDBITS;
+ unsigned long __rem = __fd % __NFDBITS;
+ __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
+}
+
+
+#undef __FD_ISSET
+static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
+{
+ unsigned long __tmp = __fd / __NFDBITS;
+ unsigned long __rem = __fd % __NFDBITS;
+ return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant case (8 ints,
+ * for a 256-bit fd_set)
+ */
+#undef __FD_ZERO
+static inline void __FD_ZERO(__kernel_fd_set *__p)
+{
+ unsigned long *__tmp = __p->fds_bits;
+ int __i;
+
+ if (__builtin_constant_p(__FDSET_LONGS)) {
+ switch (__FDSET_LONGS) {
+ case 16:
+ __tmp[ 0] = 0; __tmp[ 1] = 0;
+ __tmp[ 2] = 0; __tmp[ 3] = 0;
+ __tmp[ 4] = 0; __tmp[ 5] = 0;
+ __tmp[ 6] = 0; __tmp[ 7] = 0;
+ __tmp[ 8] = 0; __tmp[ 9] = 0;
+ __tmp[10] = 0; __tmp[11] = 0;
+ __tmp[12] = 0; __tmp[13] = 0;
+ __tmp[14] = 0; __tmp[15] = 0;
+ return;
+
+ case 8:
+ __tmp[ 0] = 0; __tmp[ 1] = 0;
+ __tmp[ 2] = 0; __tmp[ 3] = 0;
+ __tmp[ 4] = 0; __tmp[ 5] = 0;
+ __tmp[ 6] = 0; __tmp[ 7] = 0;
+ return;
+
+ case 4:
+ __tmp[ 0] = 0; __tmp[ 1] = 0;
+ __tmp[ 2] = 0; __tmp[ 3] = 0;
+ return;
+ }
+ }
+ __i = __FDSET_LONGS;
+ while (__i) {
+ __i--;
+ *__tmp = 0;
+ __tmp++;
+ }
+}
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif /* _ASM_POSIX_TYPES_H */
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
new file mode 100644
index 00000000000..f7b3c9ab2cb
--- /dev/null
+++ b/arch/mn10300/include/asm/processor.h
@@ -0,0 +1,191 @@
+/* MN10300 Processor specifics
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_PROCESSOR_H
+#define _ASM_PROCESSOR_H
+
+#include <linux/threads.h>
+#include <linux/thread_info.h>
+#include <asm/page.h>
+#include <asm/ptrace.h>
+#include <asm/cpu-regs.h>
+#include <asm/uaccess.h>
+#include <asm/current.h>
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+struct mm_struct;
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() \
+({ \
+ void *__pc; \
+ asm("mov pc,%0" : "=a"(__pc)); \
+ __pc; \
+})
+
+extern void get_mem_info(unsigned long *mem_base, unsigned long *mem_size);
+
+extern void show_registers(struct pt_regs *regs);
+
+/*
+ * CPU type and hardware bug flags. Kept separately for each CPU.
+ * Members of this structure are referenced in head.S, so think twice
+ * before touching them. [mj]
+ */
+
+struct mn10300_cpuinfo {
+ int type;
+ unsigned long loops_per_jiffy;
+ char hard_math;
+};
+
+extern struct mn10300_cpuinfo boot_cpu_data;
+
+#ifdef CONFIG_SMP
+#if CONFIG_NR_CPUS < 2 || CONFIG_NR_CPUS > 8
+# error Sorry, NR_CPUS should be 2 to 8
+#endif
+extern struct mn10300_cpuinfo cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+#else /* CONFIG_SMP */
+#define cpu_data &boot_cpu_data
+#define current_cpu_data boot_cpu_data
+#endif /* CONFIG_SMP */
+
+extern void identify_cpu(struct mn10300_cpuinfo *);
+extern void print_cpu_info(struct mn10300_cpuinfo *);
+extern void dodgy_tsc(void);
+#define cpu_relax() barrier()
+
+/*
+ * User space process size: 1.75GB (default).
+ */
+#define TASK_SIZE 0x70000000
+
+/*
+ * Where to put the userspace stack by default
+ */
+#define STACK_TOP 0x70000000
+#define STACK_TOP_MAX STACK_TOP
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE 0x30000000
+
+struct fpu_state_struct {
+ unsigned long fs[32]; /* fpu registers */
+ unsigned long fpcr; /* fpu control register */
+};
+
+struct thread_struct {
+ struct pt_regs *uregs; /* userspace register frame */
+ unsigned long pc; /* kernel PC */
+ unsigned long sp; /* kernel SP */
+ unsigned long a3; /* kernel FP */
+ unsigned long wchan;
+ unsigned long usp;
+ unsigned long fpu_flags;
+#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
+#define THREAD_HAS_FPU 0x00000002 /* T if this task owns the FPU right now */
+ struct fpu_state_struct fpu_state;
+};
+
+#define INIT_THREAD \
+{ \
+ .uregs = init_uregs, \
+ .pc = 0, \
+ .sp = 0, \
+ .a3 = 0, \
+ .wchan = 0, \
+}
+
+#define INIT_MMAP \
+{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
+ NULL, NULL }
+
+/*
+ * do necessary setup to start up a newly executed thread
+ * - need to discard the frame stacked by the kernel thread invoking the execve
+ * syscall (see RESTORE_ALL macro)
+ */
+static inline void start_thread(struct pt_regs *regs,
+ unsigned long new_pc, unsigned long new_sp)
+{
+ struct thread_info *ti = current_thread_info();
+ struct pt_regs *frame0;
+
+ frame0 = thread_info_to_uregs(ti);
+ frame0->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;
+ frame0->pc = new_pc;
+ frame0->sp = new_sp;
+ ti->frame = frame0;
+}
+
+
+/* Free all resources held by a thread. */
+extern void release_thread(struct task_struct *);
+
+/* Prepare to copy thread state - unlazy all lazy status */
+extern void prepare_to_copy(struct task_struct *tsk);
+
+/*
+ * create a kernel thread without removing it from tasklists
+ */
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+/*
+ * Return saved PC of a blocked thread.
+ */
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define task_pt_regs(task) ((task)->thread.uregs)
+#define KSTK_EIP(task) (task_pt_regs(task)->pc)
+#define KSTK_ESP(task) (task_pt_regs(task)->sp)
+
+#define KSTK_TOP(info) \
+({ \
+ (unsigned long)(info) + THREAD_SIZE; \
+})
+
+#define ARCH_HAS_PREFETCH
+#define ARCH_HAS_PREFETCHW
+
+static inline void prefetch(const void *x)
+{
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
+#else
+ asm volatile ("dcpf (%0)" : : "r"(x));
+#endif
+#endif
+}
+
+static inline void prefetchw(const void *x)
+{
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
+#else
+ asm volatile ("dcpf (%0)" : : "r"(x));
+#endif
+#endif
+}
+
+#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
new file mode 100644
index 00000000000..55b79ef1002
--- /dev/null
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -0,0 +1,98 @@
+/* MN10300 Exception frame layout and ptrace constants
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PTRACE_H
+#define _ASM_PTRACE_H
+
+#define PT_A3 0
+#define PT_A2 1
+#define PT_D3 2
+#define PT_D2 3
+#define PT_MCVF 4
+#define PT_MCRL 5
+#define PT_MCRH 6
+#define PT_MDRQ 7
+#define PT_E1 8
+#define PT_E0 9
+#define PT_E7 10
+#define PT_E6 11
+#define PT_E5 12
+#define PT_E4 13
+#define PT_E3 14
+#define PT_E2 15
+#define PT_SP 16
+#define PT_LAR 17
+#define PT_LIR 18
+#define PT_MDR 19
+#define PT_A1 20
+#define PT_A0 21
+#define PT_D1 22
+#define PT_D0 23
+#define PT_ORIG_D0 24
+#define PT_EPSW 25
+#define PT_PC 26
+#define NR_PTREGS 27
+
+/*
+ * This defines the way registers are stored in the event of an exception
+ * - the strange order is due to the MOVM instruction
+ */
+struct pt_regs {
+ unsigned long a3; /* syscall arg 3 */
+ unsigned long a2; /* syscall arg 4 */
+ unsigned long d3; /* syscall arg 5 */
+ unsigned long d2; /* syscall arg 6 */
+ unsigned long mcvf;
+ unsigned long mcrl;
+ unsigned long mcrh;
+ unsigned long mdrq;
+ unsigned long e1;
+ unsigned long e0;
+ unsigned long e7;
+ unsigned long e6;
+ unsigned long e5;
+ unsigned long e4;
+ unsigned long e3;
+ unsigned long e2;
+ unsigned long sp;
+ unsigned long lar;
+ unsigned long lir;
+ unsigned long mdr;
+ unsigned long a1;
+ unsigned long a0; /* syscall arg 1 */
+ unsigned long d1; /* syscall arg 2 */
+ unsigned long d0; /* syscall ret */
+ struct pt_regs *next; /* next frame pointer */
+ unsigned long orig_d0; /* syscall number */
+ unsigned long epsw;
+ unsigned long pc;
+};
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS 12
+#define PTRACE_SETREGS 13
+#define PTRACE_GETFPREGS 14
+#define PTRACE_SETFPREGS 15
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD 0x00000001
+
+#ifdef __KERNEL__
+
+#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
+#define instruction_pointer(regs) ((regs)->pc)
+#define user_stack_pointer(regs) ((regs)->sp)
+
+#define arch_has_single_step() (1)
+
+#define profile_pc(regs) ((regs)->pc)
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/reset-regs.h b/arch/mn10300/include/asm/reset-regs.h
new file mode 100644
index 00000000000..10c7502a113
--- /dev/null
+++ b/arch/mn10300/include/asm/reset-regs.h
@@ -0,0 +1,64 @@
+/* MN10300 Reset controller and watchdog timer definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_RESET_REGS_H
+#define _ASM_RESET_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+
+#ifdef __KERNEL__
+
+#ifdef CONFIG_MN10300_WD_TIMER
+#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
+#endif
+
+/*
+ * watchdog timer registers
+ */
+#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
+
+#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
+#define WDCTR_WDCK 0x07 /* clock source selection */
+#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
+#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
+#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
+#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
+#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
+#define WDCTR_WDRST 0x40 /* binary counter reset */
+#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
+
+#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
+#define RSTCTR_CHIPRST 0x01 /* chip reset */
+#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
+#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
+#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
+
+#ifndef __ASSEMBLY__
+
+static inline void mn10300_proc_hard_reset(void)
+{
+ RSTCTR &= ~RSTCTR_CHIPRST;
+ RSTCTR |= RSTCTR_CHIPRST;
+}
+
+extern unsigned int watchdog_alert_counter[];
+
+extern void watchdog_go(void);
+extern asmlinkage void watchdog_handler(void);
+extern asmlinkage
+void watchdog_interrupt(struct pt_regs *, enum exception_code);
+
+#endif
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_RESET_REGS_H */
diff --git a/arch/mn10300/include/asm/resource.h b/arch/mn10300/include/asm/resource.h
new file mode 100644
index 00000000000..04bc4db8921
--- /dev/null
+++ b/arch/mn10300/include/asm/resource.h
@@ -0,0 +1 @@
+#include <asm-generic/resource.h>
diff --git a/arch/mn10300/include/asm/rtc-regs.h b/arch/mn10300/include/asm/rtc-regs.h
new file mode 100644
index 00000000000..c42deefaec1
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc-regs.h
@@ -0,0 +1,86 @@
+/* MN10300 on-chip Real-Time Clock registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_RTC_REGS_H
+#define _ASM_RTC_REGS_H
+
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
+#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
+#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
+#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
+#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
+#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
+#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
+#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
+#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
+#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
+
+#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
+#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
+#define RTCRA_RS_NONE 0x00 /* - off */
+#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
+#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
+#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
+#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
+#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
+#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
+#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
+#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
+#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
+#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
+#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
+#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
+#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
+#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
+#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
+#define RTCRA_DVR 0x40 /* divider reset */
+#define RTCRA_UIP 0x80 /* clock update flag */
+
+#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
+#define RTCRB_DSE 0x01 /* daylight savings time enable */
+#define RTCRB_TM 0x02 /* time format */
+#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
+#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
+#define RTCRB_DM 0x04 /* numeric value format */
+#define RTCRB_DM_BCD 0x00 /* - BCD */
+#define RTCRB_DM_BINARY 0x04 /* - binary */
+#define RTCRB_UIE 0x10 /* update interrupt disable */
+#define RTCRB_AIE 0x20 /* alarm interrupt disable */
+#define RTCRB_PIE 0x40 /* periodic interrupt disable */
+#define RTCRB_SET 0x80 /* clock update enable */
+
+#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
+#define RTSRC_UF 0x10 /* update end interrupt flag */
+#define RTSRC_AF 0x20 /* alarm interrupt flag */
+#define RTSRC_PF 0x40 /* periodic interrupt flag */
+#define RTSRC_IRQF 0x80 /* interrupt flag */
+
+#define RTIRQ 32
+#define RTICR GxICR(RTIRQ)
+
+/*
+ * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
+ */
+#define RTC_PORT(x) 0xd8600000
+#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
+
+#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
+#define CMOS_WRITE(val, addr) \
+ do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
+
+#define RTC_IRQ RTIRQ
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_RTC_REGS_H */
diff --git a/arch/mn10300/include/asm/rtc.h b/arch/mn10300/include/asm/rtc.h
new file mode 100644
index 00000000000..6c14bb1d0d9
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc.h
@@ -0,0 +1,30 @@
+/* MN10300 Real time clock definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_RTC_H
+#define _ASM_RTC_H
+
+#ifdef CONFIG_MN10300_RTC
+
+#include <linux/init.h>
+
+extern void __init calibrate_clock(void);
+
+#else /* !CONFIG_MN10300_RTC */
+
+static inline void calibrate_clock(void)
+{
+}
+
+#endif /* !CONFIG_MN10300_RTC */
+
+#include <asm-generic/rtc.h>
+
+#endif /* _ASM_RTC_H */
diff --git a/arch/mn10300/include/asm/rwlock.h b/arch/mn10300/include/asm/rwlock.h
new file mode 100644
index 00000000000..6d594d4a0e1
--- /dev/null
+++ b/arch/mn10300/include/asm/rwlock.h
@@ -0,0 +1,125 @@
+/*
+ * Helpers used by both rw spinlocks and rw semaphores.
+ *
+ * Based in part on code from semaphore.h and
+ * spinlock.h Copyright 1996 Linus Torvalds.
+ *
+ * Copyright 1999 Red Hat, Inc.
+ *
+ * Written by Benjamin LaHaise.
+ *
+ * Modified by Matsushita Electric Industrial Co., Ltd.
+ * Modifications:
+ * 13-Nov-2006 MEI Temporarily delete lock functions for SMP support.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+#ifndef _ASM_RWLOCK_H
+#define _ASM_RWLOCK_H
+
+#define RW_LOCK_BIAS 0x01000000
+
+#ifndef CONFIG_SMP
+
+typedef struct { unsigned long a[100]; } __dummy_lock_t;
+#define __dummy_lock(lock) (*(__dummy_lock_t *)(lock))
+
+#define RW_LOCK_BIAS_STR "0x01000000"
+
+#define __build_read_lock_ptr(rw, helper) \
+ do { \
+ asm volatile( \
+ " mov (%0),d3 \n" \
+ " sub 1,d3 \n" \
+ " mov d3,(%0) \n" \
+ " blt 1f \n" \
+ " bra 2f \n" \
+ "1: jmp 3f \n" \
+ "2: \n" \
+ " .section .text.lock,\"ax\" \n" \
+ "3: call "helper"[],0 \n" \
+ " jmp 2b \n" \
+ " .previous" \
+ : \
+ : "d" (rw) \
+ : "memory", "d3", "cc"); \
+ } while (0)
+
+#define __build_read_lock_const(rw, helper) \
+ do { \
+ asm volatile( \
+ " mov (%0),d3 \n" \
+ " sub 1,d3 \n" \
+ " mov d3,(%0) \n" \
+ " blt 1f \n" \
+ " bra 2f \n" \
+ "1: jmp 3f \n" \
+ "2: \n" \
+ " .section .text.lock,\"ax\" \n" \
+ "3: call "helper"[],0 \n" \
+ " jmp 2b \n" \
+ " .previous" \
+ : \
+ : "d" (rw) \
+ : "memory", "d3", "cc"); \
+ } while (0)
+
+#define __build_read_lock(rw, helper) \
+ do { \
+ if (__builtin_constant_p(rw)) \
+ __build_read_lock_const(rw, helper); \
+ else \
+ __build_read_lock_ptr(rw, helper); \
+ } while (0)
+
+#define __build_write_lock_ptr(rw, helper) \
+ do { \
+ asm volatile( \
+ " mov (%0),d3 \n" \
+ " sub 1,d3 \n" \
+ " mov d3,(%0) \n" \
+ " blt 1f \n" \
+ " bra 2f \n" \
+ "1: jmp 3f \n" \
+ "2: \n" \
+ " .section .text.lock,\"ax\" \n" \
+ "3: call "helper"[],0 \n" \
+ " jmp 2b \n" \
+ " .previous" \
+ : \
+ : "d" (rw) \
+ : "memory", "d3", "cc"); \
+ } while (0)
+
+#define __build_write_lock_const(rw, helper) \
+ do { \
+ asm volatile( \
+ " mov (%0),d3 \n" \
+ " sub 1,d3 \n" \
+ " mov d3,(%0) \n" \
+ " blt 1f \n" \
+ " bra 2f \n" \
+ "1: jmp 3f \n" \
+ "2: \n" \
+ " .section .text.lock,\"ax\" \n" \
+ "3: call "helper"[],0 \n" \
+ " jmp 2b \n" \
+ " .previous" \
+ : \
+ : "d" (rw) \
+ : "memory", "d3", "cc"); \
+ } while (0)
+
+#define __build_write_lock(rw, helper) \
+ do { \
+ if (__builtin_constant_p(rw)) \
+ __build_write_lock_const(rw, helper); \
+ else \
+ __build_write_lock_ptr(rw, helper); \
+ } while (0)
+
+#endif /* CONFIG_SMP */
+#endif /* _ASM_RWLOCK_H */
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h
new file mode 100644
index 00000000000..7baa4006008
--- /dev/null
+++ b/arch/mn10300/include/asm/scatterlist.h
@@ -0,0 +1,16 @@
+/* MN10300 Scatterlist definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SCATTERLIST_H
+#define _ASM_SCATTERLIST_H
+
+#include <asm-generic/scatterlist.h>
+
+#endif /* _ASM_SCATTERLIST_H */
diff --git a/arch/mn10300/include/asm/sections.h b/arch/mn10300/include/asm/sections.h
new file mode 100644
index 00000000000..2b8c5160388
--- /dev/null
+++ b/arch/mn10300/include/asm/sections.h
@@ -0,0 +1 @@
+#include <asm-generic/sections.h>
diff --git a/arch/mn10300/include/asm/sembuf.h b/arch/mn10300/include/asm/sembuf.h
new file mode 100644
index 00000000000..301f3f9d8aa
--- /dev/null
+++ b/arch/mn10300/include/asm/sembuf.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SEMBUF_H
+#define _ASM_SEMBUF_H
+
+/*
+ * The semid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct semid64_ds {
+ struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
+ __kernel_time_t sem_otime; /* last semop time */
+ unsigned long __unused1;
+ __kernel_time_t sem_ctime; /* last change time */
+ unsigned long __unused2;
+ unsigned long sem_nsems; /* no. of semaphores in array */
+ unsigned long __unused3;
+ unsigned long __unused4;
+};
+
+#endif /* _ASM_SEMBUF_H */
diff --git a/arch/mn10300/include/asm/serial-regs.h b/arch/mn10300/include/asm/serial-regs.h
new file mode 100644
index 00000000000..8320cda32f5
--- /dev/null
+++ b/arch/mn10300/include/asm/serial-regs.h
@@ -0,0 +1,191 @@
+/* MN10300 on-board serial port module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SERIAL_REGS_H
+#define _ASM_SERIAL_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/* serial port 0 */
+#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
+#define SC01CTR_CK 0x0007 /* clock source select */
+#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
+#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
+#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
+#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
+#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
+#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
+#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
+#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
+#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
+#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
+#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 1 only) */
+#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
+#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
+#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
+#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 0 underflow (serial port 0 only) */
+#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM12UFLOW_8 0x0000 /* - 1/8 timer 12 underflow (serial port 1 only) */
+#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
+#define SC01CTR_STB 0x0008 /* stop bit select */
+#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
+#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
+#define SC01CTR_PB 0x0070 /* parity bit select */
+#define SC01CTR_PB_NONE 0x0000 /* - no parity */
+#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
+#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
+#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
+#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
+#define SC01CTR_CLN 0x0080 /* character length */
+#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
+#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
+#define SC01CTR_TOE 0x0100 /* T input output enable */
+#define SC01CTR_OD 0x0200 /* bit order select */
+#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
+#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
+#define SC01CTR_MD 0x0c00 /* mode select */
+#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
+#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
+#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
+#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
+#define SC01CTR_IIC 0x1000 /* I2C mode select */
+#define SC01CTR_BKE 0x2000 /* break transmit enable */
+#define SC01CTR_RXE 0x4000 /* receive enable */
+#define SC01CTR_TXE 0x8000 /* transmit enable */
+
+#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
+#define SC01ICR_DMD 0x80 /* output data mode */
+#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
+#define SC01ICR_TI 0x10 /* transmit interrupt cause */
+#define SC01ICR_RES 0x04 /* receive error select */
+#define SC01ICR_RI 0x01 /* receive interrupt cause */
+
+#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
+#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
+
+#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
+#define SC01STR_OEF 0x0001 /* overrun error found */
+#define SC01STR_PEF 0x0002 /* parity error found */
+#define SC01STR_FEF 0x0004 /* framing error found */
+#define SC01STR_RBF 0x0010 /* receive buffer status */
+#define SC01STR_TBF 0x0020 /* transmit buffer status */
+#define SC01STR_RXF 0x0040 /* receive status */
+#define SC01STR_TXF 0x0080 /* transmit status */
+#define SC01STR_STF 0x0100 /* I2C start sequence found */
+#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
+
+#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
+#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
+
+#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
+#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
+
+/* serial port 1 */
+#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
+#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
+#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
+#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
+#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
+
+#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
+#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
+
+#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
+#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
+
+/* serial port 2 */
+#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
+#ifdef CONFIG_AM33_2
+#define SC2CTR_CK 0x0003 /* clock source select */
+#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
+#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
+#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
+#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
+#else /* CONFIG_AM33_2 */
+#define SC2CTR_CK 0x0007 /* clock source select */
+#define SC2CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow */
+#define SC2CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
+#define SC2CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
+#define SC2CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow */
+#define SC2CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 1 underflow */
+#define SC2CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow */
+#define SC2CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
+#define SC2CTR_CK_EXTERN 0x0007 /* - external closk */
+#endif /* CONFIG_AM33_2 */
+#define SC2CTR_STB 0x0008 /* stop bit select */
+#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
+#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
+#define SC2CTR_PB 0x0070 /* parity bit select */
+#define SC2CTR_PB_NONE 0x0000 /* - no parity */
+#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
+#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
+#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
+#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
+#define SC2CTR_CLN 0x0080 /* character length */
+#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
+#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
+#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
+#define SC2CTR_OD 0x0200 /* bit order select */
+#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
+#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
+#define SC2CTR_TWS 0x1000 /* transmit wait select */
+#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
+#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
+#define SC2CTR_BKE 0x2000 /* break transmit enable */
+#define SC2CTR_RXE 0x4000 /* receive enable */
+#define SC2CTR_TXE 0x8000 /* transmit enable */
+
+#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
+#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
+#define SC2ICR_TI 0x10 /* transmit interrupt cause */
+#define SC2ICR_RES 0x04 /* receive error select */
+#define SC2ICR_RI 0x01 /* receive interrupt cause */
+
+#define SC2TXB __SYSREG(0xd4002028, u8) /* transmit buffer reg */
+#define SC2RXB __SYSREG(0xd4002029, u8) /* receive buffer reg */
+
+#ifdef CONFIG_AM33_2
+#define SC2STR __SYSREG(0xd400202c, u8) /* status reg */
+#else /* CONFIG_AM33_2 */
+#define SC2STR __SYSREG(0xd400202c, u16) /* status reg */
+#endif /* CONFIG_AM33_2 */
+#define SC2STR_OEF 0x0001 /* overrun error found */
+#define SC2STR_PEF 0x0002 /* parity error found */
+#define SC2STR_FEF 0x0004 /* framing error found */
+#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
+#define SC2STR_RBF 0x0010 /* receive buffer status */
+#define SC2STR_TBF 0x0020 /* transmit buffer status */
+#define SC2STR_RXF 0x0040 /* receive status */
+#define SC2STR_TXF 0x0080 /* transmit status */
+
+#ifdef CONFIG_AM33_2
+#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
+#endif
+
+#ifdef CONFIG_AM33_2
+#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
+#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
+#else /* CONFIG_AM33_2 */
+#define SC2RXIRQ 68 /* serial 2 Receive IRQ */
+#define SC2TXIRQ 69 /* serial 2 Transmit IRQ */
+#endif /* CONFIG_AM33_2 */
+
+#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
+#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/mn10300/include/asm/serial.h b/arch/mn10300/include/asm/serial.h
new file mode 100644
index 00000000000..23a79929359
--- /dev/null
+++ b/arch/mn10300/include/asm/serial.h
@@ -0,0 +1,36 @@
+/* Standard UART definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SERIAL_H
+#define _ASM_SERIAL_H
+
+/* Standard COM flags (except for COM4, because of the 8514 problem) */
+#ifdef CONFIG_SERIAL_DETECT_IRQ
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
+#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
+#else
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
+#endif
+
+#ifdef CONFIG_SERIAL_MANY_PORTS
+#define FOURPORT_FLAGS ASYNC_FOURPORT
+#define ACCENT_FLAGS 0
+#define BOCA_FLAGS 0
+#define HUB6_FLAGS 0
+#define RS_TABLE_SIZE 64
+#else
+#define RS_TABLE_SIZE
+#endif
+
+#include <unit/serial.h>
+
+#endif /* _ASM_SERIAL_H */
diff --git a/arch/mn10300/include/asm/setup.h b/arch/mn10300/include/asm/setup.h
new file mode 100644
index 00000000000..c229d1e3f99
--- /dev/null
+++ b/arch/mn10300/include/asm/setup.h
@@ -0,0 +1,18 @@
+/* MN10300 Setup declarations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SETUP_H
+#define _ASM_SETUP_H
+
+#ifdef __KERNEL__
+extern void __init unit_setup(void);
+extern void __init unit_init_IRQ(void);
+#endif
+#endif /* _ASM_SETUP_H */
diff --git a/arch/mn10300/include/asm/shmbuf.h b/arch/mn10300/include/asm/shmbuf.h
new file mode 100644
index 00000000000..8f300cc35d6
--- /dev/null
+++ b/arch/mn10300/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
+#ifndef _ASM_SHMBUF_H
+#define _ASM_SHMBUF_H
+
+/*
+ * The shmid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+ struct ipc64_perm shm_perm; /* operation perms */
+ size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_time_t shm_atime; /* last attach time */
+ unsigned long __unused1;
+ __kernel_time_t shm_dtime; /* last detach time */
+ unsigned long __unused2;
+ __kernel_time_t shm_ctime; /* last change time */
+ unsigned long __unused3;
+ __kernel_pid_t shm_cpid; /* pid of creator */
+ __kernel_pid_t shm_lpid; /* pid of last operator */
+ unsigned long shm_nattch; /* no. of current attaches */
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+struct shminfo64 {
+ unsigned long shmmax;
+ unsigned long shmmin;
+ unsigned long shmmni;
+ unsigned long shmseg;
+ unsigned long shmall;
+ unsigned long __unused1;
+ unsigned long __unused2;
+ unsigned long __unused3;
+ unsigned long __unused4;
+};
+
+#endif /* _ASM_SHMBUF_H */
diff --git a/arch/mn10300/include/asm/shmparam.h b/arch/mn10300/include/asm/shmparam.h
new file mode 100644
index 00000000000..ab666ed1a07
--- /dev/null
+++ b/arch/mn10300/include/asm/shmparam.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SHMPARAM_H
+#define _ASM_SHMPARAM_H
+
+#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
+
+#endif /* _ASM_SHMPARAM_H */
diff --git a/arch/mn10300/include/asm/sigcontext.h b/arch/mn10300/include/asm/sigcontext.h
new file mode 100644
index 00000000000..4de3afff4ad
--- /dev/null
+++ b/arch/mn10300/include/asm/sigcontext.h
@@ -0,0 +1,52 @@
+/* MN10300 Userspace signal context
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SIGCONTEXT_H
+#define _ASM_SIGCONTEXT_H
+
+struct fpucontext {
+ /* Regular FPU environment */
+ unsigned long fs[32]; /* fpu registers */
+ unsigned long fpcr; /* fpu control register */
+};
+
+struct sigcontext {
+ unsigned long d0;
+ unsigned long d1;
+ unsigned long d2;
+ unsigned long d3;
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+ unsigned long e0;
+ unsigned long e1;
+ unsigned long e2;
+ unsigned long e3;
+ unsigned long e4;
+ unsigned long e5;
+ unsigned long e6;
+ unsigned long e7;
+ unsigned long lar;
+ unsigned long lir;
+ unsigned long mdr;
+ unsigned long mcvf;
+ unsigned long mcrl;
+ unsigned long mcrh;
+ unsigned long mdrq;
+ unsigned long sp;
+ unsigned long epsw;
+ unsigned long pc;
+ struct fpucontext *fpucontext;
+ unsigned long oldmask;
+};
+
+
+#endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mn10300/include/asm/siginfo.h b/arch/mn10300/include/asm/siginfo.h
new file mode 100644
index 00000000000..0815d29d82e
--- /dev/null
+++ b/arch/mn10300/include/asm/siginfo.h
@@ -0,0 +1 @@
+#include <asm-generic/siginfo.h>
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
new file mode 100644
index 00000000000..1865d72a86f
--- /dev/null
+++ b/arch/mn10300/include/asm/signal.h
@@ -0,0 +1,171 @@
+/* MN10300 Signal definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SIGNAL_H
+#define _ASM_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems. */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+ is taken to make libc match. */
+
+#define _NSIG 64
+#define _NSIG_BPW 32
+#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t; /* at least 32 bits */
+
+typedef struct {
+ unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+#else
+/* Here we must cater to libcs that poke about in kernel headers. */
+
+#define NSIG 32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP 1
+#define SIGINT 2
+#define SIGQUIT 3
+#define SIGILL 4
+#define SIGTRAP 5
+#define SIGABRT 6
+#define SIGIOT 6
+#define SIGBUS 7
+#define SIGFPE 8
+#define SIGKILL 9
+#define SIGUSR1 10
+#define SIGSEGV 11
+#define SIGUSR2 12
+#define SIGPIPE 13
+#define SIGALRM 14
+#define SIGTERM 15
+#define SIGSTKFLT 16
+#define SIGCHLD 17
+#define SIGCONT 18
+#define SIGSTOP 19
+#define SIGTSTP 20
+#define SIGTTIN 21
+#define SIGTTOU 22
+#define SIGURG 23
+#define SIGXCPU 24
+#define SIGXFSZ 25
+#define SIGVTALRM 26
+#define SIGPROF 27
+#define SIGWINCH 28
+#define SIGIO 29
+#define SIGPOLL SIGIO
+/*
+#define SIGLOST 29
+*/
+#define SIGPWR 30
+#define SIGSYS 31
+#define SIGUNUSED 31
+
+/* These should not be considered constants from userland. */
+#define SIGRTMIN 32
+#define SIGRTMAX _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP 0x00000001U
+#define SA_NOCLDWAIT 0x00000002U
+#define SA_SIGINFO 0x00000004U
+#define SA_ONSTACK 0x08000000U
+#define SA_RESTART 0x10000000U
+#define SA_NODEFER 0x40000000U
+#define SA_RESETHAND 0x80000000U
+
+#define SA_NOMASK SA_NODEFER
+#define SA_ONESHOT SA_RESETHAND
+
+#define SA_RESTORER 0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK 1
+#define SS_DISABLE 2
+
+#define MINSIGSTKSZ 2048
+#define SIGSTKSZ 8192
+
+#include <asm-generic/signal-defs.h>
+
+#ifdef __KERNEL__
+struct old_sigaction {
+ __sighandler_t sa_handler;
+ old_sigset_t sa_mask;
+ unsigned long sa_flags;
+ __sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+ __sighandler_t sa_handler;
+ unsigned long sa_flags;
+ __sigrestore_t sa_restorer;
+ sigset_t sa_mask; /* mask last for extensibility */
+};
+
+struct k_sigaction {
+ struct sigaction sa;
+};
+#else
+/* Here we must cater to libcs that poke about in kernel headers. */
+
+struct sigaction {
+ union {
+ __sighandler_t _sa_handler;
+ void (*_sa_sigaction)(int, struct siginfo *, void *);
+ } _u;
+ sigset_t sa_mask;
+ unsigned long sa_flags;
+ void (*sa_restorer)(void);
+};
+
+#define sa_handler _u._sa_handler
+#define sa_sigaction _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+ void __user *ss_sp;
+ int ss_flags;
+ size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+
+
+struct pt_regs;
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h
new file mode 100644
index 00000000000..6745dbe6494
--- /dev/null
+++ b/arch/mn10300/include/asm/smp.h
@@ -0,0 +1,107 @@
+/* MN10300 SMP support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * Modified by Matsushita Electric Industrial Co., Ltd.
+ * Modifications:
+ * 13-Nov-2006 MEI Define IPI-IRQ number and add inline/macro function
+ * for SMP support.
+ * 22-Jan-2007 MEI Add the define related to SMP_BOOT_IRQ.
+ * 23-Feb-2007 MEI Add the define related to SMP icahce invalidate.
+ * 23-Jun-2008 MEI Delete INTC_IPI.
+ * 22-Jul-2008 MEI Add smp_nmi_call_function and related defines.
+ * 04-Aug-2008 MEI Delete USE_DOIRQ_CACHE_IPI.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SMP_H
+#define _ASM_SMP_H
+
+#ifndef __ASSEMBLY__
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#endif
+
+#ifdef CONFIG_SMP
+#include <proc/smp-regs.h>
+
+#define RESCHEDULE_IPI 63
+#define CALL_FUNC_SINGLE_IPI 192
+#define LOCAL_TIMER_IPI 193
+#define FLUSH_CACHE_IPI 194
+#define CALL_FUNCTION_NMI_IPI 195
+#define DEBUGGER_NMI_IPI 196
+
+#define SMP_BOOT_IRQ 195
+
+#define RESCHEDULE_GxICR_LV GxICR_LEVEL_6
+#define CALL_FUNCTION_GxICR_LV GxICR_LEVEL_4
+#define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4
+#define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0
+#define SMP_BOOT_GxICR_LV GxICR_LEVEL_0
+#define DEBUGGER_GxICR_LV CONFIG_DEBUGGER_IRQ_LEVEL
+
+#define TIME_OUT_COUNT_BOOT_IPI 100
+#define DELAY_TIME_BOOT_IPI 75000
+
+
+#ifndef __ASSEMBLY__
+
+/**
+ * raw_smp_processor_id - Determine the raw CPU ID of the CPU running it
+ *
+ * What we really want to do is to use the CPUID hardware CPU register to get
+ * this information, but accesses to that aren't cached, and run at system bus
+ * speed, not CPU speed. A copy of this value is, however, stored in the
+ * thread_info struct, and that can be cached.
+ *
+ * An alternate way of dealing with this could be to use the EPSW.S bits to
+ * cache this information for systems with up to four CPUs.
+ */
+#define arch_smp_processor_id() (CPUID)
+#if 0
+#define raw_smp_processor_id() (arch_smp_processor_id())
+#else
+#define raw_smp_processor_id() (current_thread_info()->cpu)
+#endif
+
+static inline int cpu_logical_map(int cpu)
+{
+ return cpu;
+}
+
+static inline int cpu_number_map(int cpu)
+{
+ return cpu;
+}
+
+
+extern cpumask_t cpu_boot_map;
+
+extern void smp_init_cpus(void);
+extern void smp_cache_interrupt(void);
+extern void send_IPI_allbutself(int irq);
+extern int smp_nmi_call_function(smp_call_func_t func, void *info, int wait);
+
+extern void arch_send_call_function_single_ipi(int cpu);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
+
+#ifdef CONFIG_HOTPLUG_CPU
+extern int __cpu_disable(void);
+extern void __cpu_die(unsigned int cpu);
+#endif /* CONFIG_HOTPLUG_CPU */
+
+#endif /* __ASSEMBLY__ */
+#else /* CONFIG_SMP */
+#ifndef __ASSEMBLY__
+
+static inline void smp_init_cpus(void) {}
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_SMP */
+
+#endif /* _ASM_SMP_H */
diff --git a/arch/mn10300/include/asm/smsc911x.h b/arch/mn10300/include/asm/smsc911x.h
new file mode 100644
index 00000000000..2fcd1080322
--- /dev/null
+++ b/arch/mn10300/include/asm/smsc911x.h
@@ -0,0 +1 @@
+#include <unit/smsc911x.h>
diff --git a/arch/mn10300/include/asm/socket.h b/arch/mn10300/include/asm/socket.h
new file mode 100644
index 00000000000..876356d7852
--- /dev/null
+++ b/arch/mn10300/include/asm/socket.h
@@ -0,0 +1,68 @@
+#ifndef _ASM_SOCKET_H
+#define _ASM_SOCKET_H
+
+#include <asm/sockios.h>
+
+/* For setsockopt(2) */
+#define SOL_SOCKET 1
+
+#define SO_DEBUG 1
+#define SO_REUSEADDR 2
+#define SO_TYPE 3
+#define SO_ERROR 4
+#define SO_DONTROUTE 5
+#define SO_BROADCAST 6
+#define SO_SNDBUF 7
+#define SO_RCVBUF 8
+#define SO_SNDBUFFORCE 32
+#define SO_RCVBUFFORCE 33
+#define SO_KEEPALIVE 9
+#define SO_OOBINLINE 10
+#define SO_NO_CHECK 11
+#define SO_PRIORITY 12
+#define SO_LINGER 13
+#define SO_BSDCOMPAT 14
+/* To add :#define SO_REUSEPORT 15 */
+#define SO_PASSCRED 16
+#define SO_PEERCRED 17
+#define SO_RCVLOWAT 18
+#define SO_SNDLOWAT 19
+#define SO_RCVTIMEO 20
+#define SO_SNDTIMEO 21
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION 22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
+#define SO_SECURITY_ENCRYPTION_NETWORK 24
+
+#define SO_BINDTODEVICE 25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER 26
+#define SO_DETACH_FILTER 27
+
+#define SO_PEERNAME 28
+#define SO_TIMESTAMP 29
+#define SCM_TIMESTAMP SO_TIMESTAMP
+
+#define SO_ACCEPTCONN 30
+
+#define SO_PEERSEC 31
+#define SO_PASSSEC 34
+#define SO_TIMESTAMPNS 35
+#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
+
+#define SO_MARK 36
+
+#define SO_TIMESTAMPING 37
+#define SCM_TIMESTAMPING SO_TIMESTAMPING
+
+#define SO_PROTOCOL 38
+#define SO_DOMAIN 39
+
+#define SO_RXQ_OVFL 40
+
+#define SO_WIFI_STATUS 41
+#define SCM_WIFI_STATUS SO_WIFI_STATUS
+
+#endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/include/asm/sockios.h b/arch/mn10300/include/asm/sockios.h
new file mode 100644
index 00000000000..b03043a1c56
--- /dev/null
+++ b/arch/mn10300/include/asm/sockios.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_SOCKIOS_H
+#define _ASM_SOCKIOS_H
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN 0x8901
+#define SIOCSPGRP 0x8902
+#define FIOGETOWN 0x8903
+#define SIOCGPGRP 0x8904
+#define SIOCATMARK 0x8905
+#define SIOCGSTAMP 0x8906 /* Get stamp */
+#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
+
+#endif /* _ASM_SOCKIOS_H */
diff --git a/arch/mn10300/include/asm/spinlock.h b/arch/mn10300/include/asm/spinlock.h
new file mode 100644
index 00000000000..1ae580f3893
--- /dev/null
+++ b/arch/mn10300/include/asm/spinlock.h
@@ -0,0 +1,193 @@
+/* MN10300 spinlock support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SPINLOCK_H
+#define _ASM_SPINLOCK_H
+
+#include <linux/atomic.h>
+#include <asm/rwlock.h>
+#include <asm/page.h>
+
+/*
+ * Simple spin lock operations. There are two variants, one clears IRQ's
+ * on the local processor, one does not.
+ *
+ * We make no fairness assumptions. They have a cost.
+ */
+
+#define arch_spin_is_locked(x) (*(volatile signed char *)(&(x)->slock) != 0)
+#define arch_spin_unlock_wait(x) do { barrier(); } while (arch_spin_is_locked(x))
+
+static inline void arch_spin_unlock(arch_spinlock_t *lock)
+{
+ asm volatile(
+ " bclr 1,(0,%0) \n"
+ :
+ : "a"(&lock->slock)
+ : "memory", "cc");
+}
+
+static inline int arch_spin_trylock(arch_spinlock_t *lock)
+{
+ int ret;
+
+ asm volatile(
+ " mov 1,%0 \n"
+ " bset %0,(%1) \n"
+ " bne 1f \n"
+ " clr %0 \n"
+ "1: xor 1,%0 \n"
+ : "=d"(ret)
+ : "a"(&lock->slock)
+ : "memory", "cc");
+
+ return ret;
+}
+
+static inline void arch_spin_lock(arch_spinlock_t *lock)
+{
+ asm volatile(
+ "1: bset 1,(0,%0) \n"
+ " bne 1b \n"
+ :
+ : "a"(&lock->slock)
+ : "memory", "cc");
+}
+
+static inline void arch_spin_lock_flags(arch_spinlock_t *lock,
+ unsigned long flags)
+{
+ int temp;
+
+ asm volatile(
+ "1: bset 1,(0,%2) \n"
+ " beq 3f \n"
+ " mov %1,epsw \n"
+ "2: mov (0,%2),%0 \n"
+ " or %0,%0 \n"
+ " bne 2b \n"
+ " mov %3,%0 \n"
+ " mov %0,epsw \n"
+ " nop \n"
+ " nop \n"
+ " bra 1b\n"
+ "3: \n"
+ : "=&d" (temp)
+ : "d" (flags), "a"(&lock->slock), "i"(EPSW_IE | MN10300_CLI_LEVEL)
+ : "memory", "cc");
+}
+
+#ifdef __KERNEL__
+
+/*
+ * Read-write spinlocks, allowing multiple readers
+ * but only one writer.
+ *
+ * NOTE! it is quite common to have readers in interrupts
+ * but no interrupt writers. For those circumstances we
+ * can "mix" irq-safe locks - any writer needs to get a
+ * irq-safe write-lock, but readers can get non-irqsafe
+ * read-locks.
+ */
+
+/**
+ * read_can_lock - would read_trylock() succeed?
+ * @lock: the rwlock in question.
+ */
+#define arch_read_can_lock(x) ((int)(x)->lock > 0)
+
+/**
+ * write_can_lock - would write_trylock() succeed?
+ * @lock: the rwlock in question.
+ */
+#define arch_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
+
+/*
+ * On mn10300, we implement read-write locks as a 32-bit counter
+ * with the high bit (sign) being the "contended" bit.
+ */
+static inline void arch_read_lock(arch_rwlock_t *rw)
+{
+#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+ __build_read_lock(rw, "__read_lock_failed");
+#else
+ {
+ atomic_t *count = (atomic_t *)rw;
+ while (atomic_dec_return(count) < 0)
+ atomic_inc(count);
+ }
+#endif
+}
+
+static inline void arch_write_lock(arch_rwlock_t *rw)
+{
+#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+ __build_write_lock(rw, "__write_lock_failed");
+#else
+ {
+ atomic_t *count = (atomic_t *)rw;
+ while (!atomic_sub_and_test(RW_LOCK_BIAS, count))
+ atomic_add(RW_LOCK_BIAS, count);
+ }
+#endif
+}
+
+static inline void arch_read_unlock(arch_rwlock_t *rw)
+{
+#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+ __build_read_unlock(rw);
+#else
+ {
+ atomic_t *count = (atomic_t *)rw;
+ atomic_inc(count);
+ }
+#endif
+}
+
+static inline void arch_write_unlock(arch_rwlock_t *rw)
+{
+#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
+ __build_write_unlock(rw);
+#else
+ {
+ atomic_t *count = (atomic_t *)rw;
+ atomic_add(RW_LOCK_BIAS, count);
+ }
+#endif
+}
+
+static inline int arch_read_trylock(arch_rwlock_t *lock)
+{
+ atomic_t *count = (atomic_t *)lock;
+ atomic_dec(count);
+ if (atomic_read(count) >= 0)
+ return 1;
+ atomic_inc(count);
+ return 0;
+}
+
+static inline int arch_write_trylock(arch_rwlock_t *lock)
+{
+ atomic_t *count = (atomic_t *)lock;
+ if (atomic_sub_and_test(RW_LOCK_BIAS, count))
+ return 1;
+ atomic_add(RW_LOCK_BIAS, count);
+ return 0;
+}
+
+#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
+#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
+
+#define _raw_spin_relax(lock) cpu_relax()
+#define _raw_read_relax(lock) cpu_relax()
+#define _raw_write_relax(lock) cpu_relax()
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/mn10300/include/asm/spinlock_types.h b/arch/mn10300/include/asm/spinlock_types.h
new file mode 100644
index 00000000000..653dc519b40
--- /dev/null
+++ b/arch/mn10300/include/asm/spinlock_types.h
@@ -0,0 +1,20 @@
+#ifndef _ASM_SPINLOCK_TYPES_H
+#define _ASM_SPINLOCK_TYPES_H
+
+#ifndef __LINUX_SPINLOCK_TYPES_H
+# error "please don't include this file directly"
+#endif
+
+typedef struct arch_spinlock {
+ unsigned int slock;
+} arch_spinlock_t;
+
+#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
+
+typedef struct {
+ unsigned int lock;
+} arch_rwlock_t;
+
+#define __ARCH_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
+
+#endif /* _ASM_SPINLOCK_TYPES_H */
diff --git a/arch/mn10300/include/asm/stat.h b/arch/mn10300/include/asm/stat.h
new file mode 100644
index 00000000000..63ff8371cf2
--- /dev/null
+++ b/arch/mn10300/include/asm/stat.h
@@ -0,0 +1,78 @@
+#ifndef _ASM_STAT_H
+#define _ASM_STAT_H
+
+struct __old_kernel_stat {
+ unsigned short st_dev;
+ unsigned short st_ino;
+ unsigned short st_mode;
+ unsigned short st_nlink;
+ unsigned short st_uid;
+ unsigned short st_gid;
+ unsigned short st_rdev;
+ unsigned long st_size;
+ unsigned long st_atime;
+ unsigned long st_mtime;
+ unsigned long st_ctime;
+};
+
+struct stat {
+ unsigned long st_dev;
+ unsigned long st_ino;
+ unsigned short st_mode;
+ unsigned short st_nlink;
+ unsigned short st_uid;
+ unsigned short st_gid;
+ unsigned long st_rdev;
+ unsigned long st_size;
+ unsigned long st_blksize;
+ unsigned long st_blocks;
+ unsigned long st_atime;
+ unsigned long st_atime_nsec;
+ unsigned long st_mtime;
+ unsigned long st_mtime_nsec;
+ unsigned long st_ctime;
+ unsigned long st_ctime_nsec;
+ unsigned long __unused4;
+ unsigned long __unused5;
+};
+
+/* This matches struct stat64 in glibc2.1, hence the absolutely
+ * insane amounts of padding around dev_t's.
+ */
+struct stat64 {
+ unsigned long long st_dev;
+ unsigned char __pad0[4];
+
+#define STAT64_HAS_BROKEN_ST_INO 1
+ unsigned long __st_ino;
+
+ unsigned int st_mode;
+ unsigned int st_nlink;
+
+ unsigned long st_uid;
+ unsigned long st_gid;
+
+ unsigned long long st_rdev;
+ unsigned char __pad3[4];
+
+ long long st_size;
+ unsigned long st_blksize;
+
+ unsigned long st_blocks; /* Number 512-byte blocks allocated. */
+ unsigned long __pad4; /* future possible st_blocks high bits */
+
+ unsigned long st_atime;
+ unsigned long st_atime_nsec;
+
+ unsigned long st_mtime;
+ unsigned int st_mtime_nsec;
+
+ unsigned long st_ctime;
+ unsigned long st_ctime_nsec;
+
+ unsigned long long st_ino;
+};
+
+#define STAT_HAVE_NSEC 1
+
+#endif /* _ASM_STAT_H */
diff --git a/arch/mn10300/include/asm/statfs.h b/arch/mn10300/include/asm/statfs.h
new file mode 100644
index 00000000000..0b91fe198c2
--- /dev/null
+++ b/arch/mn10300/include/asm/statfs.h
@@ -0,0 +1 @@
+#include <asm-generic/statfs.h>
diff --git a/arch/mn10300/include/asm/string.h b/arch/mn10300/include/asm/string.h
new file mode 100644
index 00000000000..47dbd4346c3
--- /dev/null
+++ b/arch/mn10300/include/asm/string.h
@@ -0,0 +1,32 @@
+/* MN10300 Optimised string functions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_STRING_H
+#define _ASM_STRING_H
+
+#define __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMCPY
+#define __HAVE_ARCH_MEMMOVE
+
+extern void *memset(void *dest, int ch, size_t count);
+extern void *memcpy(void *dest, const void *src, size_t count);
+extern void *memmove(void *dest, const void *src, size_t count);
+
+
+extern void __struct_cpy_bug(void);
+#define struct_cpy(x, y) \
+({ \
+ if (sizeof(*(x)) != sizeof(*(y))) \
+ __struct_cpy_bug; \
+ memcpy(x, y, sizeof(*(x))); \
+})
+
+#endif /* _ASM_STRING_H */
diff --git a/arch/mn10300/include/asm/swab.h b/arch/mn10300/include/asm/swab.h
new file mode 100644
index 00000000000..bd818a820ca
--- /dev/null
+++ b/arch/mn10300/include/asm/swab.h
@@ -0,0 +1,42 @@
+/* MN10300 Byte-order primitive construction
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SWAB_H
+#define _ASM_SWAB_H
+
+#include <linux/types.h>
+
+#ifdef __GNUC__
+
+static inline __attribute__((const))
+__u32 __arch_swab32(__u32 x)
+{
+ __u32 ret;
+ asm("swap %1,%0" : "=r" (ret) : "r" (x));
+ return ret;
+}
+#define __arch_swab32 __arch_swab32
+
+static inline __attribute__((const))
+__u16 __arch_swab16(__u16 x)
+{
+ __u16 ret;
+ asm("swaph %1,%0" : "=r" (ret) : "r" (x));
+ return ret;
+}
+#define __arch_swab32 __arch_swab32
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __SWAB_64_THRU_32__
+#endif
+
+#endif /* __GNUC__ */
+
+#endif /* _ASM_SWAB_H */
diff --git a/arch/mn10300/include/asm/syscall.h b/arch/mn10300/include/asm/syscall.h
new file mode 100644
index 00000000000..b44b0bb75a0
--- /dev/null
+++ b/arch/mn10300/include/asm/syscall.h
@@ -0,0 +1,117 @@
+/* Access to user system call parameters and results
+ *
+ * See asm-generic/syscall.h for function descriptions.
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SYSCALL_H
+#define _ASM_SYSCALL_H
+
+#include <linux/sched.h>
+#include <linux/err.h>
+
+extern const unsigned long sys_call_table[];
+
+static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+ return regs->orig_d0;
+}
+
+static inline void syscall_rollback(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ regs->d0 = regs->orig_d0;
+}
+
+static inline long syscall_get_error(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ unsigned long error = regs->d0;
+ return IS_ERR_VALUE(error) ? error : 0;
+}
+
+static inline long syscall_get_return_value(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ return regs->d0;
+}
+
+static inline void syscall_set_return_value(struct task_struct *task,
+ struct pt_regs *regs,
+ int error, long val)
+{
+ regs->d0 = (long) error ?: val;
+}
+
+static inline void syscall_get_arguments(struct task_struct *task,
+ struct pt_regs *regs,
+ unsigned int i, unsigned int n,
+ unsigned long *args)
+{
+ switch (i) {
+ case 0:
+ if (!n--) break;
+ *args++ = regs->a0;
+ case 1:
+ if (!n--) break;
+ *args++ = regs->d1;
+ case 2:
+ if (!n--) break;
+ *args++ = regs->a3;
+ case 3:
+ if (!n--) break;
+ *args++ = regs->a2;
+ case 4:
+ if (!n--) break;
+ *args++ = regs->d3;
+ case 5:
+ if (!n--) break;
+ *args++ = regs->d2;
+ case 6:
+ if (!n--) break;
+ default:
+ BUG();
+ break;
+ }
+}
+
+static inline void syscall_set_arguments(struct task_struct *task,
+ struct pt_regs *regs,
+ unsigned int i, unsigned int n,
+ const unsigned long *args)
+{
+ switch (i) {
+ case 0:
+ if (!n--) break;
+ regs->a0 = *args++;
+ case 1:
+ if (!n--) break;
+ regs->d1 = *args++;
+ case 2:
+ if (!n--) break;
+ regs->a3 = *args++;
+ case 3:
+ if (!n--) break;
+ regs->a2 = *args++;
+ case 4:
+ if (!n--) break;
+ regs->d3 = *args++;
+ case 5:
+ if (!n--) break;
+ regs->d2 = *args++;
+ case 6:
+ if (!n--) break;
+ default:
+ BUG();
+ break;
+ }
+}
+
+#endif /* _ASM_SYSCALL_H */
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
new file mode 100644
index 00000000000..94b4c5e1491
--- /dev/null
+++ b/arch/mn10300/include/asm/system.h
@@ -0,0 +1,102 @@
+/* MN10300 System definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SYSTEM_H
+#define _ASM_SYSTEM_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#include <linux/kernel.h>
+#include <linux/irqflags.h>
+#include <linux/atomic.h>
+
+#if !defined(CONFIG_LAZY_SAVE_FPU)
+struct fpu_state_struct;
+extern asmlinkage void fpu_save(struct fpu_state_struct *);
+#define switch_fpu(prev, next) \
+ do { \
+ if ((prev)->thread.fpu_flags & THREAD_HAS_FPU) { \
+ (prev)->thread.fpu_flags &= ~THREAD_HAS_FPU; \
+ (prev)->thread.uregs->epsw &= ~EPSW_FE; \
+ fpu_save(&(prev)->thread.fpu_state); \
+ } \
+ } while (0)
+#else
+#define switch_fpu(prev, next) do {} while (0)
+#endif
+
+struct task_struct;
+struct thread_struct;
+
+extern asmlinkage
+struct task_struct *__switch_to(struct thread_struct *prev,
+ struct thread_struct *next,
+ struct task_struct *prev_task);
+
+/* context switching is now performed out-of-line in switch_to.S */
+#define switch_to(prev, next, last) \
+do { \
+ switch_fpu(prev, next); \
+ current->thread.wchan = (u_long) __builtin_return_address(0); \
+ (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
+ mb(); \
+ current->thread.wchan = 0; \
+} while (0)
+
+#define arch_align_stack(x) (x)
+
+#define nop() asm volatile ("nop")
+
+/*
+ * Force strict CPU ordering.
+ * And yes, this is required on UP too when we're talking
+ * to devices.
+ *
+ * For now, "wmb()" doesn't actually do anything, as all
+ * Intel CPU's follow what Intel calls a *Processor Order*,
+ * in which all writes are seen in the program order even
+ * outside the CPU.
+ *
+ * I expect future Intel CPU's to have a weaker ordering,
+ * but I'd also expect them to finally get their act together
+ * and add some real memory barriers if so.
+ *
+ * Some non intel clones support out of order store. wmb() ceases to be a
+ * nop for these.
+ */
+
+#define mb() asm volatile ("": : :"memory")
+#define rmb() mb()
+#define wmb() asm volatile ("": : :"memory")
+
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define set_mb(var, value) do { xchg(&var, value); } while (0)
+#else /* CONFIG_SMP */
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#endif /* CONFIG_SMP */
+
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#define read_barrier_depends() do {} while (0)
+#define smp_read_barrier_depends() do {} while (0)
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mn10300/include/asm/termbits.h b/arch/mn10300/include/asm/termbits.h
new file mode 100644
index 00000000000..130d4249597
--- /dev/null
+++ b/arch/mn10300/include/asm/termbits.h
@@ -0,0 +1,201 @@
+#ifndef _ASM_TERMBITS_H
+#define _ASM_TERMBITS_H
+
+#include <linux/posix_types.h>
+
+typedef unsigned char cc_t;
+typedef unsigned int speed_t;
+typedef unsigned int tcflag_t;
+
+#define NCCS 19
+struct termios {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_line; /* line discipline */
+ cc_t c_cc[NCCS]; /* control characters */
+};
+
+struct termios2 {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_line; /* line discipline */
+ cc_t c_cc[NCCS]; /* control characters */
+ speed_t c_ispeed; /* input speed */
+ speed_t c_ospeed; /* output speed */
+};
+
+struct ktermios {
+ tcflag_t c_iflag; /* input mode flags */
+ tcflag_t c_oflag; /* output mode flags */
+ tcflag_t c_cflag; /* control mode flags */
+ tcflag_t c_lflag; /* local mode flags */
+ cc_t c_line; /* line discipline */
+ cc_t c_cc[NCCS]; /* control characters */
+ speed_t c_ispeed; /* input speed */
+ speed_t c_ospeed; /* output speed */
+};
+
+/* c_cc characters */
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+
+/* c_iflag bits */
+#define IGNBRK 0000001
+#define BRKINT 0000002
+#define IGNPAR 0000004
+#define PARMRK 0000010
+#define INPCK 0000020
+#define ISTRIP 0000040
+#define INLCR 0000100
+#define IGNCR 0000200
+#define ICRNL 0000400
+#define IUCLC 0001000
+#define IXON 0002000
+#define IXANY 0004000
+#define IXOFF 0010000
+#define IMAXBEL 0020000
+#define IUTF8 0040000
+
+/* c_oflag bits */
+#define OPOST 0000001
+#define OLCUC 0000002
+#define ONLCR 0000004
+#define OCRNL 0000010
+#define ONOCR 0000020
+#define ONLRET 0000040
+#define OFILL 0000100
+#define OFDEL 0000200
+#define NLDLY 0000400
+#define NL0 0000000
+#define NL1 0000400
+#define CRDLY 0003000
+#define CR0 0000000
+#define CR1 0001000
+#define CR2 0002000
+#define CR3 0003000
+#define TABDLY 0014000
+#define TAB0 0000000
+#define TAB1 0004000
+#define TAB2 0010000
+#define TAB3 0014000
+#define XTABS 0014000
+#define BSDLY 0020000
+#define BS0 0000000
+#define BS1 0020000
+#define VTDLY 0040000
+#define VT0 0000000
+#define VT1 0040000
+#define FFDLY 0100000
+#define FF0 0000000
+#define FF1 0100000
+
+/* c_cflag bit meaning */
+#define CBAUD 0010017
+#define B0 0000000 /* hang up */
+#define B50 0000001
+#define B75 0000002
+#define B110 0000003
+#define B134 0000004
+#define B150 0000005
+#define B200 0000006
+#define B300 0000007
+#define B600 0000010
+#define B1200 0000011
+#define B1800 0000012
+#define B2400 0000013
+#define B4800 0000014
+#define B9600 0000015
+#define B19200 0000016
+#define B38400 0000017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE 0000060
+#define CS5 0000000
+#define CS6 0000020
+#define CS7 0000040
+#define CS8 0000060
+#define CSTOPB 0000100
+#define CREAD 0000200
+#define PARENB 0000400
+#define PARODD 0001000
+#define HUPCL 0002000
+#define CLOCAL 0004000
+#define CBAUDEX 0010000
+#define BOTHER 0010000
+#define B57600 0010001
+#define B115200 0010002
+#define B230400 0010003
+#define B460800 0010004
+#define B500000 0010005
+#define B576000 0010006
+#define B921600 0010007
+#define B1000000 0010010
+#define B1152000 0010011
+#define B1500000 0010012
+#define B2000000 0010013
+#define B2500000 0010014
+#define B3000000 0010015
+#define B3500000 0010016
+#define B4000000 0010017
+#define CIBAUD 002003600000 /* input baud rate (not used) */
+#define CTVB 004000000000 /* VisioBraille Terminal flow control */
+#define CMSPAR 010000000000 /* mark or space (stick) parity */
+#define CRTSCTS 020000000000 /* flow control */
+
+#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
+
+/* c_lflag bits */
+#define ISIG 0000001
+#define ICANON 0000002
+#define XCASE 0000004
+#define ECHO 0000010
+#define ECHOE 0000020
+#define ECHOK 0000040
+#define ECHONL 0000100
+#define NOFLSH 0000200
+#define TOSTOP 0000400
+#define ECHOCTL 0001000
+#define ECHOPRT 0002000
+#define ECHOKE 0004000
+#define FLUSHO 0010000
+#define PENDIN 0040000
+#define IEXTEN 0100000
+#define EXTPROC 0200000
+
+/* tcflow() and TCXONC use these */
+#define TCOOFF 0
+#define TCOON 1
+#define TCIOFF 2
+#define TCION 3
+
+/* tcflush() and TCFLSH use these */
+#define TCIFLUSH 0
+#define TCOFLUSH 1
+#define TCIOFLUSH 2
+
+/* tcsetattr uses these */
+#define TCSANOW 0
+#define TCSADRAIN 1
+#define TCSAFLUSH 2
+
+#endif /* _ASM_TERMBITS_H */
diff --git a/arch/mn10300/include/asm/termios.h b/arch/mn10300/include/asm/termios.h
new file mode 100644
index 00000000000..dd7cf617e11
--- /dev/null
+++ b/arch/mn10300/include/asm/termios.h
@@ -0,0 +1,92 @@
+#ifndef _ASM_TERMIOS_H
+#define _ASM_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+ unsigned short ws_row;
+ unsigned short ws_col;
+ unsigned short ws_xpixel;
+ unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+ unsigned short c_iflag; /* input mode flags */
+ unsigned short c_oflag; /* output mode flags */
+ unsigned short c_cflag; /* control mode flags */
+ unsigned short c_lflag; /* local mode flags */
+ unsigned char c_line; /* line discipline */
+ unsigned char c_cc[NCC]; /* control characters */
+};
+
+#ifdef __KERNEL__
+/* intr=^C quit=^| erase=del kill=^U
+ eof=^D vtime=\0 vmin=\1 sxtc=\0
+ start=^Q stop=^S susp=^Z eol=\0
+ reprint=^R discard=^U werase=^W lnext=^V
+ eol2=\0
+*/
+#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
+#endif
+
+/* modem lines */
+#define TIOCM_LE 0x001
+#define TIOCM_DTR 0x002
+#define TIOCM_RTS 0x004
+#define TIOCM_ST 0x008
+#define TIOCM_SR 0x010
+#define TIOCM_CTS 0x020
+#define TIOCM_CAR 0x040
+#define TIOCM_RNG 0x080
+#define TIOCM_DSR 0x100
+#define TIOCM_CD TIOCM_CAR
+#define TIOCM_RI TIOCM_RNG
+#define TIOCM_OUT1 0x2000
+#define TIOCM_OUT2 0x4000
+#define TIOCM_LOOP 0x8000
+
+#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
+
+/*
+ * Translate a "termio" structure into a "termios". Ugh.
+ */
+#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
+ unsigned short __tmp; \
+ get_user(__tmp, &(termio)->x); \
+ *(unsigned short *) &(termios)->x = __tmp; \
+}
+
+#define user_termio_to_kernel_termios(termios, termio) \
+({ \
+ SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
+ SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
+ SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
+ SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
+ copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+})
+
+/*
+ * Translate a "termios" structure into a "termio". Ugh.
+ */
+#define kernel_termios_to_user_termio(termio, termios) \
+({ \
+ put_user((termios)->c_iflag, &(termio)->c_iflag); \
+ put_user((termios)->c_oflag, &(termio)->c_oflag); \
+ put_user((termios)->c_cflag, &(termio)->c_cflag); \
+ put_user((termios)->c_lflag, &(termio)->c_lflag); \
+ put_user((termios)->c_line, &(termio)->c_line); \
+ copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+})
+
+#define user_termios_to_kernel_termios(k, u) \
+ copy_from_user(k, u, sizeof(struct termios2))
+#define kernel_termios_to_user_termios(u, k) \
+ copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) \
+ copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) \
+ copy_to_user(u, k, sizeof(struct termios))
+
+#endif /* _ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
new file mode 100644
index 00000000000..28cf52100ba
--- /dev/null
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -0,0 +1,182 @@
+/* MN10300 Low-level thread information
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_THREAD_INFO_H
+#define _ASM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#include <asm/page.h>
+
+#define PREEMPT_ACTIVE 0x10000000
+
+#ifdef CONFIG_4KSTACKS
+#define THREAD_SIZE (4096)
+#else
+#define THREAD_SIZE (8192)
+#endif
+
+#define STACK_WARN (THREAD_SIZE / 8)
+
+/*
+ * low level task data that entry.S needs immediate access to
+ * - this struct should fit entirely inside of one cache line
+ * - this struct shares the supervisor stack pages
+ * - if the contents of this structure are changed, the assembly constants
+ * must also be changed
+ */
+#ifndef __ASSEMBLY__
+typedef struct {
+ unsigned long seg;
+} mm_segment_t;
+
+struct thread_info {
+ struct task_struct *task; /* main task structure */
+ struct exec_domain *exec_domain; /* execution domain */
+ struct pt_regs *frame; /* current exception frame */
+ unsigned long flags; /* low level flags */
+ __u32 cpu; /* current CPU */
+ __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
+
+ mm_segment_t addr_limit; /* thread address space:
+ 0-0xBFFFFFFF for user-thead
+ 0-0xFFFFFFFF for kernel-thread
+ */
+ struct restart_block restart_block;
+
+ __u8 supervisor_stack[0];
+};
+
+#define thread_info_to_uregs(ti) \
+ ((struct pt_regs *) \
+ ((unsigned long)ti + THREAD_SIZE - sizeof(struct pt_regs)))
+
+#else /* !__ASSEMBLY__ */
+
+#ifndef __ASM_OFFSETS_H__
+#include <asm/asm-offsets.h>
+#endif
+
+#endif
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ */
+#ifndef __ASSEMBLY__
+
+#define INIT_THREAD_INFO(tsk) \
+{ \
+ .task = &tsk, \
+ .exec_domain = &default_exec_domain, \
+ .flags = 0, \
+ .cpu = 0, \
+ .preempt_count = INIT_PREEMPT_COUNT, \
+ .addr_limit = KERNEL_DS, \
+ .restart_block = { \
+ .fn = do_no_restart_syscall, \
+ }, \
+}
+
+#define init_thread_info (init_thread_union.thread_info)
+#define init_stack (init_thread_union.stack)
+#define init_uregs \
+ ((struct pt_regs *) \
+ ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
+
+extern struct thread_info *__current_ti;
+
+/* how to get the thread information struct from C */
+static inline __attribute__((const))
+struct thread_info *current_thread_info(void)
+{
+ struct thread_info *ti;
+ asm("mov sp,%0\n"
+ "and %1,%0\n"
+ : "=d" (ti)
+ : "i" (~(THREAD_SIZE - 1))
+ : "cc");
+ return ti;
+}
+
+static inline __attribute__((const))
+struct pt_regs *current_frame(void)
+{
+ return current_thread_info()->frame;
+}
+
+/* how to get the current stack pointer from C */
+static inline unsigned long current_stack_pointer(void)
+{
+ unsigned long sp;
+ asm("mov sp,%0; ":"=r" (sp));
+ return sp;
+}
+
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
+
+/* thread information allocation */
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info_node(tsk, node) \
+ kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)
+#else
+#define alloc_thread_info_node(tsk, node) \
+ kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)
+#endif
+
+#ifndef CONFIG_KGDB
+#define free_thread_info(ti) kfree((ti))
+#else
+extern void free_thread_info(struct thread_info *);
+#endif
+#define get_thread_info(ti) get_task_struct((ti)->task)
+#define put_thread_info(ti) put_task_struct((ti)->task)
+
+#else /* !__ASSEMBLY__ */
+
+#ifndef __VMLINUX_LDS__
+/* how to get the thread information struct from ASM */
+.macro GET_THREAD_INFO reg
+ mov sp,\reg
+ and -THREAD_SIZE,\reg
+.endm
+#endif
+#endif
+
+/*
+ * thread information flags
+ * - these are process state flags that various assembly files may need to
+ * access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
+ */
+#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
+#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
+#define TIF_SIGPENDING 2 /* signal pending */
+#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
+#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
+#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
+#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
+#define TIF_MEMDIE 17 /* is terminating due to OOM killer */
+
+#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
+#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
+#define _TIF_RESTORE_SIGMASK +(1 << TIF_RESTORE_SIGMASK)
+#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
+
+#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
+#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/mn10300/include/asm/timer-regs.h b/arch/mn10300/include/asm/timer-regs.h
new file mode 100644
index 00000000000..c634977caf6
--- /dev/null
+++ b/arch/mn10300/include/asm/timer-regs.h
@@ -0,0 +1,452 @@
+/* AM33v2 on-board timer module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_TIMER_REGS_H
+#define _ASM_TIMER_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/*
+ * Timer prescalar control
+ */
+#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
+#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
+#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
+
+/*
+ * 8-bit timers
+ */
+#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
+#define TM0MD_SRC 0x07 /* timer source */
+#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
+#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
+#define TM1MD_SRC 0x07 /* timer source */
+#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
+#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
+#define TM2MD_SRC 0x07 /* timer source */
+#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
+#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
+#define TM3MD_SRC 0x07 /* timer source */
+#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM3MD_SRC_TM2CASCADE 0x03 /* - cascade with timer 2 */
+#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
+
+#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
+#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
+#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
+#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
+#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
+
+#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
+#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
+#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
+#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
+#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
+
+#define TM0IRQ 2 /* timer 0 IRQ */
+#define TM1IRQ 3 /* timer 1 IRQ */
+#define TM2IRQ 4 /* timer 2 IRQ */
+#define TM3IRQ 5 /* timer 3 IRQ */
+
+#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
+#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
+#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
+#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
+
+/*
+ * 16-bit timers 4,5 & 7-15
+ */
+#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
+#define TM4MD_SRC 0x07 /* timer source */
+#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
+#define TM5MD_SRC 0x07 /* timer source */
+#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
+#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
+#else /* !CONFIG_AM33_2 */
+#define TM5MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#endif /* CONFIG_AM33_2 */
+#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
+#define TM7MD_SRC 0x07 /* timer source */
+#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
+#endif /* CONFIG_AM33_2 */
+#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
+#define TM8MD_SRC 0x07 /* timer source */
+#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
+#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
+#else /* !CONFIG_AM33_2 */
+#define TM8MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#endif /* CONFIG_AM33_2 */
+#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
+#define TM9MD_SRC 0x07 /* timer source */
+#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
+#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
+#else /* !CONFIG_AM33_2 */
+#define TM9MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#endif /* CONFIG_AM33_2 */
+#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
+#define TM10MD_SRC 0x07 /* timer source */
+#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
+#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
+#else /* !CONFIG_AM33_2 */
+#define TM10MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#endif /* CONFIG_AM33_2 */
+#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
+#define TM11MD_SRC 0x07 /* timer source */
+#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
+#else /* !CONFIG_AM33_2 */
+#define TM11MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#endif /* CONFIG_AM33_2 */
+#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#if defined(CONFIG_AM34_2)
+#define TM12MD __SYSREG(0xd4003180, u8) /* timer 11 mode register */
+#define TM12MD_SRC 0x07 /* timer source */
+#define TM12MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM12MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM12MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM12MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM12MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM12MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#define TM12MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#define TM12MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM12MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM13MD __SYSREG(0xd4003182, u8) /* timer 11 mode register */
+#define TM13MD_SRC 0x07 /* timer source */
+#define TM13MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM13MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM13MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM13MD_SRC_TM12CASCADE 0x03 /* - cascade with timer 12 */
+#define TM13MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM13MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM13MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#define TM13MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#define TM13MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM13MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM14MD __SYSREG(0xd4003184, u8) /* timer 11 mode register */
+#define TM14MD_SRC 0x07 /* timer source */
+#define TM14MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM14MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM14MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM14MD_SRC_TM13CASCADE 0x03 /* - cascade with timer 13 */
+#define TM14MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM14MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM14MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#define TM14MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#define TM14MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM14MD_COUNT_ENABLE 0x80 /* timer count enable */
+
+#define TM15MD __SYSREG(0xd4003186, u8) /* timer 11 mode register */
+#define TM15MD_SRC 0x07 /* timer source */
+#define TM15MD_SRC_IOCLK 0x00 /* - IOCLK */
+#define TM15MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
+#define TM15MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
+#define TM15MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
+#define TM15MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
+#define TM15MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
+#define TM15MD_SRC_TM7UFLOW 0x07 /* - timer 7 underflow */
+#define TM15MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
+#define TM15MD_COUNT_ENABLE 0x80 /* timer count enable */
+#endif /* CONFIG_AM34_2 */
+
+
+#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
+#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
+#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
+#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
+#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
+#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
+#define TM89BR __SYSREG(0xd4003098, u32) /* timer 8:9 base register */
+#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
+#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
+#if defined(CONFIG_AM34_2)
+#define TM12BR __SYSREG(0xd4003190, u16) /* timer 12 base register */
+#define TM13BR __SYSREG(0xd4003192, u16) /* timer 13 base register */
+#define TM14BR __SYSREG(0xd4003194, u16) /* timer 14 base register */
+#define TM15BR __SYSREG(0xd4003196, u16) /* timer 15 base register */
+#endif /* CONFIG_AM34_2 */
+
+#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
+#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
+#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
+#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
+#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
+#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
+#define TM89BC __SYSREG(0xd40030a8, u32) /* timer 8:9 binary counter */
+#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
+#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
+#if defined(CONFIG_AM34_2)
+#define TM12BC __SYSREG(0xd40031a0, u16) /* timer 12 binary counter */
+#define TM13BC __SYSREG(0xd40031a2, u16) /* timer 13 binary counter */
+#define TM14BC __SYSREG(0xd40031a4, u16) /* timer 14 binary counter */
+#define TM15BC __SYSREG(0xd40031a6, u16) /* timer 15 binary counter */
+#endif /* CONFIG_AM34_2 */
+
+#define TM4IRQ 6 /* timer 4 IRQ */
+#define TM5IRQ 7 /* timer 5 IRQ */
+#define TM7IRQ 11 /* timer 7 IRQ */
+#define TM8IRQ 12 /* timer 8 IRQ */
+#define TM9IRQ 13 /* timer 9 IRQ */
+#define TM10IRQ 14 /* timer 10 IRQ */
+#define TM11IRQ 15 /* timer 11 IRQ */
+#if defined(CONFIG_AM34_2)
+#define TM12IRQ 64 /* timer 12 IRQ */
+#define TM13IRQ 65 /* timer 13 IRQ */
+#define TM14IRQ 66 /* timer 14 IRQ */
+#define TM15IRQ 67 /* timer 15 IRQ */
+#endif /* CONFIG_AM34_2 */
+
+#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
+#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
+#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
+#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
+#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
+#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
+#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
+#if defined(CONFIG_AM34_2)
+#define TM12ICR GxICR(TM12IRQ) /* timer 12 uflow intr ctrl reg */
+#define TM13ICR GxICR(TM13IRQ) /* timer 13 uflow intr ctrl reg */
+#define TM14ICR GxICR(TM14IRQ) /* timer 14 uflow intr ctrl reg */
+#define TM15ICR GxICR(TM15IRQ) /* timer 15 uflow intr ctrl reg */
+#endif /* CONFIG_AM34_2 */
+
+/*
+ * 16-bit timer 6
+ */
+#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
+#define TM6MD_SRC 0x0007 /* timer source */
+#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
+#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
+#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
+#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
+#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
+#define TM6MD_SRC_TM2UFLOW 0x0006 /* - timer 2 underflow */
+#if defined(CONFIG_AM33_2)
+/* #define TM6MD_SRC_TM6IOB_BOTH 0x0006 */ /* - TM6IOB pin input (both edges) */
+#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
+#endif /* CONFIG_AM33_2 */
+#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
+#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
+#if defined(CONFIG_AM33_2)
+#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
+#define TM6MD_PWM 0x3800 /* PWM output mode */
+#define TM6MD_PWM_DIS 0x0000 /* - disabled */
+#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
+#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
+#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
+#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
+#endif /* CONFIG_AM33_2 */
+
+#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
+#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
+
+#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
+#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
+#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
+#if defined(CONFIG_AM33_2)
+#define TM6MDA_OUT 0x07 /* output select */
+#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
+#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
+#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
+#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
+#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
+#define TM6MDA_MODE 0xc0 /* compare A register mode */
+#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
+#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
+#define TM6MDA_EDGE 0x20 /* compare A edge select */
+#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
+#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
+#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
+#else /* !CONFIG_AM33_2 */
+#define TM6MDA_MODE 0x40 /* compare A register mode */
+#endif /* CONFIG_AM33_2 */
+
+#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
+#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
+#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
+#if defined(CONFIG_AM33_2)
+#define TM6MDB_OUT 0x07 /* output select */
+#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
+#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
+#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
+#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
+#define TM6MDB_MODE 0xc0 /* compare B register mode */
+#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
+#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
+#define TM6MDB_EDGE 0x20 /* compare B edge select */
+#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
+#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
+#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
+#else /* !CONFIG_AM33_2 */
+#define TM6MDB_MODE 0x40 /* compare B register mode */
+#endif /* CONFIG_AM33_2 */
+
+#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
+#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
+#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
+
+#define TM6IRQ 6 /* timer 6 IRQ */
+#define TM6AIRQ 9 /* timer 6A IRQ */
+#define TM6BIRQ 10 /* timer 6B IRQ */
+
+#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
+#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
+#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
+
+#if defined(CONFIG_AM34_2)
+/*
+ * MTM: OS Tick-Timer
+ */
+#define TMTMD __SYSREG(0xd4004100, u8) /* Tick Timer mode register */
+#define TMTMD_TMTLDE 0x40 /* initialize TMTBC = TMTBR */
+#define TMTMD_TMTCNE 0x80 /* timer count enable */
+
+#define TMTBR __SYSREG(0xd4004110, u32) /* Tick Timer mode reg */
+#define TMTBC __SYSREG(0xd4004120, u32) /* Tick Timer mode reg */
+
+/*
+ * MTM: OS Timestamp-Timer
+ */
+#define TMSMD __SYSREG(0xd4004140, u8) /* Tick Timer mode register */
+#define TMSMD_TMSLDE 0x40 /* initialize TMSBC = TMSBR */
+#define TMSMD_TMSCNE 0x80 /* timer count enable */
+
+#define TMSBR __SYSREG(0xd4004150, u32) /* Tick Timer mode register */
+#define TMSBC __SYSREG(0xd4004160, u32) /* Tick Timer mode register */
+
+#define TMTIRQ 119 /* OS Tick timer IRQ */
+#define TMSIRQ 120 /* Timestamp timer IRQ */
+
+#define TMTICR GxICR(TMTIRQ) /* OS Tick timer uflow intr ctrl reg */
+#define TMSICR GxICR(TMSIRQ) /* Timestamp timer uflow intr ctrl reg */
+#endif /* CONFIG_AM34_2 */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/mn10300/include/asm/timex.h b/arch/mn10300/include/asm/timex.h
new file mode 100644
index 00000000000..bd4e90dfe6c
--- /dev/null
+++ b/arch/mn10300/include/asm/timex.h
@@ -0,0 +1,45 @@
+/* MN10300 Architecture time management specifications
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TIMEX_H
+#define _ASM_TIMEX_H
+
+#include <asm/hardirq.h>
+#include <unit/timex.h>
+
+#define TICK_SIZE (tick_nsec / 1000)
+
+#define CLOCK_TICK_RATE MN10300_JCCLK /* Underlying HZ */
+
+#ifdef __KERNEL__
+
+extern cycles_t cacheflush_time;
+
+static inline cycles_t get_cycles(void)
+{
+ return read_timestamp_counter();
+}
+
+extern int init_clockevents(void);
+extern int init_clocksource(void);
+
+static inline void setup_jiffies_interrupt(int irq,
+ struct irqaction *action)
+{
+ u16 tmp;
+ setup_irq(irq, action);
+ set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
+ GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
+ tmp = GxICR(irq);
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TIMEX_H */
diff --git a/arch/mn10300/include/asm/tlb.h b/arch/mn10300/include/asm/tlb.h
new file mode 100644
index 00000000000..65d232b9661
--- /dev/null
+++ b/arch/mn10300/include/asm/tlb.h
@@ -0,0 +1,34 @@
+/* MN10300 TLB definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_TLB_H
+#define _ASM_TLB_H
+
+#include <asm/tlbflush.h>
+
+extern void check_pgt_cache(void);
+
+/*
+ * we don't need any special per-pte or per-vma handling...
+ */
+#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_end_vma(tlb, vma) do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
+
+/*
+ * .. because we flush the whole mm when it fills up
+ */
+#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
+
+/* for now, just use the generic stuff */
+#include <asm-generic/tlb.h>
+
+#endif /* _ASM_TLB_H */
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
new file mode 100644
index 00000000000..efddd6e1ade
--- /dev/null
+++ b/arch/mn10300/include/asm/tlbflush.h
@@ -0,0 +1,154 @@
+/* MN10300 TLB flushing functions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TLBFLUSH_H
+#define _ASM_TLBFLUSH_H
+
+#include <linux/mm.h>
+#include <asm/processor.h>
+
+struct tlb_state {
+ struct mm_struct *active_mm;
+ int state;
+};
+DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
+
+/**
+ * local_flush_tlb - Flush the current MM's entries from the local CPU's TLBs
+ */
+static inline void local_flush_tlb(void)
+{
+ int w;
+ asm volatile(
+ " mov %1,%0 \n"
+ " or %2,%0 \n"
+ " mov %0,%1 \n"
+ : "=d"(w)
+ : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV)
+ : "cc", "memory");
+}
+
+/**
+ * local_flush_tlb_all - Flush all entries from the local CPU's TLBs
+ */
+static inline void local_flush_tlb_all(void)
+{
+ local_flush_tlb();
+}
+
+/**
+ * local_flush_tlb_one - Flush one entry from the local CPU's TLBs
+ */
+static inline void local_flush_tlb_one(unsigned long addr)
+{
+ local_flush_tlb();
+}
+
+/**
+ * local_flush_tlb_page - Flush a page's entry from the local CPU's TLBs
+ * @mm: The MM to flush for
+ * @addr: The address of the target page in RAM (not its page struct)
+ */
+static inline
+void local_flush_tlb_page(struct mm_struct *mm, unsigned long addr)
+{
+ unsigned long pteu, flags, cnx;
+
+ addr &= PAGE_MASK;
+
+ local_irq_save(flags);
+
+ cnx = 1;
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
+ cnx = mm->context.tlbpid[smp_processor_id()];
+#endif
+ if (cnx) {
+ pteu = addr;
+#ifdef CONFIG_MN10300_TLB_USE_PIDR
+ pteu |= cnx & xPTEU_PID;
+#endif
+ IPTEU = pteu;
+ DPTEU = pteu;
+ if (IPTEL & xPTEL_V)
+ IPTEL = 0;
+ if (DPTEL & xPTEL_V)
+ DPTEL = 0;
+ }
+ local_irq_restore(flags);
+}
+
+/*
+ * TLB flushing:
+ *
+ * - flush_tlb() flushes the current mm struct TLBs
+ * - flush_tlb_all() flushes all processes TLBs
+ * - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ * - flush_tlb_page(vma, vmaddr) flushes one page
+ * - flush_tlb_range(mm, start, end) flushes a range of pages
+ * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
+ */
+#ifdef CONFIG_SMP
+
+#include <asm/smp.h>
+
+extern void flush_tlb_all(void);
+extern void flush_tlb_current_task(void);
+extern void flush_tlb_mm(struct mm_struct *);
+extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
+
+#define flush_tlb() flush_tlb_current_task()
+
+static inline void flush_tlb_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
+{
+ flush_tlb_mm(vma->vm_mm);
+}
+
+#else /* CONFIG_SMP */
+
+static inline void flush_tlb_all(void)
+{
+ preempt_disable();
+ local_flush_tlb_all();
+ preempt_enable();
+}
+
+static inline void flush_tlb_mm(struct mm_struct *mm)
+{
+ preempt_disable();
+ local_flush_tlb_all();
+ preempt_enable();
+}
+
+static inline void flush_tlb_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
+{
+ preempt_disable();
+ local_flush_tlb_all();
+ preempt_enable();
+}
+
+#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr)
+#define flush_tlb() flush_tlb_all()
+
+#endif /* CONFIG_SMP */
+
+static inline void flush_tlb_kernel_range(unsigned long start,
+ unsigned long end)
+{
+ flush_tlb_all();
+}
+
+static inline void flush_tlb_pgtables(struct mm_struct *mm,
+ unsigned long start, unsigned long end)
+{
+}
+
+#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/mn10300/include/asm/topology.h b/arch/mn10300/include/asm/topology.h
new file mode 100644
index 00000000000..5428f333a02
--- /dev/null
+++ b/arch/mn10300/include/asm/topology.h
@@ -0,0 +1 @@
+#include <asm-generic/topology.h>
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
new file mode 100644
index 00000000000..713d4ba108a
--- /dev/null
+++ b/arch/mn10300/include/asm/types.h
@@ -0,0 +1,25 @@
+/* MN10300 Basic type definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TYPES_H
+#define _ASM_TYPES_H
+
+#include <asm-generic/int-ll64.h>
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 32
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TYPES_H */
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
new file mode 100644
index 00000000000..780560b330d
--- /dev/null
+++ b/arch/mn10300/include/asm/uaccess.h
@@ -0,0 +1,495 @@
+/* MN10300 userspace access functions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UACCESS_H
+#define _ASM_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include <linux/thread_info.h>
+#include <linux/kernel.h>
+#include <asm/page.h>
+#include <asm/errno.h>
+
+#define VERIFY_READ 0
+#define VERIFY_WRITE 1
+
+/*
+ * The fs value determines whether argument validity checking should be
+ * performed or not. If get_fs() == USER_DS, checking is performed, with
+ * get_fs() == KERNEL_DS, checking is bypassed.
+ *
+ * For historical reasons, these macros are grossly misnamed.
+ */
+#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
+
+#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
+#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
+#define USER_DS MAKE_MM_SEG(TASK_SIZE)
+
+#define get_ds() (KERNEL_DS)
+#define get_fs() (current_thread_info()->addr_limit)
+#define set_fs(x) (current_thread_info()->addr_limit = (x))
+#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
+
+#define segment_eq(a, b) ((a).seg == (b).seg)
+
+#define __addr_ok(addr) \
+ ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
+
+/*
+ * check that a range of addresses falls within the current address limit
+ */
+static inline int ___range_ok(unsigned long addr, unsigned int size)
+{
+ int flag = 1, tmp;
+
+ asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
+ " bcs 0f \n"
+ " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
+ " bhi 0f \n"
+ " clr %0 \n" /* mark okay */
+ "0: \n"
+ : "=r"(flag), "=&r"(tmp)
+ : "1"(addr), "ir"(size),
+ "r"(current_thread_info()->addr_limit.seg), "0"(flag)
+ : "cc"
+ );
+
+ return flag;
+}
+
+#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
+
+#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
+#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
+
+static inline int verify_area(int type, const void *addr, unsigned long size)
+{
+ return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue. No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path. This means when everything is well,
+ * we don't even have to jump over them. Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+ unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise. */
+extern int fixup_exception(struct pt_regs *regs);
+
+#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
+#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * The "__xxx" versions do not do address space checking, useful when
+ * doing multiple accesses to the same area (the user has to do the
+ * checks by hand with "access_ok()")
+ */
+#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
+#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * The "xxx_ret" versions return constant specified in third argument, if
+ * something bad happens. These macros can be optimized for the
+ * case of just returning from the function xxx_ret is used.
+ */
+
+#define put_user_ret(x, ptr, ret) \
+ ({ if (put_user((x), (ptr))) return (ret); })
+#define get_user_ret(x, ptr, ret) \
+ ({ if (get_user((x), (ptr))) return (ret); })
+#define __put_user_ret(x, ptr, ret) \
+ ({ if (__put_user((x), (ptr))) return (ret); })
+#define __get_user_ret(x, ptr, ret) \
+ ({ if (__get_user((x), (ptr))) return (ret); })
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) (*(struct __large_struct *)(x))
+
+#define __get_user_nocheck(x, ptr, size) \
+({ \
+ unsigned long __gu_addr; \
+ int __gu_err; \
+ __gu_addr = (unsigned long) (ptr); \
+ switch (size) { \
+ case 1: { \
+ unsigned char __gu_val; \
+ __get_user_asm("bu"); \
+ (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
+ break; \
+ } \
+ case 2: { \
+ unsigned short __gu_val; \
+ __get_user_asm("hu"); \
+ (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
+ break; \
+ } \
+ case 4: { \
+ unsigned int __gu_val; \
+ __get_user_asm(""); \
+ (x) = *(__force __typeof__(*(ptr))*) &__gu_val; \
+ break; \
+ } \
+ default: \
+ __get_user_unknown(); \
+ break; \
+ } \
+ __gu_err; \
+})
+
+#define __get_user_check(x, ptr, size) \
+({ \
+ const __typeof__(ptr) __guc_ptr = (ptr); \
+ int _e; \
+ if (likely(__access_ok((unsigned long) __guc_ptr, (size)))) \
+ _e = __get_user_nocheck((x), __guc_ptr, (size)); \
+ else { \
+ _e = -EFAULT; \
+ (x) = (__typeof__(x))0; \
+ } \
+ _e; \
+})
+
+#define __get_user_asm(INSN) \
+({ \
+ asm volatile( \
+ "1:\n" \
+ " mov"INSN" %2,%1\n" \
+ " mov 0,%0\n" \
+ "2:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3:\n\t" \
+ " mov %3,%0\n" \
+ " jmp 2b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 1b, 3b\n" \
+ " .previous" \
+ : "=&r" (__gu_err), "=&r" (__gu_val) \
+ : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
+})
+
+extern int __get_user_unknown(void);
+
+#define __put_user_nocheck(x, ptr, size) \
+({ \
+ union { \
+ __typeof__(*(ptr)) val; \
+ u32 bits[2]; \
+ } __pu_val; \
+ unsigned long __pu_addr; \
+ int __pu_err; \
+ __pu_val.val = (x); \
+ __pu_addr = (unsigned long) (ptr); \
+ switch (size) { \
+ case 1: __put_user_asm("bu"); break; \
+ case 2: __put_user_asm("hu"); break; \
+ case 4: __put_user_asm("" ); break; \
+ case 8: __put_user_asm8(); break; \
+ default: __pu_err = __put_user_unknown(); break; \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_check(x, ptr, size) \
+({ \
+ union { \
+ __typeof__(*(ptr)) val; \
+ u32 bits[2]; \
+ } __pu_val; \
+ unsigned long __pu_addr; \
+ int __pu_err; \
+ __pu_val.val = (x); \
+ __pu_addr = (unsigned long) (ptr); \
+ if (likely(__access_ok(__pu_addr, size))) { \
+ switch (size) { \
+ case 1: __put_user_asm("bu"); break; \
+ case 2: __put_user_asm("hu"); break; \
+ case 4: __put_user_asm("" ); break; \
+ case 8: __put_user_asm8(); break; \
+ default: __pu_err = __put_user_unknown(); break; \
+ } \
+ } \
+ else { \
+ __pu_err = -EFAULT; \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_asm(INSN) \
+({ \
+ asm volatile( \
+ "1:\n" \
+ " mov"INSN" %1,%2\n" \
+ " mov 0,%0\n" \
+ "2:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3:\n" \
+ " mov %3,%0\n" \
+ " jmp 2b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 1b, 3b\n" \
+ " .previous" \
+ : "=&r" (__pu_err) \
+ : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
+ "i" (-EFAULT) \
+ ); \
+})
+
+#define __put_user_asm8() \
+({ \
+ asm volatile( \
+ "1: mov %1,%3 \n" \
+ "2: mov %2,%4 \n" \
+ " mov 0,%0 \n" \
+ "3: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "4: \n" \
+ " mov %5,%0 \n" \
+ " jmp 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\"\n" \
+ " .balign 4 \n" \
+ " .long 1b, 4b \n" \
+ " .long 2b, 4b \n" \
+ " .previous \n" \
+ : "=&r" (__pu_err) \
+ : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
+ "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
+ "i" (-EFAULT) \
+ ); \
+})
+
+extern int __put_user_unknown(void);
+
+
+/*
+ * Copy To/From Userspace
+ */
+/* Generic arbitrary sized copy. */
+#define __copy_user(to, from, size) \
+do { \
+ if (size) { \
+ void *__to = to; \
+ const void *__from = from; \
+ int w; \
+ asm volatile( \
+ "0: movbu (%0),%3;\n" \
+ "1: movbu %3,(%1);\n" \
+ " inc %0;\n" \
+ " inc %1;\n" \
+ " add -1,%2;\n" \
+ " bne 0b;\n" \
+ "2:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3: jmp 2b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 0b,3b\n" \
+ " .long 1b,3b\n" \
+ " .previous\n" \
+ : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
+ : "0"(__from), "1"(__to), "2"(size) \
+ : "cc", "memory"); \
+ } \
+} while (0)
+
+#define __copy_user_zeroing(to, from, size) \
+do { \
+ if (size) { \
+ void *__to = to; \
+ const void *__from = from; \
+ int w; \
+ asm volatile( \
+ "0: movbu (%0),%3;\n" \
+ "1: movbu %3,(%1);\n" \
+ " inc %0;\n" \
+ " inc %1;\n" \
+ " add -1,%2;\n" \
+ " bne 0b;\n" \
+ "2:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3:\n" \
+ " mov %2,%0\n" \
+ " clr %3\n" \
+ "4: movbu %3,(%1);\n" \
+ " inc %1;\n" \
+ " add -1,%2;\n" \
+ " bne 4b;\n" \
+ " mov %0,%2\n" \
+ " jmp 2b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 0b,3b\n" \
+ " .long 1b,3b\n" \
+ " .previous\n" \
+ : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
+ : "0"(__from), "1"(__to), "2"(size) \
+ : "cc", "memory"); \
+ } \
+} while (0)
+
+/* We let the __ versions of copy_from/to_user inline, because they're often
+ * used in fast paths and have only a small space overhead.
+ */
+static inline
+unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
+ unsigned long n)
+{
+ __copy_user_zeroing(to, from, n);
+ return n;
+}
+
+static inline
+unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
+ unsigned long n)
+{
+ __copy_user(to, from, n);
+ return n;
+}
+
+
+#if 0
+#error "don't use - these macros don't increment to & from pointers"
+/* Optimize just a little bit when we know the size of the move. */
+#define __constant_copy_user(to, from, size) \
+do { \
+ asm volatile( \
+ " mov %0,a0;\n" \
+ "0: movbu (%1),d3;\n" \
+ "1: movbu d3,(%2);\n" \
+ " add -1,a0;\n" \
+ " bne 0b;\n" \
+ "2:;" \
+ ".section .fixup,\"ax\"\n" \
+ "3: jmp 2b\n" \
+ ".previous\n" \
+ ".section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 0b,3b\n" \
+ " .long 1b,3b\n" \
+ ".previous" \
+ : \
+ : "d"(size), "d"(to), "d"(from) \
+ : "d3", "a0"); \
+} while (0)
+
+/* Optimize just a little bit when we know the size of the move. */
+#define __constant_copy_user_zeroing(to, from, size) \
+do { \
+ asm volatile( \
+ " mov %0,a0;\n" \
+ "0: movbu (%1),d3;\n" \
+ "1: movbu d3,(%2);\n" \
+ " add -1,a0;\n" \
+ " bne 0b;\n" \
+ "2:;" \
+ ".section .fixup,\"ax\"\n" \
+ "3: jmp 2b\n" \
+ ".previous\n" \
+ ".section __ex_table,\"a\"\n" \
+ " .balign 4\n" \
+ " .long 0b,3b\n" \
+ " .long 1b,3b\n" \
+ ".previous" \
+ : \
+ : "d"(size), "d"(to), "d"(from) \
+ : "d3", "a0"); \
+} while (0)
+
+static inline
+unsigned long __constant_copy_to_user(void *to, const void *from,
+ unsigned long n)
+{
+ if (access_ok(VERIFY_WRITE, to, n))
+ __constant_copy_user(to, from, n);
+ return n;
+}
+
+static inline
+unsigned long __constant_copy_from_user(void *to, const void *from,
+ unsigned long n)
+{
+ if (access_ok(VERIFY_READ, from, n))
+ __constant_copy_user_zeroing(to, from, n);
+ return n;
+}
+
+static inline
+unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
+ unsigned long n)
+{
+ __constant_copy_user(to, from, n);
+ return n;
+}
+
+static inline
+unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
+ unsigned long n)
+{
+ __constant_copy_user_zeroing(to, from, n);
+ return n;
+}
+#endif
+
+extern unsigned long __generic_copy_to_user(void __user *, const void *,
+ unsigned long);
+extern unsigned long __generic_copy_from_user(void *, const void __user *,
+ unsigned long);
+
+#define __copy_to_user_inatomic(to, from, n) \
+ __generic_copy_to_user_nocheck((to), (from), (n))
+#define __copy_from_user_inatomic(to, from, n) \
+ __generic_copy_from_user_nocheck((to), (from), (n))
+
+#define __copy_to_user(to, from, n) \
+({ \
+ might_sleep(); \
+ __copy_to_user_inatomic((to), (from), (n)); \
+})
+
+#define __copy_from_user(to, from, n) \
+({ \
+ might_sleep(); \
+ __copy_from_user_inatomic((to), (from), (n)); \
+})
+
+
+#define copy_to_user(to, from, n) __generic_copy_to_user((to), (from), (n))
+#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
+
+extern long strncpy_from_user(char *dst, const char __user *src, long count);
+extern long __strncpy_from_user(char *dst, const char __user *src, long count);
+extern long strnlen_user(const char __user *str, long n);
+#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
+extern unsigned long clear_user(void __user *mem, unsigned long len);
+extern unsigned long __clear_user(void __user *mem, unsigned long len);
+
+#endif /* _ASM_UACCESS_H */
diff --git a/arch/mn10300/include/asm/ucontext.h b/arch/mn10300/include/asm/ucontext.h
new file mode 100644
index 00000000000..fcab5c1d8e1
--- /dev/null
+++ b/arch/mn10300/include/asm/ucontext.h
@@ -0,0 +1,22 @@
+/* MN10300 User context
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UCONTEXT_H
+#define _ASM_UCONTEXT_H
+
+struct ucontext {
+ unsigned long uc_flags;
+ struct ucontext *uc_link;
+ stack_t uc_stack;
+ struct sigcontext uc_mcontext;
+ sigset_t uc_sigmask; /* mask last for extensibility */
+};
+
+#endif /* _ASM_UCONTEXT_H */
diff --git a/arch/mn10300/include/asm/unaligned.h b/arch/mn10300/include/asm/unaligned.h
new file mode 100644
index 00000000000..0df671318ae
--- /dev/null
+++ b/arch/mn10300/include/asm/unaligned.h
@@ -0,0 +1,20 @@
+/* MN10300 Unaligned memory access handling
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_MN10300_UNALIGNED_H
+#define _ASM_MN10300_UNALIGNED_H
+
+#include <linux/unaligned/access_ok.h>
+#include <linux/unaligned/generic.h>
+
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+
+#endif /* _ASM_MN10300_UNALIGNED_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
new file mode 100644
index 00000000000..9051f921cbc
--- /dev/null
+++ b/arch/mn10300/include/asm/unistd.h
@@ -0,0 +1,398 @@
+/* MN10300 System call number list
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNISTD_H
+#define _ASM_UNISTD_H
+
+#define __NR_restart_syscall 0
+#define __NR_exit 1
+#define __NR_fork 2
+#define __NR_read 3
+#define __NR_write 4
+#define __NR_open 5
+#define __NR_close 6
+#define __NR_waitpid 7
+#define __NR_creat 8
+#define __NR_link 9
+#define __NR_unlink 10
+#define __NR_execve 11
+#define __NR_chdir 12
+#define __NR_time 13
+#define __NR_mknod 14
+#define __NR_chmod 15
+#define __NR_lchown 16
+#define __NR_break 17
+#define __NR_oldstat 18
+#define __NR_lseek 19
+#define __NR_getpid 20
+#define __NR_mount 21
+#define __NR_umount 22
+#define __NR_setuid 23
+#define __NR_getuid 24
+#define __NR_stime 25
+#define __NR_ptrace 26
+#define __NR_alarm 27
+#define __NR_oldfstat 28
+#define __NR_pause 29
+#define __NR_utime 30
+#define __NR_stty 31
+#define __NR_gtty 32
+#define __NR_access 33
+#define __NR_nice 34
+#define __NR_ftime 35
+#define __NR_sync 36
+#define __NR_kill 37
+#define __NR_rename 38
+#define __NR_mkdir 39
+#define __NR_rmdir 40
+#define __NR_dup 41
+#define __NR_pipe 42
+#define __NR_times 43
+#define __NR_prof 44
+#define __NR_brk 45
+#define __NR_setgid 46
+#define __NR_getgid 47
+#define __NR_signal 48
+#define __NR_geteuid 49
+#define __NR_getegid 50
+#define __NR_acct 51
+#define __NR_umount2 52
+#define __NR_lock 53
+#define __NR_ioctl 54
+#define __NR_fcntl 55
+#define __NR_mpx 56
+#define __NR_setpgid 57
+#define __NR_ulimit 58
+#define __NR_oldolduname 59
+#define __NR_umask 60
+#define __NR_chroot 61
+#define __NR_ustat 62
+#define __NR_dup2 63
+#define __NR_getppid 64
+#define __NR_getpgrp 65
+#define __NR_setsid 66
+#define __NR_sigaction 67
+#define __NR_sgetmask 68
+#define __NR_ssetmask 69
+#define __NR_setreuid 70
+#define __NR_setregid 71
+#define __NR_sigsuspend 72
+#define __NR_sigpending 73
+#define __NR_sethostname 74
+#define __NR_setrlimit 75
+#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage 77
+#define __NR_gettimeofday 78
+#define __NR_settimeofday 79
+#define __NR_getgroups 80
+#define __NR_setgroups 81
+#define __NR_select 82
+#define __NR_symlink 83
+#define __NR_oldlstat 84
+#define __NR_readlink 85
+#define __NR_uselib 86
+#define __NR_swapon 87
+#define __NR_reboot 88
+#define __NR_readdir 89
+#define __NR_mmap 90
+#define __NR_munmap 91
+#define __NR_truncate 92
+#define __NR_ftruncate 93
+#define __NR_fchmod 94
+#define __NR_fchown 95
+#define __NR_getpriority 96
+#define __NR_setpriority 97
+#define __NR_profil 98
+#define __NR_statfs 99
+#define __NR_fstatfs 100
+#define __NR_ioperm 101
+#define __NR_socketcall 102
+#define __NR_syslog 103
+#define __NR_setitimer 104
+#define __NR_getitimer 105
+#define __NR_stat 106
+#define __NR_lstat 107
+#define __NR_fstat 108
+#define __NR_olduname 109
+#define __NR_iopl 110
+#define __NR_vhangup 111
+#define __NR_idle 112
+#define __NR_vm86old 113
+#define __NR_wait4 114
+#define __NR_swapoff 115
+#define __NR_sysinfo 116
+#define __NR_ipc 117
+#define __NR_fsync 118
+#define __NR_sigreturn 119
+#define __NR_clone 120
+#define __NR_setdomainname 121
+#define __NR_uname 122
+#define __NR_modify_ldt 123
+#define __NR_adjtimex 124
+#define __NR_mprotect 125
+#define __NR_sigprocmask 126
+#define __NR_create_module 127
+#define __NR_init_module 128
+#define __NR_delete_module 129
+#define __NR_get_kernel_syms 130
+#define __NR_quotactl 131
+#define __NR_getpgid 132
+#define __NR_fchdir 133
+#define __NR_bdflush 134
+#define __NR_sysfs 135
+#define __NR_personality 136
+#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
+#define __NR_setfsuid 138
+#define __NR_setfsgid 139
+#define __NR__llseek 140
+#define __NR_getdents 141
+#define __NR__newselect 142
+#define __NR_flock 143
+#define __NR_msync 144
+#define __NR_readv 145
+#define __NR_writev 146
+#define __NR_getsid 147
+#define __NR_fdatasync 148
+#define __NR__sysctl 149
+#define __NR_mlock 150
+#define __NR_munlock 151
+#define __NR_mlockall 152
+#define __NR_munlockall 153
+#define __NR_sched_setparam 154
+#define __NR_sched_getparam 155
+#define __NR_sched_setscheduler 156
+#define __NR_sched_getscheduler 157
+#define __NR_sched_yield 158
+#define __NR_sched_get_priority_max 159
+#define __NR_sched_get_priority_min 160
+#define __NR_sched_rr_get_interval 161
+#define __NR_nanosleep 162
+#define __NR_mremap 163
+#define __NR_setresuid 164
+#define __NR_getresuid 165
+#define __NR_vm86 166
+#define __NR_query_module 167
+#define __NR_poll 168
+#define __NR_nfsservctl 169
+#define __NR_setresgid 170
+#define __NR_getresgid 171
+#define __NR_prctl 172
+#define __NR_rt_sigreturn 173
+#define __NR_rt_sigaction 174
+#define __NR_rt_sigprocmask 175
+#define __NR_rt_sigpending 176
+#define __NR_rt_sigtimedwait 177
+#define __NR_rt_sigqueueinfo 178
+#define __NR_rt_sigsuspend 179
+#define __NR_pread64 180
+#define __NR_pwrite64 181
+#define __NR_chown 182
+#define __NR_getcwd 183
+#define __NR_capget 184
+#define __NR_capset 185
+#define __NR_sigaltstack 186
+#define __NR_sendfile 187
+#define __NR_getpmsg 188 /* some people actually want streams */
+#define __NR_putpmsg 189 /* some people actually want streams */
+#define __NR_vfork 190
+#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
+#define __NR_mmap2 192
+#define __NR_truncate64 193
+#define __NR_ftruncate64 194
+#define __NR_stat64 195
+#define __NR_lstat64 196
+#define __NR_fstat64 197
+#define __NR_lchown32 198
+#define __NR_getuid32 199
+#define __NR_getgid32 200
+#define __NR_geteuid32 201
+#define __NR_getegid32 202
+#define __NR_setreuid32 203
+#define __NR_setregid32 204
+#define __NR_getgroups32 205
+#define __NR_setgroups32 206
+#define __NR_fchown32 207
+#define __NR_setresuid32 208
+#define __NR_getresuid32 209
+#define __NR_setresgid32 210
+#define __NR_getresgid32 211
+#define __NR_chown32 212
+#define __NR_setuid32 213
+#define __NR_setgid32 214
+#define __NR_setfsuid32 215
+#define __NR_setfsgid32 216
+#define __NR_pivot_root 217
+#define __NR_mincore 218
+#define __NR_madvise 219
+#define __NR_madvise1 219 /* delete when C lib stub is removed */
+#define __NR_getdents64 220
+#define __NR_fcntl64 221
+/* 223 is unused */
+#define __NR_gettid 224
+#define __NR_readahead 225
+#define __NR_setxattr 226
+#define __NR_lsetxattr 227
+#define __NR_fsetxattr 228
+#define __NR_getxattr 229
+#define __NR_lgetxattr 230
+#define __NR_fgetxattr 231
+#define __NR_listxattr 232
+#define __NR_llistxattr 233
+#define __NR_flistxattr 234
+#define __NR_removexattr 235
+#define __NR_lremovexattr 236
+#define __NR_fremovexattr 237
+#define __NR_tkill 238
+#define __NR_sendfile64 239
+#define __NR_futex 240
+#define __NR_sched_setaffinity 241
+#define __NR_sched_getaffinity 242
+#define __NR_set_thread_area 243
+#define __NR_get_thread_area 244
+#define __NR_io_setup 245
+#define __NR_io_destroy 246
+#define __NR_io_getevents 247
+#define __NR_io_submit 248
+#define __NR_io_cancel 249
+#define __NR_fadvise64 250
+
+#define __NR_exit_group 252
+#define __NR_lookup_dcookie 253
+#define __NR_epoll_create 254
+#define __NR_epoll_ctl 255
+#define __NR_epoll_wait 256
+#define __NR_remap_file_pages 257
+#define __NR_set_tid_address 258
+#define __NR_timer_create 259
+#define __NR_timer_settime (__NR_timer_create+1)
+#define __NR_timer_gettime (__NR_timer_create+2)
+#define __NR_timer_getoverrun (__NR_timer_create+3)
+#define __NR_timer_delete (__NR_timer_create+4)
+#define __NR_clock_settime (__NR_timer_create+5)
+#define __NR_clock_gettime (__NR_timer_create+6)
+#define __NR_clock_getres (__NR_timer_create+7)
+#define __NR_clock_nanosleep (__NR_timer_create+8)
+#define __NR_statfs64 268
+#define __NR_fstatfs64 269
+#define __NR_tgkill 270
+#define __NR_utimes 271
+#define __NR_fadvise64_64 272
+#define __NR_vserver 273
+#define __NR_mbind 274
+#define __NR_get_mempolicy 275
+#define __NR_set_mempolicy 276
+#define __NR_mq_open 277
+#define __NR_mq_unlink (__NR_mq_open+1)
+#define __NR_mq_timedsend (__NR_mq_open+2)
+#define __NR_mq_timedreceive (__NR_mq_open+3)
+#define __NR_mq_notify (__NR_mq_open+4)
+#define __NR_mq_getsetattr (__NR_mq_open+5)
+#define __NR_kexec_load 283
+#define __NR_waitid 284
+#define __NR_add_key 286
+#define __NR_request_key 287
+#define __NR_keyctl 288
+#define __NR_cacheflush 289
+#define __NR_ioprio_set 290
+#define __NR_ioprio_get 291
+#define __NR_inotify_init 292
+#define __NR_inotify_add_watch 293
+#define __NR_inotify_rm_watch 294
+#define __NR_migrate_pages 295
+#define __NR_openat 296
+#define __NR_mkdirat 297
+#define __NR_mknodat 298
+#define __NR_fchownat 299
+#define __NR_futimesat 300
+#define __NR_fstatat64 301
+#define __NR_unlinkat 302
+#define __NR_renameat 303
+#define __NR_linkat 304
+#define __NR_symlinkat 305
+#define __NR_readlinkat 306
+#define __NR_fchmodat 307
+#define __NR_faccessat 308
+#define __NR_pselect6 309
+#define __NR_ppoll 310
+#define __NR_unshare 311
+#define __NR_set_robust_list 312
+#define __NR_get_robust_list 313
+#define __NR_splice 314
+#define __NR_sync_file_range 315
+#define __NR_tee 316
+#define __NR_vmsplice 317
+#define __NR_move_pages 318
+#define __NR_getcpu 319
+#define __NR_epoll_pwait 320
+#define __NR_utimensat 321
+#define __NR_signalfd 322
+#define __NR_timerfd_create 323
+#define __NR_eventfd 324
+#define __NR_fallocate 325
+#define __NR_timerfd_settime 326
+#define __NR_timerfd_gettime 327
+#define __NR_signalfd4 328
+#define __NR_eventfd2 329
+#define __NR_epoll_create1 330
+#define __NR_dup3 331
+#define __NR_pipe2 332
+#define __NR_inotify_init1 333
+#define __NR_preadv 334
+#define __NR_pwritev 335
+#define __NR_rt_tgsigqueueinfo 336
+#define __NR_perf_event_open 337
+#define __NR_recvmmsg 338
+#define __NR_setns 339
+
+#ifdef __KERNEL__
+
+#define NR_syscalls 340
+
+/*
+ * specify the deprecated syscalls we want to support on this arch
+ */
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_SELECT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#ifndef cond_syscall
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_UNISTD_H */
diff --git a/arch/mn10300/include/asm/user.h b/arch/mn10300/include/asm/user.h
new file mode 100644
index 00000000000..e1193908b78
--- /dev/null
+++ b/arch/mn10300/include/asm/user.h
@@ -0,0 +1,53 @@
+/* MN10300 User process data
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_USER_H
+#define _ASM_USER_H
+
+#include <asm/page.h>
+#include <linux/ptrace.h>
+
+#ifndef __ASSEMBLY__
+/*
+ * When the kernel dumps core, it starts by dumping the user struct - this will
+ * be used by gdb to figure out where the data and stack segments are within
+ * the file, and what virtual addresses to use.
+ */
+struct user {
+ /* We start with the registers, to mimic the way that "memory" is
+ * returned from the ptrace(3,...) function.
+ */
+ struct pt_regs regs; /* Where the registers are actually stored */
+
+ /* The rest of this junk is to help gdb figure out what goes where */
+ unsigned long int u_tsize; /* Text segment size (pages). */
+ unsigned long int u_dsize; /* Data segment size (pages). */
+ unsigned long int u_ssize; /* Stack segment size (pages). */
+ unsigned long start_code; /* Starting virtual address of text. */
+ unsigned long start_stack; /* Starting virtual address of stack area.
+ This is actually the bottom of the stack,
+ the top of the stack is always found in the
+ esp register. */
+ long int signal; /* Signal that caused the core dump. */
+ int reserved; /* No longer used */
+ struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
+
+ /* the registers */
+ unsigned long magic; /* To uniquely identify a core file */
+ char u_comm[32]; /* User command that was responsible */
+};
+#endif
+
+#define NBPG PAGE_SIZE
+#define UPAGES 1
+#define HOST_TEXT_START_ADDR +(u.start_code)
+#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
+
+#endif /* _ASM_USER_H */
diff --git a/arch/mn10300/include/asm/vga.h b/arch/mn10300/include/asm/vga.h
new file mode 100644
index 00000000000..0163e50a345
--- /dev/null
+++ b/arch/mn10300/include/asm/vga.h
@@ -0,0 +1,17 @@
+/* MN10300 VGA register definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_VGA_H
+#define _ASM_VGA_H
+
+
+
+#endif /* _ASM_VGA_H */
diff --git a/arch/mn10300/include/asm/xor.h b/arch/mn10300/include/asm/xor.h
new file mode 100644
index 00000000000..c82eb12a5b1
--- /dev/null
+++ b/arch/mn10300/include/asm/xor.h
@@ -0,0 +1 @@
+#include <asm-generic/xor.h>
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
new file mode 100644
index 00000000000..47ed30fe817
--- /dev/null
+++ b/arch/mn10300/kernel/Makefile
@@ -0,0 +1,28 @@
+#
+# Makefile for the MN10300-specific core kernel code
+#
+extra-y := head.o init_task.o vmlinux.lds
+
+fpu-obj-y := fpu-nofpu.o fpu-nofpu-low.o
+fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o
+
+obj-y := process.o signal.o entry.o traps.o irq.o \
+ ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \
+ switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) \
+ csrc-mn10300.o cevt-mn10300.o
+
+obj-$(CONFIG_SMP) += smp.o smp-low.o
+
+obj-$(CONFIG_MN10300_WD_TIMER) += mn10300-watchdog.o mn10300-watchdog-low.o
+
+obj-$(CONFIG_MN10300_TTYSM) += mn10300-serial.o mn10300-serial-low.o \
+ mn10300-debug.o
+obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-low.o
+obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o
+obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o
+
+obj-$(CONFIG_MN10300_RTC) += rtc.o
+obj-$(CONFIG_PROFILE) += profile.o profile-low.o
+obj-$(CONFIG_MODULES) += module.o
+obj-$(CONFIG_KPROBES) += kprobes.o
+obj-$(CONFIG_KGDB) += kgdb.o
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c
new file mode 100644
index 00000000000..96f24fab7de
--- /dev/null
+++ b/arch/mn10300/kernel/asm-offsets.c
@@ -0,0 +1,110 @@
+/*
+ * Generate definitions needed by assembly language modules.
+ * This code generates raw asm output which is post-processed
+ * to extract and format the required data.
+ */
+
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/personality.h>
+#include <linux/kbuild.h>
+#include <asm/ucontext.h>
+#include <asm/processor.h>
+#include <asm/thread_info.h>
+#include <asm/ptrace.h>
+#include "sigframe.h"
+#include "mn10300-serial.h"
+
+void foo(void)
+{
+ OFFSET(SIGCONTEXT_d0, sigcontext, d0);
+ OFFSET(SIGCONTEXT_d1, sigcontext, d1);
+ BLANK();
+
+ OFFSET(TI_task, thread_info, task);
+ OFFSET(TI_exec_domain, thread_info, exec_domain);
+ OFFSET(TI_frame, thread_info, frame);
+ OFFSET(TI_flags, thread_info, flags);
+ OFFSET(TI_cpu, thread_info, cpu);
+ OFFSET(TI_preempt_count, thread_info, preempt_count);
+ OFFSET(TI_addr_limit, thread_info, addr_limit);
+ OFFSET(TI_restart_block, thread_info, restart_block);
+ BLANK();
+
+ OFFSET(REG_D0, pt_regs, d0);
+ OFFSET(REG_D1, pt_regs, d1);
+ OFFSET(REG_D2, pt_regs, d2);
+ OFFSET(REG_D3, pt_regs, d3);
+ OFFSET(REG_A0, pt_regs, a0);
+ OFFSET(REG_A1, pt_regs, a1);
+ OFFSET(REG_A2, pt_regs, a2);
+ OFFSET(REG_A3, pt_regs, a3);
+ OFFSET(REG_E0, pt_regs, e0);
+ OFFSET(REG_E1, pt_regs, e1);
+ OFFSET(REG_E2, pt_regs, e2);
+ OFFSET(REG_E3, pt_regs, e3);
+ OFFSET(REG_E4, pt_regs, e4);
+ OFFSET(REG_E5, pt_regs, e5);
+ OFFSET(REG_E6, pt_regs, e6);
+ OFFSET(REG_E7, pt_regs, e7);
+ OFFSET(REG_SP, pt_regs, sp);
+ OFFSET(REG_EPSW, pt_regs, epsw);
+ OFFSET(REG_PC, pt_regs, pc);
+ OFFSET(REG_LAR, pt_regs, lar);
+ OFFSET(REG_LIR, pt_regs, lir);
+ OFFSET(REG_MDR, pt_regs, mdr);
+ OFFSET(REG_MCVF, pt_regs, mcvf);
+ OFFSET(REG_MCRL, pt_regs, mcrl);
+ OFFSET(REG_MCRH, pt_regs, mcrh);
+ OFFSET(REG_MDRQ, pt_regs, mdrq);
+ OFFSET(REG_ORIG_D0, pt_regs, orig_d0);
+ OFFSET(REG_NEXT, pt_regs, next);
+ DEFINE(REG__END, sizeof(struct pt_regs));
+ BLANK();
+
+ OFFSET(THREAD_UREGS, thread_struct, uregs);
+ OFFSET(THREAD_PC, thread_struct, pc);
+ OFFSET(THREAD_SP, thread_struct, sp);
+ OFFSET(THREAD_A3, thread_struct, a3);
+ OFFSET(THREAD_USP, thread_struct, usp);
+#ifdef CONFIG_FPU
+ OFFSET(THREAD_FPU_FLAGS, thread_struct, fpu_flags);
+ OFFSET(THREAD_FPU_STATE, thread_struct, fpu_state);
+ DEFINE(__THREAD_USING_FPU, THREAD_USING_FPU);
+ DEFINE(__THREAD_HAS_FPU, THREAD_HAS_FPU);
+#endif /* CONFIG_FPU */
+ BLANK();
+
+ OFFSET(TASK_THREAD, task_struct, thread);
+ BLANK();
+
+ DEFINE(CLONE_VM_asm, CLONE_VM);
+ DEFINE(CLONE_FS_asm, CLONE_FS);
+ DEFINE(CLONE_FILES_asm, CLONE_FILES);
+ DEFINE(CLONE_SIGHAND_asm, CLONE_SIGHAND);
+ DEFINE(CLONE_UNTRACED_asm, CLONE_UNTRACED);
+ DEFINE(SIGCHLD_asm, SIGCHLD);
+ BLANK();
+
+ OFFSET(EXEC_DOMAIN_handler, exec_domain, handler);
+ OFFSET(RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);
+
+ DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
+
+ OFFSET(__rx_buffer, mn10300_serial_port, rx_buffer);
+ OFFSET(__rx_inp, mn10300_serial_port, rx_inp);
+ OFFSET(__rx_outp, mn10300_serial_port, rx_outp);
+ OFFSET(__uart_state, mn10300_serial_port, uart.state);
+ OFFSET(__tx_xchar, mn10300_serial_port, tx_xchar);
+ OFFSET(__tx_break, mn10300_serial_port, tx_break);
+ OFFSET(__intr_flags, mn10300_serial_port, intr_flags);
+ OFFSET(__rx_icr, mn10300_serial_port, rx_icr);
+ OFFSET(__tx_icr, mn10300_serial_port, tx_icr);
+ OFFSET(__tm_icr, mn10300_serial_port, _tmicr);
+ OFFSET(__iobase, mn10300_serial_port, _iobase);
+
+ DEFINE(__UART_XMIT_SIZE, UART_XMIT_SIZE);
+ OFFSET(__xmit_buffer, uart_state, xmit.buf);
+ OFFSET(__xmit_head, uart_state, xmit.head);
+ OFFSET(__xmit_tail, uart_state, xmit.tail);
+}
diff --git a/arch/mn10300/kernel/cevt-mn10300.c b/arch/mn10300/kernel/cevt-mn10300.c
new file mode 100644
index 00000000000..69cae026078
--- /dev/null
+++ b/arch/mn10300/kernel/cevt-mn10300.c
@@ -0,0 +1,132 @@
+/* MN10300 clockevents
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/percpu.h>
+#include <linux/smp.h>
+#include <asm/timex.h>
+#include "internal.h"
+
+#ifdef CONFIG_SMP
+#if (CONFIG_NR_CPUS > 2) && !defined(CONFIG_GEENERIC_CLOCKEVENTS_BROADCAST)
+#error "This doesn't scale well! Need per-core local timers."
+#endif
+#else /* CONFIG_SMP */
+#define stop_jiffies_counter1()
+#define reload_jiffies_counter1(x)
+#define TMJC1IRQ TMJCIRQ
+#endif
+
+
+static int next_event(unsigned long delta,
+ struct clock_event_device *evt)
+{
+ unsigned int cpu = smp_processor_id();
+
+ if (cpu == 0) {
+ stop_jiffies_counter();
+ reload_jiffies_counter(delta - 1);
+ } else {
+ stop_jiffies_counter1();
+ reload_jiffies_counter1(delta - 1);
+ }
+ return 0;
+}
+
+static void set_clock_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+ /* Nothing to do ... */
+}
+
+static DEFINE_PER_CPU(struct clock_event_device, mn10300_clockevent_device);
+static DEFINE_PER_CPU(struct irqaction, timer_irq);
+
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *cd;
+ unsigned int cpu = smp_processor_id();
+
+ if (cpu == 0)
+ stop_jiffies_counter();
+ else
+ stop_jiffies_counter1();
+
+ cd = &per_cpu(mn10300_clockevent_device, cpu);
+ cd->event_handler(cd);
+
+ return IRQ_HANDLED;
+}
+
+static void event_handler(struct clock_event_device *dev)
+{
+}
+
+int __init init_clockevents(void)
+{
+ struct clock_event_device *cd;
+ struct irqaction *iact;
+ unsigned int cpu = smp_processor_id();
+
+ cd = &per_cpu(mn10300_clockevent_device, cpu);
+
+ if (cpu == 0) {
+ stop_jiffies_counter();
+ cd->irq = TMJCIRQ;
+ } else {
+ stop_jiffies_counter1();
+ cd->irq = TMJC1IRQ;
+ }
+
+ cd->name = "Timestamp";
+ cd->features = CLOCK_EVT_FEAT_ONESHOT;
+
+ /* Calculate shift/mult. We want to spawn at least 1 second */
+ clockevents_calc_mult_shift(cd, MN10300_JCCLK, 1);
+
+ /* Calculate the min / max delta */
+ cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd);
+ cd->min_delta_ns = clockevent_delta2ns(100, cd);
+
+ cd->rating = 200;
+ cd->cpumask = cpumask_of(smp_processor_id());
+ cd->set_mode = set_clock_mode;
+ cd->event_handler = event_handler;
+ cd->set_next_event = next_event;
+
+ iact = &per_cpu(timer_irq, cpu);
+ iact->flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER;
+ iact->handler = timer_interrupt;
+
+ clockevents_register_device(cd);
+
+#if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
+ /* setup timer irq affinity so it only runs on this cpu */
+ {
+ struct irq_data *data;
+ data = irq_get_irq_data(cd->irq);
+ cpumask_copy(data->affinity, cpumask_of(cpu));
+ iact->flags |= IRQF_NOBALANCING;
+ }
+#endif
+
+ if (cpu == 0) {
+ reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
+ iact->name = "CPU0 Timer";
+ } else {
+ reload_jiffies_counter1(MN10300_JC_PER_HZ - 1);
+ iact->name = "CPU1 Timer";
+ }
+
+ setup_jiffies_interrupt(cd->irq, iact);
+
+ return 0;
+}
diff --git a/arch/mn10300/kernel/csrc-mn10300.c b/arch/mn10300/kernel/csrc-mn10300.c
new file mode 100644
index 00000000000..45644cf18c4
--- /dev/null
+++ b/arch/mn10300/kernel/csrc-mn10300.c
@@ -0,0 +1,34 @@
+/* MN10300 clocksource
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <asm/timex.h>
+#include "internal.h"
+
+static cycle_t mn10300_read(struct clocksource *cs)
+{
+ return read_timestamp_counter();
+}
+
+static struct clocksource clocksource_mn10300 = {
+ .name = "TSC",
+ .rating = 200,
+ .read = mn10300_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+int __init init_clocksource(void)
+{
+ startup_timestamp_counter();
+ clocksource_register_hz(&clocksource_mn10300, MN10300_TSCCLK);
+ return 0;
+}
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
new file mode 100644
index 00000000000..3e3620d9fc4
--- /dev/null
+++ b/arch/mn10300/kernel/entry.S
@@ -0,0 +1,765 @@
+###############################################################################
+#
+# MN10300 Exception and interrupt entry points
+#
+# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Modified by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/smp.h>
+#include <asm/system.h>
+#include <asm/irqflags.h>
+#include <asm/thread_info.h>
+#include <asm/intctl-regs.h>
+#include <asm/busctl-regs.h>
+#include <asm/timer-regs.h>
+#include <unit/leds.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/errno.h>
+#include <asm/asm-offsets.h>
+#include <asm/frame.inc>
+
+#if defined(CONFIG_SMP) && defined(CONFIG_GDBSTUB)
+#include <asm/gdb-stub.h>
+#endif /* CONFIG_SMP && CONFIG_GDBSTUB */
+
+#ifdef CONFIG_PREEMPT
+#define preempt_stop LOCAL_IRQ_DISABLE
+#else
+#define preempt_stop
+#define resume_kernel restore_all
+#endif
+
+ .am33_2
+
+###############################################################################
+#
+# the return path for a forked child
+# - on entry, D0 holds the address of the previous task to run
+#
+###############################################################################
+ENTRY(ret_from_fork)
+ call schedule_tail[],0
+ GET_THREAD_INFO a2
+
+ # return 0 to indicate child process
+ clr d0
+ mov d0,(REG_D0,fp)
+ jmp syscall_exit
+
+###############################################################################
+#
+# system call handler
+#
+###############################################################################
+ENTRY(system_call)
+ add -4,sp
+ SAVE_ALL
+ mov d0,(REG_ORIG_D0,fp)
+ GET_THREAD_INFO a2
+ cmp nr_syscalls,d0
+ bcc syscall_badsys
+ btst _TIF_SYSCALL_TRACE,(TI_flags,a2)
+ bne syscall_entry_trace
+syscall_call:
+ add d0,d0,a1
+ add a1,a1
+ mov (REG_A0,fp),d0
+ mov (sys_call_table,a1),a0
+ calls (a0)
+ mov d0,(REG_D0,fp)
+syscall_exit:
+ # make sure we don't miss an interrupt setting need_resched or
+ # sigpending between sampling and the rti
+ LOCAL_IRQ_DISABLE
+ mov (TI_flags,a2),d2
+ btst _TIF_ALLWORK_MASK,d2
+ bne syscall_exit_work
+restore_all:
+ RESTORE_ALL
+
+###############################################################################
+#
+# perform work that needs to be done immediately before resumption and syscall
+# tracing
+#
+###############################################################################
+ ALIGN
+syscall_exit_work:
+ btst _TIF_SYSCALL_TRACE,d2
+ beq work_pending
+ LOCAL_IRQ_ENABLE # could let syscall_trace_exit() call
+ # schedule() instead
+ mov fp,d0
+ call syscall_trace_exit[],0 # do_syscall_trace(regs)
+ jmp resume_userspace
+
+ ALIGN
+work_pending:
+ btst _TIF_NEED_RESCHED,d2
+ beq work_notifysig
+
+work_resched:
+ call schedule[],0
+
+ # make sure we don't miss an interrupt setting need_resched or
+ # sigpending between sampling and the rti
+ LOCAL_IRQ_DISABLE
+
+ # is there any work to be done other than syscall tracing?
+ mov (TI_flags,a2),d2
+ btst _TIF_WORK_MASK,d2
+ beq restore_all
+ btst _TIF_NEED_RESCHED,d2
+ bne work_resched
+
+ # deal with pending signals and notify-resume requests
+work_notifysig:
+ mov fp,d0
+ mov d2,d1
+ call do_notify_resume[],0
+ jmp resume_userspace
+
+ # perform syscall entry tracing
+syscall_entry_trace:
+ mov -ENOSYS,d0
+ mov d0,(REG_D0,fp)
+ mov fp,d0
+ call syscall_trace_entry[],0 # returns the syscall number to actually use
+ mov (REG_D1,fp),d1
+ cmp nr_syscalls,d0
+ bcs syscall_call
+ jmp syscall_exit
+
+syscall_badsys:
+ mov -ENOSYS,d0
+ mov d0,(REG_D0,fp)
+ jmp resume_userspace
+
+ # userspace resumption stub bypassing syscall exit tracing
+ .globl ret_from_exception, ret_from_intr
+ ALIGN
+ret_from_exception:
+ preempt_stop
+ret_from_intr:
+ GET_THREAD_INFO a2
+ mov (REG_EPSW,fp),d0 # need to deliver signals before
+ # returning to userspace
+ and EPSW_nSL,d0
+ beq resume_kernel # returning to supervisor mode
+
+ENTRY(resume_userspace)
+ # make sure we don't miss an interrupt setting need_resched or
+ # sigpending between sampling and the rti
+ LOCAL_IRQ_DISABLE
+
+ # is there any work to be done on int/exception return?
+ mov (TI_flags,a2),d2
+ btst _TIF_WORK_MASK,d2
+ bne work_pending
+ jmp restore_all
+
+#ifdef CONFIG_PREEMPT
+ENTRY(resume_kernel)
+ LOCAL_IRQ_DISABLE
+ mov (TI_preempt_count,a2),d0 # non-zero preempt_count ?
+ cmp 0,d0
+ bne restore_all
+
+need_resched:
+ btst _TIF_NEED_RESCHED,(TI_flags,a2)
+ beq restore_all
+ mov (REG_EPSW,fp),d0
+ and EPSW_IM,d0
+ cmp EPSW_IM_7,d0 # interrupts off (exception path) ?
+ bne restore_all
+ call preempt_schedule_irq[],0
+ jmp need_resched
+#endif
+
+
+###############################################################################
+#
+# IRQ handler entry point
+# - intended to be entered at multiple priorities
+#
+###############################################################################
+ENTRY(irq_handler)
+ add -4,sp
+ SAVE_ALL
+
+ # it's not a syscall
+ mov 0xffffffff,d0
+ mov d0,(REG_ORIG_D0,fp)
+
+ mov fp,d0
+ call do_IRQ[],0 # do_IRQ(regs)
+
+ jmp ret_from_intr
+
+###############################################################################
+#
+# Double Fault handler entry point
+# - note that there will not be a stack, D0/A0 will hold EPSW/PC as were
+#
+###############################################################################
+ .section .bss
+ .balign THREAD_SIZE
+ .space THREAD_SIZE
+__df_stack:
+ .previous
+
+ENTRY(double_fault)
+ mov a0,(__df_stack-4) # PC as was
+ mov d0,(__df_stack-8) # EPSW as was
+ mn10300_set_dbfleds # display 'db-f' on the LEDs
+ mov 0xaa55aa55,d0
+ mov d0,(__df_stack-12) # no ORIG_D0
+ mov sp,a0 # save corrupted SP
+ mov __df_stack-12,sp # emergency supervisor stack
+ SAVE_ALL
+ mov a0,(REG_A0,fp) # save corrupted SP as A0 (which got
+ # clobbered by the CPU)
+ mov fp,d0
+ calls do_double_fault
+double_fault_loop:
+ bra double_fault_loop
+
+###############################################################################
+#
+# Bus Error handler entry point
+# - handle external (async) bus errors separately
+#
+###############################################################################
+ENTRY(raw_bus_error)
+ add -4,sp
+ mov d0,(sp)
+#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
+ mov (MMUCTR),d0
+ mov d0,(MMUCTR)
+#endif
+ mov (BCBERR),d0 # what
+ btst BCBERR_BEMR_DMA,d0 # see if it was an external bus error
+ beq __common_exception_aux # it wasn't
+
+ SAVE_ALL
+ mov (BCBEAR),d1 # destination of erroneous access
+
+ mov (REG_ORIG_D0,fp),d2
+ mov d2,(REG_D0,fp)
+ mov -1,d2
+ mov d2,(REG_ORIG_D0,fp)
+
+ add -4,sp
+ mov fp,(12,sp) # frame pointer
+ call io_bus_error[],0
+ jmp restore_all
+
+###############################################################################
+#
+# NMI exception entry points
+#
+# This is used by ordinary interrupt channels that have the GxICR_NMI bit set
+# in addition to the main NMI and Watchdog channels. SMP NMI IPIs use this
+# facility.
+#
+###############################################################################
+ENTRY(nmi_handler)
+ add -4,sp
+ mov d0,(sp)
+ mov (TBR),d0
+
+#ifdef CONFIG_SMP
+ add -4,sp
+ mov d0,(sp) # save d0(TBR)
+ movhu (NMIAGR),d0
+ and NMIAGR_GN,d0
+ lsr 0x2,d0
+ cmp CALL_FUNCTION_NMI_IPI,d0
+ bne nmi_not_smp_callfunc # if not call function, jump
+
+ # function call nmi ipi
+ add 4,sp # no need to store TBR
+ mov GxICR_DETECT,d0 # clear NMI request
+ movbu d0,(GxICR(CALL_FUNCTION_NMI_IPI))
+ movhu (GxICR(CALL_FUNCTION_NMI_IPI)),d0
+ and ~EPSW_NMID,epsw # enable NMI
+
+ mov (sp),d0 # restore d0
+ SAVE_ALL
+ call smp_nmi_call_function_interrupt[],0
+ RESTORE_ALL
+
+nmi_not_smp_callfunc:
+#ifdef CONFIG_KERNEL_DEBUGGER
+ cmp DEBUGGER_NMI_IPI,d0
+ bne nmi_not_debugger # if not kernel debugger NMI IPI, jump
+
+ # kernel debugger NMI IPI
+ add 4,sp # no need to store TBR
+ mov GxICR_DETECT,d0 # clear NMI
+ movbu d0,(GxICR(DEBUGGER_NMI_IPI))
+ movhu (GxICR(DEBUGGER_NMI_IPI)),d0
+ and ~EPSW_NMID,epsw # enable NMI
+
+ mov (sp),d0
+ SAVE_ALL
+ mov fp,d0 # arg 0: stacked register file
+ mov a2,d1 # arg 1: exception number
+ call debugger_nmi_interrupt[],0
+ RESTORE_ALL
+
+nmi_not_debugger:
+#endif /* CONFIG_KERNEL_DEBUGGER */
+ mov (sp),d0 # restore TBR to d0
+ add 4,sp
+#endif /* CONFIG_SMP */
+
+ bra __common_exception_nonmi
+
+###############################################################################
+#
+# General exception entry point
+#
+###############################################################################
+ENTRY(__common_exception)
+ add -4,sp
+ mov d0,(sp)
+#if defined(CONFIG_ERRATUM_NEED_TO_RELOAD_MMUCTR)
+ mov (MMUCTR),d0
+ mov d0,(MMUCTR)
+#endif
+
+__common_exception_aux:
+ mov (TBR),d0
+ and ~EPSW_NMID,epsw # turn NMIs back on if not NMI
+ or EPSW_IE,epsw
+
+__common_exception_nonmi:
+ and 0x0000FFFF,d0 # turn the exception code into a vector
+ # table index
+
+ btst 0x00000007,d0
+ bne 1f
+ cmp 0x00000400,d0
+ bge 1f
+
+ SAVE_ALL # build the stack frame
+
+ mov (REG_D0,fp),a2 # get the exception number
+ mov (REG_ORIG_D0,fp),d0
+ mov d0,(REG_D0,fp)
+ mov -1,d0
+ mov d0,(REG_ORIG_D0,fp)
+
+#ifdef CONFIG_GDBSTUB
+#ifdef CONFIG_SMP
+ call gdbstub_busy_check[],0
+ and d0,d0 # check return value
+ beq 2f
+#else /* CONFIG_SMP */
+ btst 0x01,(gdbstub_busy)
+ beq 2f
+#endif /* CONFIG_SMP */
+ and ~EPSW_IE,epsw
+ mov fp,d0
+ mov a2,d1
+ call gdbstub_exception[],0 # gdbstub itself caused an exception
+ bra restore_all
+2:
+#endif /* CONFIG_GDBSTUB */
+
+ mov fp,d0 # arg 0: stacked register file
+ mov a2,d1 # arg 1: exception number
+ lsr 1,a2
+
+ mov (exception_table,a2),a2
+ calls (a2)
+ jmp ret_from_exception
+
+1: pi # BUG() equivalent
+
+###############################################################################
+#
+# Exception handler functions table
+#
+###############################################################################
+ .data
+ENTRY(exception_table)
+ .rept 0x400>>1
+ .long uninitialised_exception
+ .endr
+ .previous
+
+###############################################################################
+#
+# Change an entry in the exception table
+# - D0 exception code, D1 handler
+#
+###############################################################################
+ENTRY(set_excp_vector)
+ lsr 1,d0
+ add exception_table,d0
+ mov d1,(d0)
+ mov 4,d1
+ ret [],0
+
+###############################################################################
+#
+# System call table
+#
+###############################################################################
+ .data
+ENTRY(sys_call_table)
+ .long sys_restart_syscall /* 0 */
+ .long sys_exit
+ .long sys_fork
+ .long sys_read
+ .long sys_write
+ .long sys_open /* 5 */
+ .long sys_close
+ .long sys_waitpid
+ .long sys_creat
+ .long sys_link
+ .long sys_unlink /* 10 */
+ .long sys_execve
+ .long sys_chdir
+ .long sys_time
+ .long sys_mknod
+ .long sys_chmod /* 15 */
+ .long sys_lchown16
+ .long sys_ni_syscall /* old break syscall holder */
+ .long sys_stat
+ .long sys_lseek
+ .long sys_getpid /* 20 */
+ .long sys_mount
+ .long sys_oldumount
+ .long sys_setuid16
+ .long sys_getuid16
+ .long sys_stime /* 25 */
+ .long sys_ptrace
+ .long sys_alarm
+ .long sys_fstat
+ .long sys_pause
+ .long sys_utime /* 30 */
+ .long sys_ni_syscall /* old stty syscall holder */
+ .long sys_ni_syscall /* old gtty syscall holder */
+ .long sys_access
+ .long sys_nice
+ .long sys_ni_syscall /* 35 - old ftime syscall holder */
+ .long sys_sync
+ .long sys_kill
+ .long sys_rename
+ .long sys_mkdir
+ .long sys_rmdir /* 40 */
+ .long sys_dup
+ .long sys_pipe
+ .long sys_times
+ .long sys_ni_syscall /* old prof syscall holder */
+ .long sys_brk /* 45 */
+ .long sys_setgid16
+ .long sys_getgid16
+ .long sys_signal
+ .long sys_geteuid16
+ .long sys_getegid16 /* 50 */
+ .long sys_acct
+ .long sys_umount /* recycled never used phys() */
+ .long sys_ni_syscall /* old lock syscall holder */
+ .long sys_ioctl
+ .long sys_fcntl /* 55 */
+ .long sys_ni_syscall /* old mpx syscall holder */
+ .long sys_setpgid
+ .long sys_ni_syscall /* old ulimit syscall holder */
+ .long sys_ni_syscall /* old sys_olduname */
+ .long sys_umask /* 60 */
+ .long sys_chroot
+ .long sys_ustat
+ .long sys_dup2
+ .long sys_getppid
+ .long sys_getpgrp /* 65 */
+ .long sys_setsid
+ .long sys_sigaction
+ .long sys_sgetmask
+ .long sys_ssetmask
+ .long sys_setreuid16 /* 70 */
+ .long sys_setregid16
+ .long sys_sigsuspend
+ .long sys_sigpending
+ .long sys_sethostname
+ .long sys_setrlimit /* 75 */
+ .long sys_old_getrlimit
+ .long sys_getrusage
+ .long sys_gettimeofday
+ .long sys_settimeofday
+ .long sys_getgroups16 /* 80 */
+ .long sys_setgroups16
+ .long sys_old_select
+ .long sys_symlink
+ .long sys_lstat
+ .long sys_readlink /* 85 */
+ .long sys_uselib
+ .long sys_swapon
+ .long sys_reboot
+ .long sys_old_readdir
+ .long old_mmap /* 90 */
+ .long sys_munmap
+ .long sys_truncate
+ .long sys_ftruncate
+ .long sys_fchmod
+ .long sys_fchown16 /* 95 */
+ .long sys_getpriority
+ .long sys_setpriority
+ .long sys_ni_syscall /* old profil syscall holder */
+ .long sys_statfs
+ .long sys_fstatfs /* 100 */
+ .long sys_ni_syscall /* ioperm */
+ .long sys_socketcall
+ .long sys_syslog
+ .long sys_setitimer
+ .long sys_getitimer /* 105 */
+ .long sys_newstat
+ .long sys_newlstat
+ .long sys_newfstat
+ .long sys_ni_syscall /* old sys_uname */
+ .long sys_ni_syscall /* 110 - iopl */
+ .long sys_vhangup
+ .long sys_ni_syscall /* old "idle" system call */
+ .long sys_ni_syscall /* vm86old */
+ .long sys_wait4
+ .long sys_swapoff /* 115 */
+ .long sys_sysinfo
+ .long sys_ipc
+ .long sys_fsync
+ .long sys_sigreturn
+ .long sys_clone /* 120 */
+ .long sys_setdomainname
+ .long sys_newuname
+ .long sys_ni_syscall /* modify_ldt */
+ .long sys_adjtimex
+ .long sys_mprotect /* 125 */
+ .long sys_sigprocmask
+ .long sys_ni_syscall /* old "create_module" */
+ .long sys_init_module
+ .long sys_delete_module
+ .long sys_ni_syscall /* 130: old "get_kernel_syms" */
+ .long sys_quotactl
+ .long sys_getpgid
+ .long sys_fchdir
+ .long sys_bdflush
+ .long sys_sysfs /* 135 */
+ .long sys_personality
+ .long sys_ni_syscall /* reserved for afs_syscall */
+ .long sys_setfsuid16
+ .long sys_setfsgid16
+ .long sys_llseek /* 140 */
+ .long sys_getdents
+ .long sys_select
+ .long sys_flock
+ .long sys_msync
+ .long sys_readv /* 145 */
+ .long sys_writev
+ .long sys_getsid
+ .long sys_fdatasync
+ .long sys_sysctl
+ .long sys_mlock /* 150 */
+ .long sys_munlock
+ .long sys_mlockall
+ .long sys_munlockall
+ .long sys_sched_setparam
+ .long sys_sched_getparam /* 155 */
+ .long sys_sched_setscheduler
+ .long sys_sched_getscheduler
+ .long sys_sched_yield
+ .long sys_sched_get_priority_max
+ .long sys_sched_get_priority_min /* 160 */
+ .long sys_sched_rr_get_interval
+ .long sys_nanosleep
+ .long sys_mremap
+ .long sys_setresuid16
+ .long sys_getresuid16 /* 165 */
+ .long sys_ni_syscall /* vm86 */
+ .long sys_ni_syscall /* Old sys_query_module */
+ .long sys_poll
+ .long sys_ni_syscall /* was nfsservctl */
+ .long sys_setresgid16 /* 170 */
+ .long sys_getresgid16
+ .long sys_prctl
+ .long sys_rt_sigreturn
+ .long sys_rt_sigaction
+ .long sys_rt_sigprocmask /* 175 */
+ .long sys_rt_sigpending
+ .long sys_rt_sigtimedwait
+ .long sys_rt_sigqueueinfo
+ .long sys_rt_sigsuspend
+ .long sys_pread64 /* 180 */
+ .long sys_pwrite64
+ .long sys_chown16
+ .long sys_getcwd
+ .long sys_capget
+ .long sys_capset /* 185 */
+ .long sys_sigaltstack
+ .long sys_sendfile
+ .long sys_ni_syscall /* reserved for streams1 */
+ .long sys_ni_syscall /* reserved for streams2 */
+ .long sys_vfork /* 190 */
+ .long sys_getrlimit
+ .long sys_mmap_pgoff
+ .long sys_truncate64
+ .long sys_ftruncate64
+ .long sys_stat64 /* 195 */
+ .long sys_lstat64
+ .long sys_fstat64
+ .long sys_lchown
+ .long sys_getuid
+ .long sys_getgid /* 200 */
+ .long sys_geteuid
+ .long sys_getegid
+ .long sys_setreuid
+ .long sys_setregid
+ .long sys_getgroups /* 205 */
+ .long sys_setgroups
+ .long sys_fchown
+ .long sys_setresuid
+ .long sys_getresuid
+ .long sys_setresgid /* 210 */
+ .long sys_getresgid
+ .long sys_chown
+ .long sys_setuid
+ .long sys_setgid
+ .long sys_setfsuid /* 215 */
+ .long sys_setfsgid
+ .long sys_pivot_root
+ .long sys_mincore
+ .long sys_madvise
+ .long sys_getdents64 /* 220 */
+ .long sys_fcntl64
+ .long sys_ni_syscall /* reserved for TUX */
+ .long sys_ni_syscall
+ .long sys_gettid
+ .long sys_readahead /* 225 */
+ .long sys_setxattr
+ .long sys_lsetxattr
+ .long sys_fsetxattr
+ .long sys_getxattr
+ .long sys_lgetxattr /* 230 */
+ .long sys_fgetxattr
+ .long sys_listxattr
+ .long sys_llistxattr
+ .long sys_flistxattr
+ .long sys_removexattr /* 235 */
+ .long sys_lremovexattr
+ .long sys_fremovexattr
+ .long sys_tkill
+ .long sys_sendfile64
+ .long sys_futex /* 240 */
+ .long sys_sched_setaffinity
+ .long sys_sched_getaffinity
+ .long sys_ni_syscall /* sys_set_thread_area */
+ .long sys_ni_syscall /* sys_get_thread_area */
+ .long sys_io_setup /* 245 */
+ .long sys_io_destroy
+ .long sys_io_getevents
+ .long sys_io_submit
+ .long sys_io_cancel
+ .long sys_fadvise64 /* 250 */
+ .long sys_ni_syscall
+ .long sys_exit_group
+ .long sys_lookup_dcookie
+ .long sys_epoll_create
+ .long sys_epoll_ctl /* 255 */
+ .long sys_epoll_wait
+ .long sys_remap_file_pages
+ .long sys_set_tid_address
+ .long sys_timer_create
+ .long sys_timer_settime /* 260 */
+ .long sys_timer_gettime
+ .long sys_timer_getoverrun
+ .long sys_timer_delete
+ .long sys_clock_settime
+ .long sys_clock_gettime /* 265 */
+ .long sys_clock_getres
+ .long sys_clock_nanosleep
+ .long sys_statfs64
+ .long sys_fstatfs64
+ .long sys_tgkill /* 270 */
+ .long sys_utimes
+ .long sys_fadvise64_64
+ .long sys_ni_syscall /* sys_vserver */
+ .long sys_mbind
+ .long sys_get_mempolicy /* 275 */
+ .long sys_set_mempolicy
+ .long sys_mq_open
+ .long sys_mq_unlink
+ .long sys_mq_timedsend
+ .long sys_mq_timedreceive /* 280 */
+ .long sys_mq_notify
+ .long sys_mq_getsetattr
+ .long sys_kexec_load
+ .long sys_waitid
+ .long sys_ni_syscall /* 285 */ /* available */
+ .long sys_add_key
+ .long sys_request_key
+ .long sys_keyctl
+ .long sys_cacheflush
+ .long sys_ioprio_set /* 290 */
+ .long sys_ioprio_get
+ .long sys_inotify_init
+ .long sys_inotify_add_watch
+ .long sys_inotify_rm_watch
+ .long sys_migrate_pages /* 295 */
+ .long sys_openat
+ .long sys_mkdirat
+ .long sys_mknodat
+ .long sys_fchownat
+ .long sys_futimesat /* 300 */
+ .long sys_fstatat64
+ .long sys_unlinkat
+ .long sys_renameat
+ .long sys_linkat
+ .long sys_symlinkat /* 305 */
+ .long sys_readlinkat
+ .long sys_fchmodat
+ .long sys_faccessat
+ .long sys_pselect6
+ .long sys_ppoll /* 310 */
+ .long sys_unshare
+ .long sys_set_robust_list
+ .long sys_get_robust_list
+ .long sys_splice
+ .long sys_sync_file_range /* 315 */
+ .long sys_tee
+ .long sys_vmsplice
+ .long sys_move_pages
+ .long sys_getcpu
+ .long sys_epoll_pwait /* 320 */
+ .long sys_utimensat
+ .long sys_signalfd
+ .long sys_timerfd_create
+ .long sys_eventfd
+ .long sys_fallocate /* 325 */
+ .long sys_timerfd_settime
+ .long sys_timerfd_gettime
+ .long sys_signalfd4
+ .long sys_eventfd2
+ .long sys_epoll_create1 /* 330 */
+ .long sys_dup3
+ .long sys_pipe2
+ .long sys_inotify_init1
+ .long sys_preadv
+ .long sys_pwritev /* 335 */
+ .long sys_rt_tgsigqueueinfo
+ .long sys_perf_event_open
+ .long sys_recvmmsg
+ .long sys_setns
+
+
+nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/fpu-low.S b/arch/mn10300/kernel/fpu-low.S
new file mode 100644
index 00000000000..78df25cfae2
--- /dev/null
+++ b/arch/mn10300/kernel/fpu-low.S
@@ -0,0 +1,258 @@
+/* MN10300 Low level FPU management operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/linkage.h>
+#include <asm/cpu-regs.h>
+#include <asm/smp.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+#include <asm/frame.inc>
+
+.macro FPU_INIT_STATE_ALL
+ fmov 0,fs0
+ fmov fs0,fs1
+ fmov fs0,fs2
+ fmov fs0,fs3
+ fmov fs0,fs4
+ fmov fs0,fs5
+ fmov fs0,fs6
+ fmov fs0,fs7
+ fmov fs0,fs8
+ fmov fs0,fs9
+ fmov fs0,fs10
+ fmov fs0,fs11
+ fmov fs0,fs12
+ fmov fs0,fs13
+ fmov fs0,fs14
+ fmov fs0,fs15
+ fmov fs0,fs16
+ fmov fs0,fs17
+ fmov fs0,fs18
+ fmov fs0,fs19
+ fmov fs0,fs20
+ fmov fs0,fs21
+ fmov fs0,fs22
+ fmov fs0,fs23
+ fmov fs0,fs24
+ fmov fs0,fs25
+ fmov fs0,fs26
+ fmov fs0,fs27
+ fmov fs0,fs28
+ fmov fs0,fs29
+ fmov fs0,fs30
+ fmov fs0,fs31
+ fmov FPCR_INIT,fpcr
+.endm
+
+.macro FPU_SAVE_ALL areg,dreg
+ fmov fs0,(\areg+)
+ fmov fs1,(\areg+)
+ fmov fs2,(\areg+)
+ fmov fs3,(\areg+)
+ fmov fs4,(\areg+)
+ fmov fs5,(\areg+)
+ fmov fs6,(\areg+)
+ fmov fs7,(\areg+)
+ fmov fs8,(\areg+)
+ fmov fs9,(\areg+)
+ fmov fs10,(\areg+)
+ fmov fs11,(\areg+)
+ fmov fs12,(\areg+)
+ fmov fs13,(\areg+)
+ fmov fs14,(\areg+)
+ fmov fs15,(\areg+)
+ fmov fs16,(\areg+)
+ fmov fs17,(\areg+)
+ fmov fs18,(\areg+)
+ fmov fs19,(\areg+)
+ fmov fs20,(\areg+)
+ fmov fs21,(\areg+)
+ fmov fs22,(\areg+)
+ fmov fs23,(\areg+)
+ fmov fs24,(\areg+)
+ fmov fs25,(\areg+)
+ fmov fs26,(\areg+)
+ fmov fs27,(\areg+)
+ fmov fs28,(\areg+)
+ fmov fs29,(\areg+)
+ fmov fs30,(\areg+)
+ fmov fs31,(\areg+)
+ fmov fpcr,\dreg
+ mov \dreg,(\areg)
+.endm
+
+.macro FPU_RESTORE_ALL areg,dreg
+ fmov (\areg+),fs0
+ fmov (\areg+),fs1
+ fmov (\areg+),fs2
+ fmov (\areg+),fs3
+ fmov (\areg+),fs4
+ fmov (\areg+),fs5
+ fmov (\areg+),fs6
+ fmov (\areg+),fs7
+ fmov (\areg+),fs8
+ fmov (\areg+),fs9
+ fmov (\areg+),fs10
+ fmov (\areg+),fs11
+ fmov (\areg+),fs12
+ fmov (\areg+),fs13
+ fmov (\areg+),fs14
+ fmov (\areg+),fs15
+ fmov (\areg+),fs16
+ fmov (\areg+),fs17
+ fmov (\areg+),fs18
+ fmov (\areg+),fs19
+ fmov (\areg+),fs20
+ fmov (\areg+),fs21
+ fmov (\areg+),fs22
+ fmov (\areg+),fs23
+ fmov (\areg+),fs24
+ fmov (\areg+),fs25
+ fmov (\areg+),fs26
+ fmov (\areg+),fs27
+ fmov (\areg+),fs28
+ fmov (\areg+),fs29
+ fmov (\areg+),fs30
+ fmov (\areg+),fs31
+ mov (\areg),\dreg
+ fmov \dreg,fpcr
+.endm
+
+###############################################################################
+#
+# void fpu_init_state(void)
+# - initialise the FPU
+#
+###############################################################################
+ .globl fpu_init_state
+ .type fpu_init_state,@function
+fpu_init_state:
+ mov epsw,d0
+ or EPSW_FE,epsw
+
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ nop
+ nop
+ nop
+#endif
+ FPU_INIT_STATE_ALL
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ nop
+ nop
+ nop
+#endif
+ mov d0,epsw
+ ret [],0
+
+ .size fpu_init_state,.-fpu_init_state
+
+###############################################################################
+#
+# void fpu_save(struct fpu_state_struct *)
+# - save the fpu state
+# - note that an FPU Operational exception might occur during this process
+#
+###############################################################################
+ .globl fpu_save
+ .type fpu_save,@function
+fpu_save:
+ mov epsw,d1
+ or EPSW_FE,epsw /* enable the FPU so we can access it */
+
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ nop
+ nop
+#endif
+ mov d0,a0
+ FPU_SAVE_ALL a0,d0
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ nop
+ nop
+#endif
+
+ mov d1,epsw
+ ret [],0
+
+ .size fpu_save,.-fpu_save
+
+###############################################################################
+#
+# void fpu_disabled(void)
+# - handle an exception due to the FPU being disabled
+# when CONFIG_FPU is enabled
+#
+###############################################################################
+ .type fpu_disabled,@function
+ .globl fpu_disabled
+fpu_disabled:
+ or EPSW_nAR|EPSW_FE,epsw
+ nop
+ nop
+ nop
+
+ mov sp,a1
+ mov (a1),d1 /* get epsw of user context */
+ and ~(THREAD_SIZE-1),a1 /* a1: (thread_info *ti) */
+ mov (TI_task,a1),a2 /* a2: (task_struct *tsk) */
+ btst EPSW_nSL,d1
+ beq fpu_used_in_kernel
+
+ or EPSW_FE,d1
+ mov d1,(sp)
+ mov (TASK_THREAD+THREAD_FPU_FLAGS,a2),d1
+#ifndef CONFIG_LAZY_SAVE_FPU
+ or __THREAD_HAS_FPU,d1
+ mov d1,(TASK_THREAD+THREAD_FPU_FLAGS,a2)
+#else /* !CONFIG_LAZY_SAVE_FPU */
+ mov (fpu_state_owner),a0
+ cmp 0,a0
+ beq fpu_regs_save_end
+
+ mov (TASK_THREAD+THREAD_UREGS,a0),a1
+ add TASK_THREAD+THREAD_FPU_STATE,a0
+ FPU_SAVE_ALL a0,d0
+
+ mov (REG_EPSW,a1),d0
+ and ~EPSW_FE,d0
+ mov d0,(REG_EPSW,a1)
+
+fpu_regs_save_end:
+ mov a2,(fpu_state_owner)
+#endif /* !CONFIG_LAZY_SAVE_FPU */
+
+ btst __THREAD_USING_FPU,d1
+ beq fpu_regs_init
+ add TASK_THREAD+THREAD_FPU_STATE,a2
+ FPU_RESTORE_ALL a2,d0
+ rti
+
+fpu_regs_init:
+ FPU_INIT_STATE_ALL
+ add TASK_THREAD+THREAD_FPU_FLAGS,a2
+ bset __THREAD_USING_FPU,(0,a2)
+ rti
+
+fpu_used_in_kernel:
+ and ~(EPSW_nAR|EPSW_FE),epsw
+ nop
+ nop
+
+ add -4,sp
+ SAVE_ALL
+ mov -1,d0
+ mov d0,(REG_ORIG_D0,fp)
+
+ and ~EPSW_NMID,epsw
+
+ mov fp,d0
+ call fpu_disabled_in_kernel[],0
+ jmp ret_from_exception
+
+ .size fpu_disabled,.-fpu_disabled
diff --git a/arch/mn10300/kernel/fpu-nofpu-low.S b/arch/mn10300/kernel/fpu-nofpu-low.S
new file mode 100644
index 00000000000..7ea087a549f
--- /dev/null
+++ b/arch/mn10300/kernel/fpu-nofpu-low.S
@@ -0,0 +1,39 @@
+/* MN10300 Low level FPU management operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/linkage.h>
+#include <asm/cpu-regs.h>
+#include <asm/smp.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+#include <asm/frame.inc>
+
+###############################################################################
+#
+# void fpu_disabled(void)
+# - handle an exception due to the FPU being disabled
+# when CONFIG_FPU is disabled
+#
+###############################################################################
+ .type fpu_disabled,@function
+ .globl fpu_disabled
+fpu_disabled:
+ add -4,sp
+ SAVE_ALL
+ mov -1,d0
+ mov d0,(REG_ORIG_D0,fp)
+
+ and ~EPSW_NMID,epsw
+
+ mov fp,d0
+ call unexpected_fpu_exception[],0
+ jmp ret_from_exception
+
+ .size fpu_disabled,.-fpu_disabled
diff --git a/arch/mn10300/kernel/fpu-nofpu.c b/arch/mn10300/kernel/fpu-nofpu.c
new file mode 100644
index 00000000000..31c765b92c5
--- /dev/null
+++ b/arch/mn10300/kernel/fpu-nofpu.c
@@ -0,0 +1,30 @@
+/* MN10300 FPU management
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <asm/fpu.h>
+
+/*
+ * handle an FPU operational exception
+ * - there's a possibility that if the FPU is asynchronous, the signal might
+ * be meant for a process other than the current one
+ */
+asmlinkage
+void unexpected_fpu_exception(struct pt_regs *regs, enum exception_code code)
+{
+ panic("An FPU exception was received, but there's no FPU enabled.");
+}
+
+/*
+ * fill in the FPU structure for a core dump
+ */
+int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpreg)
+{
+ return 0; /* not valid */
+}
diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c
new file mode 100644
index 00000000000..bb5fa7df6c4
--- /dev/null
+++ b/arch/mn10300/kernel/fpu.c
@@ -0,0 +1,176 @@
+/* MN10300 FPU management
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <asm/uaccess.h>
+#include <asm/fpu.h>
+#include <asm/elf.h>
+#include <asm/exceptions.h>
+#include <asm/system.h>
+
+#ifdef CONFIG_LAZY_SAVE_FPU
+struct task_struct *fpu_state_owner;
+#endif
+
+/*
+ * error functions in FPU disabled exception
+ */
+asmlinkage void fpu_disabled_in_kernel(struct pt_regs *regs)
+{
+ die_if_no_fixup("An FPU Disabled exception happened in kernel space\n",
+ regs, EXCEP_FPU_DISABLED);
+}
+
+/*
+ * handle an FPU operational exception
+ * - there's a possibility that if the FPU is asynchronous, the signal might
+ * be meant for a process other than the current one
+ */
+asmlinkage void fpu_exception(struct pt_regs *regs, enum exception_code code)
+{
+ struct task_struct *tsk = current;
+ siginfo_t info;
+ u32 fpcr;
+
+ if (!user_mode(regs))
+ die_if_no_fixup("An FPU Operation exception happened in"
+ " kernel space\n",
+ regs, code);
+
+ if (!is_using_fpu(tsk))
+ die_if_no_fixup("An FPU Operation exception happened,"
+ " but the FPU is not in use",
+ regs, code);
+
+ info.si_signo = SIGFPE;
+ info.si_errno = 0;
+ info.si_addr = (void *) tsk->thread.uregs->pc;
+ info.si_code = FPE_FLTINV;
+
+ unlazy_fpu(tsk);
+
+ fpcr = tsk->thread.fpu_state.fpcr;
+
+ if (fpcr & FPCR_EC_Z)
+ info.si_code = FPE_FLTDIV;
+ else if (fpcr & FPCR_EC_O)
+ info.si_code = FPE_FLTOVF;
+ else if (fpcr & FPCR_EC_U)
+ info.si_code = FPE_FLTUND;
+ else if (fpcr & FPCR_EC_I)
+ info.si_code = FPE_FLTRES;
+
+ force_sig_info(SIGFPE, &info, tsk);
+}
+
+/*
+ * save the FPU state to a signal context
+ */
+int fpu_setup_sigcontext(struct fpucontext *fpucontext)
+{
+ struct task_struct *tsk = current;
+
+ if (!is_using_fpu(tsk))
+ return 0;
+
+ /* transfer the current FPU state to memory and cause fpu_init() to be
+ * triggered by the next attempted FPU operation by the current
+ * process.
+ */
+ preempt_disable();
+
+#ifndef CONFIG_LAZY_SAVE_FPU
+ if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
+ fpu_save(&tsk->thread.fpu_state);
+ tsk->thread.uregs->epsw &= ~EPSW_FE;
+ tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
+ }
+#else /* !CONFIG_LAZY_SAVE_FPU */
+ if (fpu_state_owner == tsk) {
+ fpu_save(&tsk->thread.fpu_state);
+ fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
+ fpu_state_owner = NULL;
+ }
+#endif /* !CONFIG_LAZY_SAVE_FPU */
+
+ preempt_enable();
+
+ /* we no longer have a valid current FPU state */
+ clear_using_fpu(tsk);
+
+ /* transfer the saved FPU state onto the userspace stack */
+ if (copy_to_user(fpucontext,
+ &tsk->thread.fpu_state,
+ min(sizeof(struct fpu_state_struct),
+ sizeof(struct fpucontext))))
+ return -1;
+
+ return 1;
+}
+
+/*
+ * kill a process's FPU state during restoration after signal handling
+ */
+void fpu_kill_state(struct task_struct *tsk)
+{
+ /* disown anything left in the FPU */
+ preempt_disable();
+
+#ifndef CONFIG_LAZY_SAVE_FPU
+ if (tsk->thread.fpu_flags & THREAD_HAS_FPU) {
+ tsk->thread.uregs->epsw &= ~EPSW_FE;
+ tsk->thread.fpu_flags &= ~THREAD_HAS_FPU;
+ }
+#else /* !CONFIG_LAZY_SAVE_FPU */
+ if (fpu_state_owner == tsk) {
+ fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
+ fpu_state_owner = NULL;
+ }
+#endif /* !CONFIG_LAZY_SAVE_FPU */
+
+ preempt_enable();
+
+ /* we no longer have a valid current FPU state */
+ clear_using_fpu(tsk);
+}
+
+/*
+ * restore the FPU state from a signal context
+ */
+int fpu_restore_sigcontext(struct fpucontext *fpucontext)
+{
+ struct task_struct *tsk = current;
+ int ret;
+
+ /* load up the old FPU state */
+ ret = copy_from_user(&tsk->thread.fpu_state, fpucontext,
+ min(sizeof(struct fpu_state_struct),
+ sizeof(struct fpucontext)));
+ if (!ret)
+ set_using_fpu(tsk);
+
+ return ret;
+}
+
+/*
+ * fill in the FPU structure for a core dump
+ */
+int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpreg)
+{
+ struct task_struct *tsk = current;
+ int fpvalid;
+
+ fpvalid = is_using_fpu(tsk);
+ if (fpvalid) {
+ unlazy_fpu(tsk);
+ memcpy(fpreg, &tsk->thread.fpu_state, sizeof(*fpreg));
+ }
+
+ return fpvalid;
+}
diff --git a/arch/mn10300/kernel/gdb-io-serial-low.S b/arch/mn10300/kernel/gdb-io-serial-low.S
new file mode 100644
index 00000000000..b1d0152e96c
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-serial-low.S
@@ -0,0 +1,91 @@
+###############################################################################
+#
+# 16550 serial Rx interrupt handler for gdbstub I/O
+#
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Written by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/smp.h>
+#include <asm/cpu-regs.h>
+#include <asm/thread_info.h>
+#include <asm/frame.inc>
+#include <asm/intctl-regs.h>
+#include <asm/irqflags.h>
+#include <unit/serial.h>
+
+ .text
+
+###############################################################################
+#
+# GDB stub serial receive interrupt entry point
+# - intended to run at interrupt priority 0
+#
+###############################################################################
+ .globl gdbstub_io_rx_handler
+ .type gdbstub_io_rx_handler,@function
+gdbstub_io_rx_handler:
+ movm [d2,d3,a2,a3],(sp)
+
+#if 1
+ movbu (GDBPORT_SERIAL_IIR),d2
+#endif
+
+ mov (gdbstub_rx_inp),a3
+gdbstub_io_rx_more:
+ mov a3,a2
+ add 2,a3
+ and 0x00000fff,a3
+ mov (gdbstub_rx_outp),d3
+ cmp a3,d3
+ beq gdbstub_io_rx_overflow
+
+ movbu (GDBPORT_SERIAL_LSR),d3
+ btst UART_LSR_DR,d3
+ beq gdbstub_io_rx_done
+ movbu (GDBPORT_SERIAL_RX),d2
+ movbu d3,(gdbstub_rx_buffer+1,a2)
+ movbu d2,(gdbstub_rx_buffer,a2)
+ mov a3,(gdbstub_rx_inp)
+ bra gdbstub_io_rx_more
+
+gdbstub_io_rx_done:
+ mov GxICR_DETECT,d2
+ movbu d2,(XIRQxICR(GDBPORT_SERIAL_IRQ)) # ACK the interrupt
+ movhu (XIRQxICR(GDBPORT_SERIAL_IRQ)),d2 # flush
+ movm (sp),[d2,d3,a2,a3]
+ bset 0x01,(gdbstub_busy)
+ beq gdbstub_io_rx_enter
+ rti
+
+gdbstub_io_rx_overflow:
+ bset 0x01,(gdbstub_rx_overflow)
+ bra gdbstub_io_rx_done
+
+gdbstub_io_rx_enter:
+ LOCAL_CHANGE_INTR_MASK_LEVEL(NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL+1))
+ add -4,sp
+ SAVE_ALL
+
+ mov 0xffffffff,d0
+ mov d0,(REG_ORIG_D0,fp)
+ mov 0x280,d1
+
+ mov fp,d0
+ call gdbstub_rx_irq[],0 # gdbstub_rx_irq(regs,excep)
+
+ LOCAL_CLI
+ bclr 0x01,(gdbstub_busy)
+
+ .globl gdbstub_return
+gdbstub_return:
+ RESTORE_ALL
+
+ .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
new file mode 100644
index 00000000000..f28dc99c6f7
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-serial.c
@@ -0,0 +1,175 @@
+/* 16550 serial driver for gdbstub I/O
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/nmi.h>
+
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/gdb-stub.h>
+#include <asm/exceptions.h>
+#include <asm/serial-regs.h>
+#include <unit/serial.h>
+#include <asm/smp.h>
+
+/*
+ * initialise the GDB stub
+ */
+void gdbstub_io_init(void)
+{
+ u16 tmp;
+
+ /* set up the serial port */
+ GDBPORT_SERIAL_LCR = UART_LCR_WLEN8; /* 1N8 */
+ GDBPORT_SERIAL_FCR = (UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
+ UART_FCR_CLEAR_XMIT);
+
+ FLOWCTL_CLEAR(DTR);
+ FLOWCTL_SET(RTS);
+
+ gdbstub_io_set_baud(115200);
+
+ /* we want to get serial receive interrupts */
+ XIRQxICR(GDBPORT_SERIAL_IRQ) = 0;
+ tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
+
+#if CONFIG_GDBSTUB_IRQ_LEVEL == 0
+ IVAR0 = EXCEP_IRQ_LEVEL0;
+#elif CONFIG_GDBSTUB_IRQ_LEVEL == 1
+ IVAR1 = EXCEP_IRQ_LEVEL1;
+#elif CONFIG_GDBSTUB_IRQ_LEVEL == 2
+ IVAR2 = EXCEP_IRQ_LEVEL2;
+#elif CONFIG_GDBSTUB_IRQ_LEVEL == 3
+ IVAR3 = EXCEP_IRQ_LEVEL3;
+#elif CONFIG_GDBSTUB_IRQ_LEVEL == 4
+ IVAR4 = EXCEP_IRQ_LEVEL4;
+#elif CONFIG_GDBSTUB_IRQ_LEVEL == 5
+ IVAR5 = EXCEP_IRQ_LEVEL5;
+#else
+#error "Unknown irq level for gdbstub."
+#endif
+
+ set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL),
+ gdbstub_io_rx_handler);
+
+ XIRQxICR(GDBPORT_SERIAL_IRQ) &= ~GxICR_REQUEST;
+ XIRQxICR(GDBPORT_SERIAL_IRQ) =
+ GxICR_ENABLE | NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL);
+ tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
+
+ GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI;
+
+ /* permit level 0 IRQs to take place */
+ arch_local_change_intr_mask_level(
+ NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1));
+}
+
+/*
+ * set up the GDB stub serial port baud rate timers
+ */
+void gdbstub_io_set_baud(unsigned baud)
+{
+ unsigned value;
+ u8 lcr;
+
+ value = 18432000 / 16 / baud;
+
+ lcr = GDBPORT_SERIAL_LCR;
+ GDBPORT_SERIAL_LCR |= UART_LCR_DLAB;
+ GDBPORT_SERIAL_DLL = value & 0xff;
+ GDBPORT_SERIAL_DLM = (value >> 8) & 0xff;
+ GDBPORT_SERIAL_LCR = lcr;
+}
+
+/*
+ * wait for a character to come from the debugger
+ */
+int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
+{
+ unsigned ix;
+ u8 ch, st;
+#if defined(CONFIG_MN10300_WD_TIMER)
+ int cpu;
+#endif
+
+ *_ch = 0xff;
+
+ if (gdbstub_rx_unget) {
+ *_ch = gdbstub_rx_unget;
+ gdbstub_rx_unget = 0;
+ return 0;
+ }
+
+ try_again:
+ /* pull chars out of the buffer */
+ ix = gdbstub_rx_outp;
+ barrier();
+ if (ix == gdbstub_rx_inp) {
+ if (nonblock)
+ return -EAGAIN;
+#ifdef CONFIG_MN10300_WD_TIMER
+ for (cpu = 0; cpu < NR_CPUS; cpu++)
+ watchdog_alert_counter[cpu] = 0;
+#endif
+ goto try_again;
+ }
+
+ ch = gdbstub_rx_buffer[ix++];
+ st = gdbstub_rx_buffer[ix++];
+ barrier();
+ gdbstub_rx_outp = ix & 0x00000fff;
+
+ if (st & UART_LSR_BI) {
+ gdbstub_proto("### GDB Rx Break Detected ###\n");
+ return -EINTR;
+ } else if (st & (UART_LSR_FE | UART_LSR_OE | UART_LSR_PE)) {
+ gdbstub_proto("### GDB Rx Error (st=%02x) ###\n", st);
+ return -EIO;
+ } else {
+ gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n", ch, st);
+ *_ch = ch & 0x7f;
+ return 0;
+ }
+}
+
+/*
+ * send a character to the debugger
+ */
+void gdbstub_io_tx_char(unsigned char ch)
+{
+ FLOWCTL_SET(DTR);
+ LSR_WAIT_FOR(THRE);
+ /* FLOWCTL_WAIT_FOR(CTS); */
+
+ if (ch == 0x0a) {
+ GDBPORT_SERIAL_TX = 0x0d;
+ LSR_WAIT_FOR(THRE);
+ /* FLOWCTL_WAIT_FOR(CTS); */
+ }
+ GDBPORT_SERIAL_TX = ch;
+
+ FLOWCTL_CLEAR(DTR);
+}
+
+/*
+ * send a character to the debugger
+ */
+void gdbstub_io_tx_flush(void)
+{
+ LSR_WAIT_FOR(TEMT);
+ LSR_WAIT_FOR(THRE);
+ FLOWCTL_CLEAR(DTR);
+}
diff --git a/arch/mn10300/kernel/gdb-io-ttysm-low.S b/arch/mn10300/kernel/gdb-io-ttysm-low.S
new file mode 100644
index 00000000000..060b7cca735
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-ttysm-low.S
@@ -0,0 +1,93 @@
+###############################################################################
+#
+# MN10300 On-chip serial Rx interrupt handler for GDB stub I/O
+#
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Written by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/smp.h>
+#include <asm/thread_info.h>
+#include <asm/cpu-regs.h>
+#include <asm/frame.inc>
+#include <asm/intctl-regs.h>
+#include <unit/serial.h>
+#include "mn10300-serial.h"
+
+ .text
+
+###############################################################################
+#
+# GDB stub serial receive interrupt entry point
+# - intended to run at interrupt priority 0
+#
+###############################################################################
+ .globl gdbstub_io_rx_handler
+ .type gdbstub_io_rx_handler,@function
+gdbstub_io_rx_handler:
+ movm [d2,d3,a2,a3],(sp)
+
+ mov (gdbstub_rx_inp),a3
+gdbstub_io_rx_more:
+ mov a3,a2
+ add 2,a3
+ and PAGE_SIZE_asm-1,a3
+ mov (gdbstub_rx_outp),d3
+ cmp a3,d3
+ beq gdbstub_io_rx_overflow
+
+ movbu (SCgSTR),d3
+ btst SC01STR_RBF,d3
+ beq gdbstub_io_rx_done
+ movbu (SCgRXB),d2
+ movbu d3,(gdbstub_rx_buffer+1,a2)
+ movbu d2,(gdbstub_rx_buffer,a2)
+ mov a3,(gdbstub_rx_inp)
+ bra gdbstub_io_rx_more
+
+gdbstub_io_rx_done:
+ mov GxICR_DETECT,d2
+ movbu d2,(GxICR(SCgRXIRQ)) # ACK the interrupt
+ movhu (GxICR(SCgRXIRQ)),d2 # flush
+
+ movm (sp),[d2,d3,a2,a3]
+ bset 0x01,(gdbstub_busy)
+ beq gdbstub_io_rx_enter
+ rti
+
+gdbstub_io_rx_overflow:
+ bset 0x01,(gdbstub_rx_overflow)
+ bra gdbstub_io_rx_done
+
+###############################################################################
+#
+# debugging interrupt - enter the GDB stub proper
+#
+###############################################################################
+gdbstub_io_rx_enter:
+ or EPSW_IE|EPSW_IM_1,epsw
+ add -4,sp
+ SAVE_ALL
+
+ mov 0xffffffff,d0
+ mov d0,(REG_ORIG_D0,fp)
+ mov 0x280,d1
+
+ mov fp,d0
+ call gdbstub_rx_irq[],0 # gdbstub_io_rx_irq(regs,excep)
+
+ and ~EPSW_IE,epsw
+ bclr 0x01,(gdbstub_busy)
+
+ .globl gdbstub_return
+gdbstub_return:
+ RESTORE_ALL
+
+ .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
new file mode 100644
index 00000000000..c859cacbb9c
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -0,0 +1,304 @@
+/* MN10300 On-chip serial driver for gdbstub I/O
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/tty.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/gdb-stub.h>
+#include <asm/exceptions.h>
+#include <unit/clock.h>
+#include "mn10300-serial.h"
+
+#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
+struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif0;
+#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
+struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif1;
+#else
+struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif2;
+#endif
+
+
+/*
+ * initialise the GDB stub I/O routines
+ */
+void __init gdbstub_io_init(void)
+{
+ uint16_t scxctr;
+ int tmp;
+
+ switch (gdbstub_port->clock_src) {
+ case MNSCx_CLOCK_SRC_IOCLK:
+ gdbstub_port->ioclk = MN10300_IOCLK;
+ break;
+
+#ifdef MN10300_IOBCLK
+ case MNSCx_CLOCK_SRC_IOBCLK:
+ gdbstub_port->ioclk = MN10300_IOBCLK;
+ break;
+#endif
+ default:
+ BUG();
+ }
+
+ /* set up the serial port */
+ gdbstub_io_set_baud(115200);
+
+ /* we want to get serial receive interrupts */
+ set_intr_level(gdbstub_port->rx_irq,
+ NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
+ set_intr_level(gdbstub_port->tx_irq,
+ NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
+ set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL),
+ gdbstub_io_rx_handler);
+
+ *gdbstub_port->rx_icr |= GxICR_ENABLE;
+ tmp = *gdbstub_port->rx_icr;
+
+ /* enable the device */
+ scxctr = SC01CTR_CLN_8BIT; /* 1N8 */
+ switch (gdbstub_port->div_timer) {
+ case MNSCx_DIV_TIMER_16BIT:
+ scxctr |= SC0CTR_CK_TM8UFLOW_8; /* == SC1CTR_CK_TM9UFLOW_8
+ == SC2CTR_CK_TM10UFLOW_8 */
+ break;
+
+ case MNSCx_DIV_TIMER_8BIT:
+ scxctr |= SC0CTR_CK_TM2UFLOW_8;
+ break;
+ }
+
+ scxctr |= SC01CTR_TXE | SC01CTR_RXE;
+
+ *gdbstub_port->_control = scxctr;
+ tmp = *gdbstub_port->_control;
+
+ /* permit level 0 IRQs only */
+ arch_local_change_intr_mask_level(
+ NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
+}
+
+/*
+ * set up the GDB stub serial port baud rate timers
+ */
+void gdbstub_io_set_baud(unsigned baud)
+{
+ const unsigned bits = 10; /* 1 [start] + 8 [data] + 0 [parity] +
+ * 1 [stop] */
+ unsigned long ioclk = gdbstub_port->ioclk;
+ unsigned xdiv, tmp;
+ uint16_t tmxbr;
+ uint8_t tmxmd;
+
+ if (!baud) {
+ baud = 9600;
+ } else if (baud == 134) {
+ baud = 269; /* 134 is really 134.5 */
+ xdiv = 2;
+ }
+
+try_alternative:
+ xdiv = 1;
+
+ switch (gdbstub_port->div_timer) {
+ case MNSCx_DIV_TIMER_16BIT:
+ tmxmd = TM8MD_SRC_IOCLK;
+ tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 65535)
+ goto timer_okay;
+
+ tmxmd = TM8MD_SRC_IOCLK_8;
+ tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 65535)
+ goto timer_okay;
+
+ tmxmd = TM8MD_SRC_IOCLK_32;
+ tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 65535)
+ goto timer_okay;
+
+ break;
+
+ case MNSCx_DIV_TIMER_8BIT:
+ tmxmd = TM2MD_SRC_IOCLK;
+ tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 255)
+ goto timer_okay;
+
+ tmxmd = TM2MD_SRC_IOCLK_8;
+ tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 255)
+ goto timer_okay;
+
+ tmxmd = TM2MD_SRC_IOCLK_32;
+ tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
+ if (tmp > 0 && tmp <= 255)
+ goto timer_okay;
+ break;
+ }
+
+ /* as a last resort, if the quotient is zero, default to 9600 bps */
+ baud = 9600;
+ goto try_alternative;
+
+timer_okay:
+ gdbstub_port->uart.timeout = (2 * bits * HZ) / baud;
+ gdbstub_port->uart.timeout += HZ / 50;
+
+ /* set the timer to produce the required baud rate */
+ switch (gdbstub_port->div_timer) {
+ case MNSCx_DIV_TIMER_16BIT:
+ *gdbstub_port->_tmxmd = 0;
+ *gdbstub_port->_tmxbr = tmxbr;
+ *gdbstub_port->_tmxmd = TM8MD_INIT_COUNTER;
+ *gdbstub_port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
+ break;
+
+ case MNSCx_DIV_TIMER_8BIT:
+ *gdbstub_port->_tmxmd = 0;
+ *(volatile u8 *) gdbstub_port->_tmxbr = (u8)tmxbr;
+ *gdbstub_port->_tmxmd = TM2MD_INIT_COUNTER;
+ *gdbstub_port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
+ break;
+ }
+}
+
+/*
+ * wait for a character to come from the debugger
+ */
+int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
+{
+ unsigned ix;
+ u8 ch, st;
+#if defined(CONFIG_MN10300_WD_TIMER)
+ int cpu;
+#endif
+
+ *_ch = 0xff;
+
+ if (gdbstub_rx_unget) {
+ *_ch = gdbstub_rx_unget;
+ gdbstub_rx_unget = 0;
+ return 0;
+ }
+
+try_again:
+ /* pull chars out of the buffer */
+ ix = gdbstub_rx_outp;
+ barrier();
+ if (ix == gdbstub_rx_inp) {
+ if (nonblock)
+ return -EAGAIN;
+#ifdef CONFIG_MN10300_WD_TIMER
+ for (cpu = 0; cpu < NR_CPUS; cpu++)
+ watchdog_alert_counter[cpu] = 0;
+#endif
+ goto try_again;
+ }
+
+ ch = gdbstub_rx_buffer[ix++];
+ st = gdbstub_rx_buffer[ix++];
+ barrier();
+ gdbstub_rx_outp = ix & (PAGE_SIZE - 1);
+
+ st &= SC01STR_RXF | SC01STR_RBF | SC01STR_FEF | SC01STR_PEF |
+ SC01STR_OEF;
+
+ /* deal with what we've got
+ * - note that the UART doesn't do BREAK-detection for us
+ */
+ if (st & SC01STR_FEF && ch == 0) {
+ switch (gdbstub_port->rx_brk) {
+ case 0: gdbstub_port->rx_brk = 1; goto try_again;
+ case 1: gdbstub_port->rx_brk = 2; goto try_again;
+ case 2:
+ gdbstub_port->rx_brk = 3;
+ gdbstub_proto("### GDB MNSERIAL Rx Break Detected"
+ " ###\n");
+ return -EINTR;
+ default:
+ goto try_again;
+ }
+ } else if (st & SC01STR_FEF) {
+ if (gdbstub_port->rx_brk)
+ goto try_again;
+
+ gdbstub_proto("### GDB MNSERIAL Framing Error ###\n");
+ return -EIO;
+ } else if (st & SC01STR_OEF) {
+ if (gdbstub_port->rx_brk)
+ goto try_again;
+
+ gdbstub_proto("### GDB MNSERIAL Overrun Error ###\n");
+ return -EIO;
+ } else if (st & SC01STR_PEF) {
+ if (gdbstub_port->rx_brk)
+ goto try_again;
+
+ gdbstub_proto("### GDB MNSERIAL Parity Error ###\n");
+ return -EIO;
+ } else {
+ /* look for the tail-end char on a break run */
+ if (gdbstub_port->rx_brk == 3) {
+ switch (ch) {
+ case 0xFF:
+ case 0xFE:
+ case 0xFC:
+ case 0xF8:
+ case 0xF0:
+ case 0xE0:
+ case 0xC0:
+ case 0x80:
+ case 0x00:
+ gdbstub_port->rx_brk = 0;
+ goto try_again;
+ default:
+ break;
+ }
+ }
+
+ gdbstub_port->rx_brk = 0;
+ gdbstub_io("### GDB Rx %02x (st=%02x) ###\n", ch, st);
+ *_ch = ch & 0x7f;
+ return 0;
+ }
+}
+
+/*
+ * send a character to the debugger
+ */
+void gdbstub_io_tx_char(unsigned char ch)
+{
+ while (*gdbstub_port->_status & SC01STR_TBF)
+ continue;
+
+ if (ch == 0x0a) {
+ *(u8 *) gdbstub_port->_txb = 0x0d;
+ while (*gdbstub_port->_status & SC01STR_TBF)
+ continue;
+ }
+
+ *(u8 *) gdbstub_port->_txb = ch;
+}
+
+/*
+ * flush the transmission buffers
+ */
+void gdbstub_io_tx_flush(void)
+{
+ while (*gdbstub_port->_status & (SC01STR_TBF | SC01STR_TXF))
+ continue;
+}
diff --git a/arch/mn10300/kernel/gdb-low.S b/arch/mn10300/kernel/gdb-low.S
new file mode 100644
index 00000000000..e2725552cd8
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-low.S
@@ -0,0 +1,115 @@
+###############################################################################
+#
+# MN10300 Low-level gdbstub routines
+#
+# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+# Written by David Howells (dhowells@redhat.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public Licence
+# as published by the Free Software Foundation; either version
+# 2 of the Licence, or (at your option) any later version.
+#
+###############################################################################
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/smp.h>
+#include <asm/cache.h>
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+#include <asm/frame.inc>
+#include <asm/serial-regs.h>
+
+ .text
+
+###############################################################################
+#
+# GDB stub read memory with guard
+# - D0 holds the memory address to read
+# - D1 holds the address to store the byte into
+#
+###############################################################################
+ .globl gdbstub_read_byte_guard
+ .globl gdbstub_read_byte_cont
+ENTRY(gdbstub_read_byte)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_read_byte_guard:
+ movbu (a0),d1
+gdbstub_read_byte_cont:
+ movbu d1,(a1)
+ ret [],0
+
+ .globl gdbstub_read_word_guard
+ .globl gdbstub_read_word_cont
+ENTRY(gdbstub_read_word)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_read_word_guard:
+ movhu (a0),d1
+gdbstub_read_word_cont:
+ movhu d1,(a1)
+ ret [],0
+
+ .globl gdbstub_read_dword_guard
+ .globl gdbstub_read_dword_cont
+ENTRY(gdbstub_read_dword)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_read_dword_guard:
+ mov (a0),d1
+gdbstub_read_dword_cont:
+ mov d1,(a1)
+ ret [],0
+
+###############################################################################
+#
+# GDB stub write memory with guard
+# - D0 holds the byte to store
+# - D1 holds the memory address to write
+#
+###############################################################################
+ .globl gdbstub_write_byte_guard
+ .globl gdbstub_write_byte_cont
+ENTRY(gdbstub_write_byte)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_write_byte_guard:
+ movbu a0,(a1)
+gdbstub_write_byte_cont:
+ ret [],0
+
+ .globl gdbstub_write_word_guard
+ .globl gdbstub_write_word_cont
+ENTRY(gdbstub_write_word)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_write_word_guard:
+ movhu a0,(a1)
+gdbstub_write_word_cont:
+ ret [],0
+
+ .globl gdbstub_write_dword_guard
+ .globl gdbstub_write_dword_cont
+ENTRY(gdbstub_write_dword)
+ mov d0,a0
+ mov d1,a1
+ clr d0
+gdbstub_write_dword_guard:
+ mov a0,(a1)
+gdbstub_write_dword_cont:
+ ret [],0
+
+###############################################################################
+#
+# GDB stub BUG() trap
+#
+###############################################################################
+ENTRY(__gdbstub_bug_trap)
+ .byte 0xF7,0xF7 # don't use 0xFF as the JTAG unit preempts that
+ ret [],0
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
new file mode 100644
index 00000000000..522eb8a9b60
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -0,0 +1,1924 @@
+/* MN10300 GDB stub
+ *
+ * Originally written by Glenn Engel, Lake Stevens Instrument Division
+ *
+ * Contributed by HP Systems
+ *
+ * Modified for SPARC by Stu Grossman, Cygnus Support.
+ *
+ * Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
+ * Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
+ *
+ * Copyright (C) 1995 Andreas Busse
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified for Linux/mn10300 by David Howells <dhowells@redhat.com>
+ */
+
+/*
+ * To enable debugger support, two things need to happen. One, a
+ * call to set_debug_traps() is necessary in order to allow any breakpoints
+ * or error conditions to be properly intercepted and reported to gdb.
+ * Two, a breakpoint needs to be generated to begin communication. This
+ * is most easily accomplished by a call to breakpoint(). Breakpoint()
+ * simulates a breakpoint by executing a BREAK instruction.
+ *
+ *
+ * The following gdb commands are supported:
+ *
+ * command function Return value
+ *
+ * g return the value of the CPU registers hex data or ENN
+ * G set the value of the CPU registers OK or ENN
+ *
+ * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
+ * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
+ *
+ * c Resume at current address SNN ( signal NN)
+ * cAA..AA Continue at address AA..AA SNN
+ *
+ * s Step one instruction SNN
+ * sAA..AA Step one instruction from AA..AA SNN
+ *
+ * k kill
+ *
+ * ? What was the last sigval ? SNN (signal NN)
+ *
+ * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
+ * baud rate
+ *
+ * All commands and responses are sent with a packet which includes a
+ * checksum. A packet consists of
+ *
+ * $<packet info>#<checksum>.
+ *
+ * where
+ * <packet info> :: <characters representing the command or response>
+ * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
+ *
+ * When a packet is received, it is first acknowledged with either '+' or '-'.
+ * '+' indicates a successful transfer. '-' indicates a failed transfer.
+ *
+ * Example:
+ *
+ * Host: Reply:
+ * $m0,10#2a +$00010203040506070809101112131415#42
+ *
+ *
+ * ==============
+ * MORE EXAMPLES:
+ * ==============
+ *
+ * For reference -- the following are the steps that one
+ * company took (RidgeRun Inc) to get remote gdb debugging
+ * going. In this scenario the host machine was a PC and the
+ * target platform was a Galileo EVB64120A MIPS evaluation
+ * board.
+ *
+ * Step 1:
+ * First download gdb-5.0.tar.gz from the internet.
+ * and then build/install the package.
+ *
+ * Example:
+ * $ tar zxf gdb-5.0.tar.gz
+ * $ cd gdb-5.0
+ * $ ./configure --target=am33_2.0-linux-gnu
+ * $ make
+ * $ install
+ * am33_2.0-linux-gnu-gdb
+ *
+ * Step 2:
+ * Configure linux for remote debugging and build it.
+ *
+ * Example:
+ * $ cd ~/linux
+ * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
+ * $ make dep; make vmlinux
+ *
+ * Step 3:
+ * Download the kernel to the remote target and start
+ * the kernel running. It will promptly halt and wait
+ * for the host gdb session to connect. It does this
+ * since the "Kernel Hacking" option has defined
+ * CONFIG_REMOTE_DEBUG which in turn enables your calls
+ * to:
+ * set_debug_traps();
+ * breakpoint();
+ *
+ * Step 4:
+ * Start the gdb session on the host.
+ *
+ * Example:
+ * $ am33_2.0-linux-gnu-gdb vmlinux
+ * (gdb) set remotebaud 115200
+ * (gdb) target remote /dev/ttyS1
+ * ...at this point you are connected to
+ * the remote target and can use gdb
+ * in the normal fasion. Setting
+ * breakpoints, single stepping,
+ * printing variables, etc.
+ *
+ */
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/bug.h>
+
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/gdb-stub.h>
+#include <asm/exceptions.h>
+#include <asm/debugger.h>
+#include <asm/serial-regs.h>
+#include <asm/busctl-regs.h>
+#include <unit/leds.h>
+#include <unit/serial.h>
+
+/* define to use F7F7 rather than FF which is subverted by JTAG debugger */
+#undef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+
+/*
+ * BUFMAX defines the maximum number of characters in inbound/outbound buffers
+ * at least NUMREGBYTES*2 are needed for register packets
+ */
+#define BUFMAX 2048
+
+static const char gdbstub_banner[] =
+ "Linux/MN10300 GDB Stub (c) RedHat 2007\n";
+
+u8 gdbstub_rx_buffer[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));
+u32 gdbstub_rx_inp;
+u32 gdbstub_rx_outp;
+u8 gdbstub_busy;
+u8 gdbstub_rx_overflow;
+u8 gdbstub_rx_unget;
+
+static u8 gdbstub_flush_caches;
+static char input_buffer[BUFMAX];
+static char output_buffer[BUFMAX];
+static char trans_buffer[BUFMAX];
+
+struct gdbstub_bkpt {
+ u8 *addr; /* address of breakpoint */
+ u8 len; /* size of breakpoint */
+ u8 origbytes[7]; /* original bytes */
+};
+
+static struct gdbstub_bkpt gdbstub_bkpts[256];
+
+/*
+ * local prototypes
+ */
+static void getpacket(char *buffer);
+static int putpacket(char *buffer);
+static int computeSignal(enum exception_code excep);
+static int hex(unsigned char ch);
+static int hexToInt(char **ptr, int *intValue);
+static unsigned char *mem2hex(const void *mem, char *buf, int count,
+ int may_fault);
+static const char *hex2mem(const char *buf, void *_mem, int count,
+ int may_fault);
+
+/*
+ * Convert ch from a hex digit to an int
+ */
+static int hex(unsigned char ch)
+{
+ if (ch >= 'a' && ch <= 'f')
+ return ch - 'a' + 10;
+ if (ch >= '0' && ch <= '9')
+ return ch - '0';
+ if (ch >= 'A' && ch <= 'F')
+ return ch - 'A' + 10;
+ return -1;
+}
+
+#ifdef CONFIG_GDBSTUB_DEBUGGING
+
+void debug_to_serial(const char *p, int n)
+{
+ __debug_to_serial(p, n);
+ /* gdbstub_console_write(NULL, p, n); */
+}
+
+void gdbstub_printk(const char *fmt, ...)
+{
+ va_list args;
+ int len;
+
+ /* Emit the output into the temporary buffer */
+ va_start(args, fmt);
+ len = vsnprintf(trans_buffer, sizeof(trans_buffer), fmt, args);
+ va_end(args);
+ debug_to_serial(trans_buffer, len);
+}
+
+#endif
+
+static inline char *gdbstub_strcpy(char *dst, const char *src)
+{
+ int loop = 0;
+ while ((dst[loop] = src[loop]))
+ loop++;
+ return dst;
+}
+
+/*
+ * scan for the sequence $<data>#<checksum>
+ */
+static void getpacket(char *buffer)
+{
+ unsigned char checksum;
+ unsigned char xmitcsum;
+ unsigned char ch;
+ int count, i, ret, error;
+
+ for (;;) {
+ /*
+ * wait around for the start character,
+ * ignore all other characters
+ */
+ do {
+ gdbstub_io_rx_char(&ch, 0);
+ } while (ch != '$');
+
+ checksum = 0;
+ xmitcsum = -1;
+ count = 0;
+ error = 0;
+
+ /*
+ * now, read until a # or end of buffer is found
+ */
+ while (count < BUFMAX) {
+ ret = gdbstub_io_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+
+ if (ch == '#')
+ break;
+ checksum += ch;
+ buffer[count] = ch;
+ count++;
+ }
+
+ if (error == -EIO) {
+ gdbstub_proto("### GDB Rx Error - Skipping packet"
+ " ###\n");
+ gdbstub_proto("### GDB Tx NAK\n");
+ gdbstub_io_tx_char('-');
+ continue;
+ }
+
+ if (count >= BUFMAX || error)
+ continue;
+
+ buffer[count] = 0;
+
+ /* read the checksum */
+ ret = gdbstub_io_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+ xmitcsum = hex(ch) << 4;
+
+ ret = gdbstub_io_rx_char(&ch, 0);
+ if (ret < 0)
+ error = ret;
+ xmitcsum |= hex(ch);
+
+ if (error) {
+ if (error == -EIO)
+ gdbstub_io("### GDB Rx Error -"
+ " Skipping packet\n");
+ gdbstub_io("### GDB Tx NAK\n");
+ gdbstub_io_tx_char('-');
+ continue;
+ }
+
+ /* check the checksum */
+ if (checksum != xmitcsum) {
+ gdbstub_io("### GDB Tx NAK\n");
+ gdbstub_io_tx_char('-'); /* failed checksum */
+ continue;
+ }
+
+ gdbstub_proto("### GDB Rx '$%s#%02x' ###\n", buffer, checksum);
+ gdbstub_io("### GDB Tx ACK\n");
+ gdbstub_io_tx_char('+'); /* successful transfer */
+
+ /*
+ * if a sequence char is present,
+ * reply the sequence ID
+ */
+ if (buffer[2] == ':') {
+ gdbstub_io_tx_char(buffer[0]);
+ gdbstub_io_tx_char(buffer[1]);
+
+ /*
+ * remove sequence chars from buffer
+ */
+ count = 0;
+ while (buffer[count])
+ count++;
+ for (i = 3; i <= count; i++)
+ buffer[i - 3] = buffer[i];
+ }
+
+ break;
+ }
+}
+
+/*
+ * send the packet in buffer.
+ * - return 0 if successfully ACK'd
+ * - return 1 if abandoned due to new incoming packet
+ */
+static int putpacket(char *buffer)
+{
+ unsigned char checksum;
+ unsigned char ch;
+ int count;
+
+ /*
+ * $<packet info>#<checksum>.
+ */
+ gdbstub_proto("### GDB Tx $'%s'#?? ###\n", buffer);
+
+ do {
+ gdbstub_io_tx_char('$');
+ checksum = 0;
+ count = 0;
+
+ while ((ch = buffer[count]) != 0) {
+ gdbstub_io_tx_char(ch);
+ checksum += ch;
+ count += 1;
+ }
+
+ gdbstub_io_tx_char('#');
+ gdbstub_io_tx_char(hex_asc_hi(checksum));
+ gdbstub_io_tx_char(hex_asc_lo(checksum));
+
+ } while (gdbstub_io_rx_char(&ch, 0),
+ ch == '-' && (gdbstub_io("### GDB Rx NAK\n"), 0),
+ ch != '-' && ch != '+' &&
+ (gdbstub_io("### GDB Rx ??? %02x\n", ch), 0),
+ ch != '+' && ch != '$');
+
+ if (ch == '+') {
+ gdbstub_io("### GDB Rx ACK\n");
+ return 0;
+ }
+
+ gdbstub_io("### GDB Tx Abandoned\n");
+ gdbstub_rx_unget = ch;
+ return 1;
+}
+
+/*
+ * While we find nice hex chars, build an int.
+ * Return number of chars processed.
+ */
+static int hexToInt(char **ptr, int *intValue)
+{
+ int numChars = 0;
+ int hexValue;
+
+ *intValue = 0;
+
+ while (**ptr) {
+ hexValue = hex(**ptr);
+ if (hexValue < 0)
+ break;
+
+ *intValue = (*intValue << 4) | hexValue;
+ numChars++;
+
+ (*ptr)++;
+ }
+
+ return (numChars);
+}
+
+#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
+/*
+ * We single-step by setting breakpoints. When an exception
+ * is handled, we need to restore the instructions hoisted
+ * when the breakpoints were set.
+ *
+ * This is where we save the original instructions.
+ */
+static struct gdb_bp_save {
+ u8 *addr;
+ u8 opcode[2];
+} step_bp[2];
+
+static const unsigned char gdbstub_insn_sizes[256] =
+{
+ /* 1 2 3 4 5 6 7 8 9 a b c d e f */
+ 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
+ 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
+ 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
+ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
+ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
+ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
+ 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
+ 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
+};
+
+static int __gdbstub_mark_bp(u8 *addr, int ix)
+{
+ /* vmalloc area */
+ if (((u8 *) VMALLOC_START <= addr) && (addr < (u8 *) VMALLOC_END))
+ goto okay;
+ /* SRAM, SDRAM */
+ if (((u8 *) 0x80000000UL <= addr) && (addr < (u8 *) 0xa0000000UL))
+ goto okay;
+ return 0;
+
+okay:
+ if (gdbstub_read_byte(addr + 0, &step_bp[ix].opcode[0]) < 0 ||
+ gdbstub_read_byte(addr + 1, &step_bp[ix].opcode[1]) < 0)
+ return 0;
+
+ step_bp[ix].addr = addr;
+ return 1;
+}
+
+static inline void __gdbstub_restore_bp(void)
+{
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ if (step_bp[0].addr) {
+ gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
+ gdbstub_write_byte(step_bp[0].opcode[1], step_bp[0].addr + 1);
+ }
+ if (step_bp[1].addr) {
+ gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
+ gdbstub_write_byte(step_bp[1].opcode[1], step_bp[1].addr + 1);
+ }
+#else
+ if (step_bp[0].addr)
+ gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
+ if (step_bp[1].addr)
+ gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
+#endif
+
+ gdbstub_flush_caches = 1;
+
+ step_bp[0].addr = NULL;
+ step_bp[0].opcode[0] = 0;
+ step_bp[0].opcode[1] = 0;
+ step_bp[1].addr = NULL;
+ step_bp[1].opcode[0] = 0;
+ step_bp[1].opcode[1] = 0;
+}
+
+/*
+ * emulate single stepping by means of breakpoint instructions
+ */
+static int gdbstub_single_step(struct pt_regs *regs)
+{
+ unsigned size;
+ uint32_t x;
+ uint8_t cur, *pc, *sp;
+
+ step_bp[0].addr = NULL;
+ step_bp[0].opcode[0] = 0;
+ step_bp[0].opcode[1] = 0;
+ step_bp[1].addr = NULL;
+ step_bp[1].opcode[0] = 0;
+ step_bp[1].opcode[1] = 0;
+ x = 0;
+
+ pc = (u8 *) regs->pc;
+ sp = (u8 *) (regs + 1);
+ if (gdbstub_read_byte(pc, &cur) < 0)
+ return -EFAULT;
+
+ gdbstub_bkpt("Single Step from %p { %02x }\n", pc, cur);
+
+ gdbstub_flush_caches = 1;
+
+ size = gdbstub_insn_sizes[cur];
+ if (size > 0) {
+ if (!__gdbstub_mark_bp(pc + size, 0))
+ goto fault;
+ } else {
+ switch (cur) {
+ /* Bxx (d8,PC) */
+ case 0xc0 ... 0xca:
+ if (gdbstub_read_byte(pc + 1, (u8 *) &x) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(pc + 2, 0))
+ goto fault;
+ if ((x < 0 || x > 2) &&
+ !__gdbstub_mark_bp(pc + (s8) x, 1))
+ goto fault;
+ break;
+
+ /* LXX (d8,PC) */
+ case 0xd0 ... 0xda:
+ if (!__gdbstub_mark_bp(pc + 1, 0))
+ goto fault;
+ if (regs->pc != regs->lar &&
+ !__gdbstub_mark_bp((u8 *) regs->lar, 1))
+ goto fault;
+ break;
+
+ /* SETLB - loads the next for bytes into the LIR
+ * register */
+ case 0xdb:
+ if (!__gdbstub_mark_bp(pc + 1, 0))
+ goto fault;
+ break;
+
+ /* JMP (d16,PC) or CALL (d16,PC) */
+ case 0xcc:
+ case 0xcd:
+ if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(pc + (s16) x, 0))
+ goto fault;
+ break;
+
+ /* JMP (d32,PC) or CALL (d32,PC) */
+ case 0xdc:
+ case 0xdd:
+ if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0 ||
+ gdbstub_read_byte(pc + 3, ((u8 *) &x) + 2) < 0 ||
+ gdbstub_read_byte(pc + 4, ((u8 *) &x) + 3) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(pc + (s32) x, 0))
+ goto fault;
+ break;
+
+ /* RETF */
+ case 0xde:
+ if (!__gdbstub_mark_bp((u8 *) regs->mdr, 0))
+ goto fault;
+ break;
+
+ /* RET */
+ case 0xdf:
+ if (gdbstub_read_byte(pc + 2, (u8 *) &x) < 0)
+ goto fault;
+ sp += (s8)x;
+ if (gdbstub_read_byte(sp + 0, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(sp + 1, ((u8 *) &x) + 1) < 0 ||
+ gdbstub_read_byte(sp + 2, ((u8 *) &x) + 2) < 0 ||
+ gdbstub_read_byte(sp + 3, ((u8 *) &x) + 3) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp((u8 *) x, 0))
+ goto fault;
+ break;
+
+ case 0xf0:
+ if (gdbstub_read_byte(pc + 1, &cur) < 0)
+ goto fault;
+
+ if (cur >= 0xf0 && cur <= 0xf7) {
+ /* JMP (An) / CALLS (An) */
+ switch (cur & 3) {
+ case 0: x = regs->a0; break;
+ case 1: x = regs->a1; break;
+ case 2: x = regs->a2; break;
+ case 3: x = regs->a3; break;
+ }
+ if (!__gdbstub_mark_bp((u8 *) x, 0))
+ goto fault;
+ } else if (cur == 0xfc) {
+ /* RETS */
+ if (gdbstub_read_byte(
+ sp + 0, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(
+ sp + 1, ((u8 *) &x) + 1) < 0 ||
+ gdbstub_read_byte(
+ sp + 2, ((u8 *) &x) + 2) < 0 ||
+ gdbstub_read_byte(
+ sp + 3, ((u8 *) &x) + 3) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp((u8 *) x, 0))
+ goto fault;
+ } else if (cur == 0xfd) {
+ /* RTI */
+ if (gdbstub_read_byte(
+ sp + 4, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(
+ sp + 5, ((u8 *) &x) + 1) < 0 ||
+ gdbstub_read_byte(
+ sp + 6, ((u8 *) &x) + 2) < 0 ||
+ gdbstub_read_byte(
+ sp + 7, ((u8 *) &x) + 3) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp((u8 *) x, 0))
+ goto fault;
+ } else {
+ if (!__gdbstub_mark_bp(pc + 2, 0))
+ goto fault;
+ }
+
+ break;
+
+ /* potential 3-byte conditional branches */
+ case 0xf8:
+ if (gdbstub_read_byte(pc + 1, &cur) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(pc + 3, 0))
+ goto fault;
+
+ if (cur >= 0xe8 && cur <= 0xeb) {
+ if (gdbstub_read_byte(
+ pc + 2, ((u8 *) &x) + 0) < 0)
+ goto fault;
+ if ((x < 0 || x > 3) &&
+ !__gdbstub_mark_bp(pc + (s8) x, 1))
+ goto fault;
+ }
+ break;
+
+ case 0xfa:
+ if (gdbstub_read_byte(pc + 1, &cur) < 0)
+ goto fault;
+
+ if (cur == 0xff) {
+ /* CALLS (d16,PC) */
+ if (gdbstub_read_byte(
+ pc + 2, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(
+ pc + 3, ((u8 *) &x) + 1) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(pc + (s16) x, 0))
+ goto fault;
+ } else {
+ if (!__gdbstub_mark_bp(pc + 4, 0))
+ goto fault;
+ }
+ break;
+
+ case 0xfc:
+ if (gdbstub_read_byte(pc + 1, &cur) < 0)
+ goto fault;
+ if (cur == 0xff) {
+ /* CALLS (d32,PC) */
+ if (gdbstub_read_byte(
+ pc + 2, ((u8 *) &x) + 0) < 0 ||
+ gdbstub_read_byte(
+ pc + 3, ((u8 *) &x) + 1) < 0 ||
+ gdbstub_read_byte(
+ pc + 4, ((u8 *) &x) + 2) < 0 ||
+ gdbstub_read_byte(
+ pc + 5, ((u8 *) &x) + 3) < 0)
+ goto fault;
+ if (!__gdbstub_mark_bp(
+ pc + (s32) x, 0))
+ goto fault;
+ } else {
+ if (!__gdbstub_mark_bp(
+ pc + 6, 0))
+ goto fault;
+ }
+ break;
+
+ }
+ }
+
+ gdbstub_bkpt("Step: %02x at %p; %02x at %p\n",
+ step_bp[0].opcode[0], step_bp[0].addr,
+ step_bp[1].opcode[0], step_bp[1].addr);
+
+ if (step_bp[0].addr) {
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ if (gdbstub_write_byte(0xF7, step_bp[0].addr + 0) < 0 ||
+ gdbstub_write_byte(0xF7, step_bp[0].addr + 1) < 0)
+ goto fault;
+#else
+ if (gdbstub_write_byte(0xFF, step_bp[0].addr + 0) < 0)
+ goto fault;
+#endif
+ }
+
+ if (step_bp[1].addr) {
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ if (gdbstub_write_byte(0xF7, step_bp[1].addr + 0) < 0 ||
+ gdbstub_write_byte(0xF7, step_bp[1].addr + 1) < 0)
+ goto fault;
+#else
+ if (gdbstub_write_byte(0xFF, step_bp[1].addr + 0) < 0)
+ goto fault;
+#endif
+ }
+
+ return 0;
+
+ fault:
+ /* uh-oh - silly address alert, try and restore things */
+ __gdbstub_restore_bp();
+ return -EFAULT;
+}
+#endif /* CONFIG_GDBSTUB_ALLOW_SINGLE_STEP */
+
+#ifdef CONFIG_GDBSTUB_CONSOLE
+
+void gdbstub_console_write(struct console *con, const char *p, unsigned n)
+{
+ static const char gdbstub_cr[] = { 0x0d };
+ char outbuf[26];
+ int qty;
+ u8 busy;
+
+ busy = gdbstub_busy;
+ gdbstub_busy = 1;
+
+ outbuf[0] = 'O';
+
+ while (n > 0) {
+ qty = 1;
+
+ while (n > 0 && qty < 20) {
+ mem2hex(p, outbuf + qty, 2, 0);
+ qty += 2;
+ if (*p == 0x0a) {
+ mem2hex(gdbstub_cr, outbuf + qty, 2, 0);
+ qty += 2;
+ }
+ p++;
+ n--;
+ }
+
+ outbuf[qty] = 0;
+ putpacket(outbuf);
+ }
+
+ gdbstub_busy = busy;
+}
+
+static kdev_t gdbstub_console_dev(struct console *con)
+{
+ return MKDEV(1, 3); /* /dev/null */
+}
+
+static struct console gdbstub_console = {
+ .name = "gdb",
+ .write = gdbstub_console_write,
+ .device = gdbstub_console_dev,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+};
+
+#endif
+
+/*
+ * Convert the memory pointed to by mem into hex, placing result in buf.
+ * - if successful, return a pointer to the last char put in buf (NUL)
+ * - in case of mem fault, return NULL
+ * may_fault is non-zero if we are reading from arbitrary memory, but is
+ * currently not used.
+ */
+static
+unsigned char *mem2hex(const void *_mem, char *buf, int count, int may_fault)
+{
+ const u8 *mem = _mem;
+ u8 ch[4];
+
+ if ((u32) mem & 1 && count >= 1) {
+ if (gdbstub_read_byte(mem, ch) != 0)
+ return 0;
+ buf = hex_byte_pack(buf, ch[0]);
+ mem++;
+ count--;
+ }
+
+ if ((u32) mem & 3 && count >= 2) {
+ if (gdbstub_read_word(mem, ch) != 0)
+ return 0;
+ buf = hex_byte_pack(buf, ch[0]);
+ buf = hex_byte_pack(buf, ch[1]);
+ mem += 2;
+ count -= 2;
+ }
+
+ while (count >= 4) {
+ if (gdbstub_read_dword(mem, ch) != 0)
+ return 0;
+ buf = hex_byte_pack(buf, ch[0]);
+ buf = hex_byte_pack(buf, ch[1]);
+ buf = hex_byte_pack(buf, ch[2]);
+ buf = hex_byte_pack(buf, ch[3]);
+ mem += 4;
+ count -= 4;
+ }
+
+ if (count >= 2) {
+ if (gdbstub_read_word(mem, ch) != 0)
+ return 0;
+ buf = hex_byte_pack(buf, ch[0]);
+ buf = hex_byte_pack(buf, ch[1]);
+ mem += 2;
+ count -= 2;
+ }
+
+ if (count >= 1) {
+ if (gdbstub_read_byte(mem, ch) != 0)
+ return 0;
+ buf = hex_byte_pack(buf, ch[0]);
+ }
+
+ *buf = 0;
+ return buf;
+}
+
+/*
+ * convert the hex array pointed to by buf into binary to be placed in mem
+ * return a pointer to the character AFTER the last byte written
+ * may_fault is non-zero if we are reading from arbitrary memory, but is
+ * currently not used.
+ */
+static
+const char *hex2mem(const char *buf, void *_mem, int count, int may_fault)
+{
+ u8 *mem = _mem;
+ union {
+ u32 val;
+ u8 b[4];
+ } ch;
+
+ if ((u32) mem & 1 && count >= 1) {
+ ch.b[0] = hex(*buf++) << 4;
+ ch.b[0] |= hex(*buf++);
+ if (gdbstub_write_byte(ch.val, mem) != 0)
+ return 0;
+ mem++;
+ count--;
+ }
+
+ if ((u32) mem & 3 && count >= 2) {
+ ch.b[0] = hex(*buf++) << 4;
+ ch.b[0] |= hex(*buf++);
+ ch.b[1] = hex(*buf++) << 4;
+ ch.b[1] |= hex(*buf++);
+ if (gdbstub_write_word(ch.val, mem) != 0)
+ return 0;
+ mem += 2;
+ count -= 2;
+ }
+
+ while (count >= 4) {
+ ch.b[0] = hex(*buf++) << 4;
+ ch.b[0] |= hex(*buf++);
+ ch.b[1] = hex(*buf++) << 4;
+ ch.b[1] |= hex(*buf++);
+ ch.b[2] = hex(*buf++) << 4;
+ ch.b[2] |= hex(*buf++);
+ ch.b[3] = hex(*buf++) << 4;
+ ch.b[3] |= hex(*buf++);
+ if (gdbstub_write_dword(ch.val, mem) != 0)
+ return 0;
+ mem += 4;
+ count -= 4;
+ }
+
+ if (count >= 2) {
+ ch.b[0] = hex(*buf++) << 4;
+ ch.b[0] |= hex(*buf++);
+ ch.b[1] = hex(*buf++) << 4;
+ ch.b[1] |= hex(*buf++);
+ if (gdbstub_write_word(ch.val, mem) != 0)
+ return 0;
+ mem += 2;
+ count -= 2;
+ }
+
+ if (count >= 1) {
+ ch.b[0] = hex(*buf++) << 4;
+ ch.b[0] |= hex(*buf++);
+ if (gdbstub_write_byte(ch.val, mem) != 0)
+ return 0;
+ }
+
+ return buf;
+}
+
+/*
+ * This table contains the mapping between MN10300 exception codes, and
+ * signals, which are primarily what GDB understands. It also indicates
+ * which hardware traps we need to commandeer when initializing the stub.
+ */
+static const struct excep_to_sig_map {
+ enum exception_code excep; /* MN10300 exception code */
+ unsigned char signo; /* Signal that we map this into */
+} excep_to_sig_map[] = {
+ { EXCEP_ITLBMISS, SIGSEGV },
+ { EXCEP_DTLBMISS, SIGSEGV },
+ { EXCEP_TRAP, SIGTRAP },
+ { EXCEP_ISTEP, SIGTRAP },
+ { EXCEP_IBREAK, SIGTRAP },
+ { EXCEP_OBREAK, SIGTRAP },
+ { EXCEP_UNIMPINS, SIGILL },
+ { EXCEP_UNIMPEXINS, SIGILL },
+ { EXCEP_MEMERR, SIGSEGV },
+ { EXCEP_MISALIGN, SIGSEGV },
+ { EXCEP_BUSERROR, SIGBUS },
+ { EXCEP_ILLINSACC, SIGSEGV },
+ { EXCEP_ILLDATACC, SIGSEGV },
+ { EXCEP_IOINSACC, SIGSEGV },
+ { EXCEP_PRIVINSACC, SIGSEGV },
+ { EXCEP_PRIVDATACC, SIGSEGV },
+ { EXCEP_FPU_DISABLED, SIGFPE },
+ { EXCEP_FPU_UNIMPINS, SIGFPE },
+ { EXCEP_FPU_OPERATION, SIGFPE },
+ { EXCEP_WDT, SIGALRM },
+ { EXCEP_NMI, SIGQUIT },
+ { EXCEP_IRQ_LEVEL0, SIGINT },
+ { EXCEP_IRQ_LEVEL1, SIGINT },
+ { EXCEP_IRQ_LEVEL2, SIGINT },
+ { EXCEP_IRQ_LEVEL3, SIGINT },
+ { EXCEP_IRQ_LEVEL4, SIGINT },
+ { EXCEP_IRQ_LEVEL5, SIGINT },
+ { EXCEP_IRQ_LEVEL6, SIGINT },
+ { 0, 0}
+};
+
+/*
+ * convert the MN10300 exception code into a UNIX signal number
+ */
+static int computeSignal(enum exception_code excep)
+{
+ const struct excep_to_sig_map *map;
+
+ for (map = excep_to_sig_map; map->signo; map++)
+ if (map->excep == excep)
+ return map->signo;
+
+ return SIGHUP; /* default for things we don't know about */
+}
+
+static u32 gdbstub_fpcr, gdbstub_fpufs_array[32];
+
+/*
+ *
+ */
+static void gdbstub_store_fpu(void)
+{
+#ifdef CONFIG_FPU
+
+ asm volatile(
+ "or %2,epsw\n"
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ "nop\n"
+ "nop\n"
+#endif
+ "mov %1, a1\n"
+ "fmov fs0, (a1+)\n"
+ "fmov fs1, (a1+)\n"
+ "fmov fs2, (a1+)\n"
+ "fmov fs3, (a1+)\n"
+ "fmov fs4, (a1+)\n"
+ "fmov fs5, (a1+)\n"
+ "fmov fs6, (a1+)\n"
+ "fmov fs7, (a1+)\n"
+ "fmov fs8, (a1+)\n"
+ "fmov fs9, (a1+)\n"
+ "fmov fs10, (a1+)\n"
+ "fmov fs11, (a1+)\n"
+ "fmov fs12, (a1+)\n"
+ "fmov fs13, (a1+)\n"
+ "fmov fs14, (a1+)\n"
+ "fmov fs15, (a1+)\n"
+ "fmov fs16, (a1+)\n"
+ "fmov fs17, (a1+)\n"
+ "fmov fs18, (a1+)\n"
+ "fmov fs19, (a1+)\n"
+ "fmov fs20, (a1+)\n"
+ "fmov fs21, (a1+)\n"
+ "fmov fs22, (a1+)\n"
+ "fmov fs23, (a1+)\n"
+ "fmov fs24, (a1+)\n"
+ "fmov fs25, (a1+)\n"
+ "fmov fs26, (a1+)\n"
+ "fmov fs27, (a1+)\n"
+ "fmov fs28, (a1+)\n"
+ "fmov fs29, (a1+)\n"
+ "fmov fs30, (a1+)\n"
+ "fmov fs31, (a1+)\n"
+ "fmov fpcr, %0\n"
+ : "=d"(gdbstub_fpcr)
+ : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE)
+ : "a1"
+ );
+#endif
+}
+
+/*
+ *
+ */
+static void gdbstub_load_fpu(void)
+{
+#ifdef CONFIG_FPU
+
+ asm volatile(
+ "or %1,epsw\n"
+#ifdef CONFIG_MN10300_PROC_MN103E010
+ "nop\n"
+ "nop\n"
+#endif
+ "mov %0, a1\n"
+ "fmov (a1+), fs0\n"
+ "fmov (a1+), fs1\n"
+ "fmov (a1+), fs2\n"
+ "fmov (a1+), fs3\n"
+ "fmov (a1+), fs4\n"
+ "fmov (a1+), fs5\n"
+ "fmov (a1+), fs6\n"
+ "fmov (a1+), fs7\n"
+ "fmov (a1+), fs8\n"
+ "fmov (a1+), fs9\n"
+ "fmov (a1+), fs10\n"
+ "fmov (a1+), fs11\n"
+ "fmov (a1+), fs12\n"
+ "fmov (a1+), fs13\n"
+ "fmov (a1+), fs14\n"
+ "fmov (a1+), fs15\n"
+ "fmov (a1+), fs16\n"
+ "fmov (a1+), fs17\n"
+ "fmov (a1+), fs18\n"
+ "fmov (a1+), fs19\n"
+ "fmov (a1+), fs20\n"
+ "fmov (a1+), fs21\n"
+ "fmov (a1+), fs22\n"
+ "fmov (a1+), fs23\n"
+ "fmov (a1+), fs24\n"
+ "fmov (a1+), fs25\n"
+ "fmov (a1+), fs26\n"
+ "fmov (a1+), fs27\n"
+ "fmov (a1+), fs28\n"
+ "fmov (a1+), fs29\n"
+ "fmov (a1+), fs30\n"
+ "fmov (a1+), fs31\n"
+ "fmov %2, fpcr\n"
+ :
+ : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE), "d"(gdbstub_fpcr)
+ : "a1"
+ );
+#endif
+}
+
+/*
+ * set a software breakpoint
+ */
+int gdbstub_set_breakpoint(u8 *addr, int len)
+{
+ int bkpt, loop, xloop;
+
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ len = (len + 1) & ~1;
+#endif
+
+ gdbstub_bkpt("setbkpt(%p,%d)\n", addr, len);
+
+ for (bkpt = 255; bkpt >= 0; bkpt--)
+ if (!gdbstub_bkpts[bkpt].addr)
+ break;
+ if (bkpt < 0)
+ return -ENOSPC;
+
+ for (loop = 0; loop < len; loop++)
+ if (gdbstub_read_byte(&addr[loop],
+ &gdbstub_bkpts[bkpt].origbytes[loop]
+ ) < 0)
+ return -EFAULT;
+
+ gdbstub_flush_caches = 1;
+
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ for (loop = 0; loop < len; loop++)
+ if (gdbstub_write_byte(0xF7, &addr[loop]) < 0)
+ goto restore;
+#else
+ for (loop = 0; loop < len; loop++)
+ if (gdbstub_write_byte(0xFF, &addr[loop]) < 0)
+ goto restore;
+#endif
+
+ gdbstub_bkpts[bkpt].addr = addr;
+ gdbstub_bkpts[bkpt].len = len;
+
+ gdbstub_bkpt("Set BKPT[%02x]: %p-%p {%02x%02x%02x%02x%02x%02x%02x}\n",
+ bkpt,
+ gdbstub_bkpts[bkpt].addr,
+ gdbstub_bkpts[bkpt].addr + gdbstub_bkpts[bkpt].len - 1,
+ gdbstub_bkpts[bkpt].origbytes[0],
+ gdbstub_bkpts[bkpt].origbytes[1],
+ gdbstub_bkpts[bkpt].origbytes[2],
+ gdbstub_bkpts[bkpt].origbytes[3],
+ gdbstub_bkpts[bkpt].origbytes[4],
+ gdbstub_bkpts[bkpt].origbytes[5],
+ gdbstub_bkpts[bkpt].origbytes[6]
+ );
+
+ return 0;
+
+restore:
+ for (xloop = 0; xloop < loop; xloop++)
+ gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[xloop],
+ addr + xloop);
+ return -EFAULT;
+}
+
+/*
+ * clear a software breakpoint
+ */
+int gdbstub_clear_breakpoint(u8 *addr, int len)
+{
+ int bkpt, loop;
+
+#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
+ len = (len + 1) & ~1;
+#endif
+
+ gdbstub_bkpt("clearbkpt(%p,%d)\n", addr, len);
+
+ for (bkpt = 255; bkpt >= 0; bkpt--)
+ if (gdbstub_bkpts[bkpt].addr == addr &&
+ gdbstub_bkpts[bkpt].len == len)
+ break;
+ if (bkpt < 0)
+ return -ENOENT;
+
+ gdbstub_bkpts[bkpt].addr = NULL;
+
+ gdbstub_flush_caches = 1;
+
+ for (loop = 0; loop < len; loop++)
+ if (gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[loop],
+ addr + loop) < 0)
+ return -EFAULT;
+
+ return 0;
+}
+
+/*
+ * This function does all command processing for interfacing to gdb
+ * - returns 0 if the exception should be skipped, -ERROR otherwise.
+ */
+static int gdbstub(struct pt_regs *regs, enum exception_code excep)
+{
+ unsigned long *stack;
+ unsigned long epsw, mdr;
+ uint32_t zero, ssp;
+ uint8_t broke;
+ char *ptr;
+ int sigval;
+ int addr;
+ int length;
+ int loop;
+
+ if (excep == EXCEP_FPU_DISABLED)
+ return -ENOTSUPP;
+
+ gdbstub_flush_caches = 0;
+
+ mn10300_set_gdbleds(1);
+
+ asm volatile("mov mdr,%0" : "=d"(mdr));
+ local_save_flags(epsw);
+ arch_local_change_intr_mask_level(
+ NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
+
+ gdbstub_store_fpu();
+
+#ifdef CONFIG_GDBSTUB_IMMEDIATE
+ /* skip the initial pause loop */
+ if (regs->pc == (unsigned long) __gdbstub_pause)
+ regs->pc = (unsigned long) start_kernel;
+#endif
+
+ /* if we were single stepping, restore the opcodes hoisted for the
+ * breakpoint[s] */
+ broke = 0;
+#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
+ if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) ||
+ (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc))
+ broke = 1;
+
+ __gdbstub_restore_bp();
+#endif
+
+ if (gdbstub_rx_unget) {
+ sigval = SIGINT;
+ if (gdbstub_rx_unget != 3)
+ goto packet_waiting;
+ gdbstub_rx_unget = 0;
+ }
+
+ stack = (unsigned long *) regs->sp;
+ sigval = broke ? SIGTRAP : computeSignal(excep);
+
+ /* send information about a BUG() */
+ if (!user_mode(regs) && excep == EXCEP_SYSCALL15) {
+ const struct bug_entry *bug;
+
+ bug = find_bug(regs->pc);
+ if (bug)
+ goto found_bug;
+ length = snprintf(trans_buffer, sizeof(trans_buffer),
+ "BUG() at address %lx\n", regs->pc);
+ goto send_bug_pkt;
+
+ found_bug:
+ length = snprintf(trans_buffer, sizeof(trans_buffer),
+ "BUG() at address %lx (%s:%d)\n",
+ regs->pc, bug->file, bug->line);
+
+ send_bug_pkt:
+ ptr = output_buffer;
+ *ptr++ = 'O';
+ ptr = mem2hex(trans_buffer, ptr, length, 0);
+ *ptr = 0;
+ putpacket(output_buffer);
+
+ regs->pc -= 2;
+ sigval = SIGABRT;
+ } else if (regs->pc == (unsigned long) __gdbstub_bug_trap) {
+ regs->pc = regs->mdr;
+ sigval = SIGABRT;
+ }
+
+ /*
+ * send a message to the debugger's user saying what happened if it may
+ * not be clear cut (we can't map exceptions onto signals properly)
+ */
+ if (sigval != SIGINT && sigval != SIGTRAP && sigval != SIGILL) {
+ static const char title[] = "Excep ", tbcberr[] = "BCBERR ";
+ static const char crlf[] = "\r\n";
+ char hx;
+ u32 bcberr = BCBERR;
+
+ ptr = output_buffer;
+ *ptr++ = 'O';
+ ptr = mem2hex(title, ptr, sizeof(title) - 1, 0);
+
+ hx = hex_asc_hi(excep >> 8);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(excep >> 8);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_hi(excep);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(excep);
+ ptr = hex_byte_pack(ptr, hx);
+
+ ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
+ *ptr = 0;
+ putpacket(output_buffer); /* send it off... */
+
+ /* BCBERR */
+ ptr = output_buffer;
+ *ptr++ = 'O';
+ ptr = mem2hex(tbcberr, ptr, sizeof(tbcberr) - 1, 0);
+
+ hx = hex_asc_hi(bcberr >> 24);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(bcberr >> 24);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_hi(bcberr >> 16);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(bcberr >> 16);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_hi(bcberr >> 8);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(bcberr >> 8);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_hi(bcberr);
+ ptr = hex_byte_pack(ptr, hx);
+ hx = hex_asc_lo(bcberr);
+ ptr = hex_byte_pack(ptr, hx);
+
+ ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
+ *ptr = 0;
+ putpacket(output_buffer); /* send it off... */
+ }
+
+ /*
+ * tell the debugger that an exception has occurred
+ */
+ ptr = output_buffer;
+
+ /*
+ * Send trap type (converted to signal)
+ */
+ *ptr++ = 'T';
+ ptr = hex_byte_pack(ptr, sigval);
+
+ /*
+ * Send Error PC
+ */
+ ptr = hex_byte_pack(ptr, GDB_REGID_PC);
+ *ptr++ = ':';
+ ptr = mem2hex(&regs->pc, ptr, 4, 0);
+ *ptr++ = ';';
+
+ /*
+ * Send frame pointer
+ */
+ ptr = hex_byte_pack(ptr, GDB_REGID_FP);
+ *ptr++ = ':';
+ ptr = mem2hex(&regs->a3, ptr, 4, 0);
+ *ptr++ = ';';
+
+ /*
+ * Send stack pointer
+ */
+ ssp = (unsigned long) (regs + 1);
+ ptr = hex_byte_pack(ptr, GDB_REGID_SP);
+ *ptr++ = ':';
+ ptr = mem2hex(&ssp, ptr, 4, 0);
+ *ptr++ = ';';
+
+ *ptr++ = 0;
+ putpacket(output_buffer); /* send it off... */
+
+packet_waiting:
+ /*
+ * Wait for input from remote GDB
+ */
+ while (1) {
+ output_buffer[0] = 0;
+ getpacket(input_buffer);
+
+ switch (input_buffer[0]) {
+ /* request repeat of last signal number */
+ case '?':
+ output_buffer[0] = 'S';
+ output_buffer[1] = hex_asc_hi(sigval);
+ output_buffer[2] = hex_asc_lo(sigval);
+ output_buffer[3] = 0;
+ break;
+
+ case 'd':
+ /* toggle debug flag */
+ break;
+
+ /*
+ * Return the value of the CPU registers
+ */
+ case 'g':
+ zero = 0;
+ ssp = (u32) (regs + 1);
+ ptr = output_buffer;
+ ptr = mem2hex(&regs->d0, ptr, 4, 0);
+ ptr = mem2hex(&regs->d1, ptr, 4, 0);
+ ptr = mem2hex(&regs->d2, ptr, 4, 0);
+ ptr = mem2hex(&regs->d3, ptr, 4, 0);
+ ptr = mem2hex(&regs->a0, ptr, 4, 0);
+ ptr = mem2hex(&regs->a1, ptr, 4, 0);
+ ptr = mem2hex(&regs->a2, ptr, 4, 0);
+ ptr = mem2hex(&regs->a3, ptr, 4, 0);
+
+ ptr = mem2hex(&ssp, ptr, 4, 0); /* 8 */
+ ptr = mem2hex(&regs->pc, ptr, 4, 0);
+ ptr = mem2hex(&regs->mdr, ptr, 4, 0);
+ ptr = mem2hex(&regs->epsw, ptr, 4, 0);
+ ptr = mem2hex(&regs->lir, ptr, 4, 0);
+ ptr = mem2hex(&regs->lar, ptr, 4, 0);
+ ptr = mem2hex(&regs->mdrq, ptr, 4, 0);
+
+ ptr = mem2hex(&regs->e0, ptr, 4, 0); /* 15 */
+ ptr = mem2hex(&regs->e1, ptr, 4, 0);
+ ptr = mem2hex(&regs->e2, ptr, 4, 0);
+ ptr = mem2hex(&regs->e3, ptr, 4, 0);
+ ptr = mem2hex(&regs->e4, ptr, 4, 0);
+ ptr = mem2hex(&regs->e5, ptr, 4, 0);
+ ptr = mem2hex(&regs->e6, ptr, 4, 0);
+ ptr = mem2hex(&regs->e7, ptr, 4, 0);
+
+ ptr = mem2hex(&ssp, ptr, 4, 0);
+ ptr = mem2hex(&regs, ptr, 4, 0);
+ ptr = mem2hex(&regs->sp, ptr, 4, 0);
+ ptr = mem2hex(&regs->mcrh, ptr, 4, 0); /* 26 */
+ ptr = mem2hex(&regs->mcrl, ptr, 4, 0);
+ ptr = mem2hex(&regs->mcvf, ptr, 4, 0);
+
+ ptr = mem2hex(&gdbstub_fpcr, ptr, 4, 0); /* 29 - FPCR */
+ ptr = mem2hex(&zero, ptr, 4, 0);
+ ptr = mem2hex(&zero, ptr, 4, 0);
+ for (loop = 0; loop < 32; loop++)
+ ptr = mem2hex(&gdbstub_fpufs_array[loop],
+ ptr, 4, 0); /* 32 - FS0-31 */
+
+ break;
+
+ /*
+ * set the value of the CPU registers - return OK
+ */
+ case 'G':
+ {
+ const char *ptr;
+
+ ptr = &input_buffer[1];
+ ptr = hex2mem(ptr, &regs->d0, 4, 0);
+ ptr = hex2mem(ptr, &regs->d1, 4, 0);
+ ptr = hex2mem(ptr, &regs->d2, 4, 0);
+ ptr = hex2mem(ptr, &regs->d3, 4, 0);
+ ptr = hex2mem(ptr, &regs->a0, 4, 0);
+ ptr = hex2mem(ptr, &regs->a1, 4, 0);
+ ptr = hex2mem(ptr, &regs->a2, 4, 0);
+ ptr = hex2mem(ptr, &regs->a3, 4, 0);
+
+ ptr = hex2mem(ptr, &ssp, 4, 0); /* 8 */
+ ptr = hex2mem(ptr, &regs->pc, 4, 0);
+ ptr = hex2mem(ptr, &regs->mdr, 4, 0);
+ ptr = hex2mem(ptr, &regs->epsw, 4, 0);
+ ptr = hex2mem(ptr, &regs->lir, 4, 0);
+ ptr = hex2mem(ptr, &regs->lar, 4, 0);
+ ptr = hex2mem(ptr, &regs->mdrq, 4, 0);
+
+ ptr = hex2mem(ptr, &regs->e0, 4, 0); /* 15 */
+ ptr = hex2mem(ptr, &regs->e1, 4, 0);
+ ptr = hex2mem(ptr, &regs->e2, 4, 0);
+ ptr = hex2mem(ptr, &regs->e3, 4, 0);
+ ptr = hex2mem(ptr, &regs->e4, 4, 0);
+ ptr = hex2mem(ptr, &regs->e5, 4, 0);
+ ptr = hex2mem(ptr, &regs->e6, 4, 0);
+ ptr = hex2mem(ptr, &regs->e7, 4, 0);
+
+ ptr = hex2mem(ptr, &ssp, 4, 0);
+ ptr = hex2mem(ptr, &zero, 4, 0);
+ ptr = hex2mem(ptr, &regs->sp, 4, 0);
+ ptr = hex2mem(ptr, &regs->mcrh, 4, 0); /* 26 */
+ ptr = hex2mem(ptr, &regs->mcrl, 4, 0);
+ ptr = hex2mem(ptr, &regs->mcvf, 4, 0);
+
+ ptr = hex2mem(ptr, &zero, 4, 0); /* 29 - FPCR */
+ ptr = hex2mem(ptr, &zero, 4, 0);
+ ptr = hex2mem(ptr, &zero, 4, 0);
+ for (loop = 0; loop < 32; loop++) /* 32 - FS0-31 */
+ ptr = hex2mem(ptr, &zero, 4, 0);
+
+#if 0
+ /*
+ * See if the stack pointer has moved. If so, then copy
+ * the saved locals and ins to the new location.
+ */
+ unsigned long *newsp = (unsigned long *) registers[SP];
+ if (sp != newsp)
+ sp = memcpy(newsp, sp, 16 * 4);
+#endif
+
+ gdbstub_strcpy(output_buffer, "OK");
+ }
+ break;
+
+ /*
+ * mAA..AA,LLLL Read LLLL bytes at address AA..AA
+ */
+ case 'm':
+ ptr = &input_buffer[1];
+
+ if (hexToInt(&ptr, &addr) &&
+ *ptr++ == ',' &&
+ hexToInt(&ptr, &length)
+ ) {
+ if (mem2hex((char *) addr, output_buffer,
+ length, 1))
+ break;
+ gdbstub_strcpy(output_buffer, "E03");
+ } else {
+ gdbstub_strcpy(output_buffer, "E01");
+ }
+ break;
+
+ /*
+ * MAA..AA,LLLL: Write LLLL bytes at address AA.AA
+ * return OK
+ */
+ case 'M':
+ ptr = &input_buffer[1];
+
+ if (hexToInt(&ptr, &addr) &&
+ *ptr++ == ',' &&
+ hexToInt(&ptr, &length) &&
+ *ptr++ == ':'
+ ) {
+ if (hex2mem(ptr, (char *) addr, length, 1))
+ gdbstub_strcpy(output_buffer, "OK");
+ else
+ gdbstub_strcpy(output_buffer, "E03");
+
+ gdbstub_flush_caches = 1;
+ } else {
+ gdbstub_strcpy(output_buffer, "E02");
+ }
+ break;
+
+ /*
+ * cAA..AA Continue at address AA..AA(optional)
+ */
+ case 'c':
+ /* try to read optional parameter, pc unchanged if no
+ * parm */
+
+ ptr = &input_buffer[1];
+ if (hexToInt(&ptr, &addr))
+ regs->pc = addr;
+ goto done;
+
+ /*
+ * kill the program
+ */
+ case 'k' :
+ goto done; /* just continue */
+
+ /*
+ * Reset the whole machine (FIXME: system dependent)
+ */
+ case 'r':
+ break;
+
+ /*
+ * Step to next instruction
+ */
+ case 's':
+ /* Using the T flag doesn't seem to perform single
+ * stepping (it seems to wind up being caught by the
+ * JTAG unit), so we have to use breakpoints and
+ * continue instead.
+ */
+#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP
+ if (gdbstub_single_step(regs) < 0)
+ /* ignore any fault error for now */
+ gdbstub_printk("unable to set single-step"
+ " bp\n");
+ goto done;
+#else
+ gdbstub_strcpy(output_buffer, "E01");
+ break;
+#endif
+
+ /*
+ * Set baud rate (bBB)
+ */
+ case 'b':
+ do {
+ int baudrate;
+
+ ptr = &input_buffer[1];
+ if (!hexToInt(&ptr, &baudrate)) {
+ gdbstub_strcpy(output_buffer, "B01");
+ break;
+ }
+
+ if (baudrate) {
+ /* ACK before changing speed */
+ putpacket("OK");
+ gdbstub_io_set_baud(baudrate);
+ }
+ } while (0);
+ break;
+
+ /*
+ * Set breakpoint
+ */
+ case 'Z':
+ ptr = &input_buffer[1];
+
+ if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
+ !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
+ !hexToInt(&ptr, &length)
+ ) {
+ gdbstub_strcpy(output_buffer, "E01");
+ break;
+ }
+
+ /* only support software breakpoints */
+ gdbstub_strcpy(output_buffer, "E03");
+ if (loop != 0 ||
+ length < 1 ||
+ length > 7 ||
+ (unsigned long) addr < 4096)
+ break;
+
+ if (gdbstub_set_breakpoint((u8 *) addr, length) < 0)
+ break;
+
+ gdbstub_strcpy(output_buffer, "OK");
+ break;
+
+ /*
+ * Clear breakpoint
+ */
+ case 'z':
+ ptr = &input_buffer[1];
+
+ if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
+ !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
+ !hexToInt(&ptr, &length)
+ ) {
+ gdbstub_strcpy(output_buffer, "E01");
+ break;
+ }
+
+ /* only support software breakpoints */
+ gdbstub_strcpy(output_buffer, "E03");
+ if (loop != 0 ||
+ length < 1 ||
+ length > 7 ||
+ (unsigned long) addr < 4096)
+ break;
+
+ if (gdbstub_clear_breakpoint((u8 *) addr, length) < 0)
+ break;
+
+ gdbstub_strcpy(output_buffer, "OK");
+ break;
+
+ default:
+ gdbstub_proto("### GDB Unsupported Cmd '%s'\n",
+ input_buffer);
+ break;
+ }
+
+ /* reply to the request */
+ putpacket(output_buffer);
+ }
+
+done:
+ /*
+ * Need to flush the instruction cache here, as we may
+ * have deposited a breakpoint, and the icache probably
+ * has no way of knowing that a data ref to some location
+ * may have changed something that is in the instruction
+ * cache.
+ * NB: We flush both caches, just to be sure...
+ */
+ if (gdbstub_flush_caches)
+ debugger_local_cache_flushinv();
+
+ gdbstub_load_fpu();
+ mn10300_set_gdbleds(0);
+ if (excep == EXCEP_NMI)
+ NMICR = NMICR_NMIF;
+
+ touch_softlockup_watchdog();
+
+ local_irq_restore(epsw);
+ return 0;
+}
+
+/*
+ * Determine if we hit a debugger special breakpoint that needs skipping over
+ * automatically.
+ */
+int at_debugger_breakpoint(struct pt_regs *regs)
+{
+ return 0;
+}
+
+/*
+ * handle event interception
+ */
+asmlinkage int debugger_intercept(enum exception_code excep,
+ int signo, int si_code, struct pt_regs *regs)
+{
+ static u8 notfirst = 1;
+ int ret;
+
+ if (gdbstub_busy)
+ gdbstub_printk("--> gdbstub reentered itself\n");
+ gdbstub_busy = 1;
+
+ if (notfirst) {
+ unsigned long mdr;
+ asm("mov mdr,%0" : "=d"(mdr));
+
+ gdbstub_entry(
+ "--> debugger_intercept(%p,%04x) [MDR=%lx PC=%lx]\n",
+ regs, excep, mdr, regs->pc);
+
+ gdbstub_entry(
+ "PC: %08lx EPSW: %08lx SSP: %08lx mode: %s\n",
+ regs->pc, regs->epsw, (unsigned long) &ret,
+ user_mode(regs) ? "User" : "Super");
+ gdbstub_entry(
+ "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
+ regs->d0, regs->d1, regs->d2, regs->d3);
+ gdbstub_entry(
+ "a0: %08lx a1: %08lx a2: %08lx a3: %08lx\n",
+ regs->a0, regs->a1, regs->a2, regs->a3);
+ gdbstub_entry(
+ "e0: %08lx e1: %08lx e2: %08lx e3: %08lx\n",
+ regs->e0, regs->e1, regs->e2, regs->e3);
+ gdbstub_entry(
+ "e4: %08lx e5: %08lx e6: %08lx e7: %08lx\n",
+ regs->e4, regs->e5, regs->e6, regs->e7);
+ gdbstub_entry(
+ "lar: %08lx lir: %08lx mdr: %08lx usp: %08lx\n",
+ regs->lar, regs->lir, regs->mdr, regs->sp);
+ gdbstub_entry(
+ "cvf: %08lx crl: %08lx crh: %08lx drq: %08lx\n",
+ regs->mcvf, regs->mcrl, regs->mcrh, regs->mdrq);
+ gdbstub_entry(
+ "threadinfo=%p task=%p)\n",
+ current_thread_info(), current);
+ } else {
+ notfirst = 1;
+ }
+
+ ret = gdbstub(regs, excep);
+
+ gdbstub_entry("<-- debugger_intercept()\n");
+ gdbstub_busy = 0;
+ return ret;
+}
+
+/*
+ * handle the GDB stub itself causing an exception
+ */
+asmlinkage void gdbstub_exception(struct pt_regs *regs,
+ enum exception_code excep)
+{
+ unsigned long mdr;
+
+ asm("mov mdr,%0" : "=d"(mdr));
+ gdbstub_entry("--> gdbstub exception({%p},%04x) [MDR=%lx]\n",
+ regs, excep, mdr);
+
+ while ((unsigned long) regs == 0xffffffff) {}
+
+ /* handle guarded memory accesses where we know it might fault */
+ if (regs->pc == (unsigned) gdbstub_read_byte_guard) {
+ regs->pc = (unsigned) gdbstub_read_byte_cont;
+ goto fault;
+ }
+
+ if (regs->pc == (unsigned) gdbstub_read_word_guard) {
+ regs->pc = (unsigned) gdbstub_read_word_cont;
+ goto fault;
+ }
+
+ if (regs->pc == (unsigned) gdbstub_read_dword_guard) {
+ regs->pc = (unsigned) gdbstub_read_dword_cont;
+ goto fault;
+ }
+
+ if (regs->pc == (unsigned) gdbstub_write_byte_guard) {
+ regs->pc = (unsigned) gdbstub_write_byte_cont;
+ goto fault;
+ }
+
+ if (regs->pc == (unsigned) gdbstub_write_word_guard) {
+ regs->pc = (unsigned) gdbstub_write_word_cont;
+ goto fault;
+ }
+
+ if (regs->pc == (unsigned) gdbstub_write_dword_guard) {
+ regs->pc = (unsigned) gdbstub_write_dword_cont;
+ goto fault;
+ }
+
+ gdbstub_printk("\n### GDB stub caused an exception ###\n");
+
+ /* something went horribly wrong */
+ console_verbose();
+ show_registers(regs);
+
+ panic("GDB Stub caused an unexpected exception - can't continue\n");
+
+ /* we caught an attempt by the stub to access silly memory */
+fault:
+ gdbstub_entry("<-- gdbstub exception() = EFAULT\n");
+ regs->d0 = -EFAULT;
+ return;
+}
+
+/*
+ * send an exit message to GDB
+ */
+void gdbstub_exit(int status)
+{
+ unsigned char checksum;
+ unsigned char ch;
+ int count;
+
+ gdbstub_busy = 1;
+ output_buffer[0] = 'W';
+ output_buffer[1] = hex_asc_hi(status);
+ output_buffer[2] = hex_asc_lo(status);
+ output_buffer[3] = 0;
+
+ gdbstub_io_tx_char('$');
+ checksum = 0;
+ count = 0;
+
+ while ((ch = output_buffer[count]) != 0) {
+ gdbstub_io_tx_char(ch);
+ checksum += ch;
+ count += 1;
+ }
+
+ gdbstub_io_tx_char('#');
+ gdbstub_io_tx_char(hex_asc_hi(checksum));
+ gdbstub_io_tx_char(hex_asc_lo(checksum));
+
+ /* make sure the output is flushed, or else RedBoot might clobber it */
+ gdbstub_io_tx_flush();
+
+ gdbstub_busy = 0;
+}
+
+/*
+ * initialise the GDB stub
+ */
+asmlinkage void __init gdbstub_init(void)
+{
+#ifdef CONFIG_GDBSTUB_IMMEDIATE
+ unsigned char ch;
+ int ret;
+#endif
+
+ gdbstub_busy = 1;
+
+ printk(KERN_INFO "%s", gdbstub_banner);
+
+ gdbstub_io_init();
+
+ gdbstub_entry("--> gdbstub_init\n");
+
+ /* try to talk to GDB (or anyone insane enough to want to type GDB
+ * protocol by hand) */
+ gdbstub_io("### GDB Tx ACK\n");
+ gdbstub_io_tx_char('+'); /* 'hello world' */
+
+#ifdef CONFIG_GDBSTUB_IMMEDIATE
+ gdbstub_printk("GDB Stub waiting for packet\n");
+
+ /* in case GDB is started before us, ACK any packets that are already
+ * sitting there (presumably "$?#xx")
+ */
+ do { gdbstub_io_rx_char(&ch, 0); } while (ch != '$');
+ do { gdbstub_io_rx_char(&ch, 0); } while (ch != '#');
+ /* eat first csum byte */
+ do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
+ /* eat second csum byte */
+ do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
+
+ gdbstub_io("### GDB Tx NAK\n");
+ gdbstub_io_tx_char('-'); /* NAK it */
+
+#else
+ printk("GDB Stub ready\n");
+#endif
+
+ gdbstub_busy = 0;
+ gdbstub_entry("<-- gdbstub_init\n");
+}
+
+/*
+ * register the console at a more appropriate time
+ */
+#ifdef CONFIG_GDBSTUB_CONSOLE
+static int __init gdbstub_postinit(void)
+{
+ printk(KERN_NOTICE "registering console\n");
+ register_console(&gdbstub_console);
+ return 0;
+}
+
+__initcall(gdbstub_postinit);
+#endif
+
+/*
+ * handle character reception on GDB serial port
+ * - jump into the GDB stub if BREAK is detected on the serial line
+ */
+asmlinkage void gdbstub_rx_irq(struct pt_regs *regs, enum exception_code excep)
+{
+ char ch;
+ int ret;
+
+ gdbstub_entry("--> gdbstub_rx_irq\n");
+
+ do {
+ ret = gdbstub_io_rx_char(&ch, 1);
+ if (ret != -EIO && ret != -EAGAIN) {
+ if (ret != -EINTR)
+ gdbstub_rx_unget = ch;
+ gdbstub(regs, excep);
+ }
+ } while (ret != -EAGAIN);
+
+ gdbstub_entry("<-- gdbstub_rx_irq\n");
+}
diff --git a/arch/mn10300/kernel/head.S b/arch/mn10300/kernel/head.S
new file mode 100644
index 00000000000..73e00fc7807
--- /dev/null
+++ b/arch/mn10300/kernel/head.S
@@ -0,0 +1,450 @@
+/* Boot entry point for MN10300 kernel
+ *
+ * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+#include <linux/serial_reg.h>
+#include <asm/thread_info.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/frame.inc>
+#include <asm/param.h>
+#include <unit/serial.h>
+#ifdef CONFIG_SMP
+#include <asm/smp.h>
+#include <asm/intctl-regs.h>
+#include <asm/cpu-regs.h>
+#include <proc/smp-regs.h>
+#endif /* CONFIG_SMP */
+
+ __HEAD
+
+###############################################################################
+#
+# bootloader entry point
+#
+###############################################################################
+ .globl _start
+ .type _start,@function
+_start:
+#ifdef CONFIG_SMP
+ #
+ # If this is a secondary CPU (AP), then deal with that elsewhere
+ #
+ mov (CPUID),d3
+ and CPUID_MASK,d3
+ bne startup_secondary
+
+ #
+ # We're dealing with the primary CPU (BP) here, then.
+ # Keep BP's D0,D1,D2 register for boot check.
+ #
+
+ # Set up the Boot IPI for each secondary CPU
+ mov 0x1,a0
+loop_set_secondary_icr:
+ mov a0,a1
+ asl CROSS_ICR_CPU_SHIFT,a1
+ add CROSS_GxICR(SMP_BOOT_IRQ,0),a1
+ movhu (a1),d3
+ or GxICR_ENABLE|GxICR_LEVEL_0,d3
+ movhu d3,(a1)
+ movhu (a1),d3 # flush
+ inc a0
+ cmp NR_CPUS,a0
+ bne loop_set_secondary_icr
+#endif /* CONFIG_SMP */
+
+ # save commandline pointer
+ mov d0,a3
+
+ # preload the PGD pointer register
+ mov swapper_pg_dir,d0
+ mov d0,(PTBR)
+ clr d0
+ movbu d0,(PIDR)
+
+ # turn on the TLBs
+ mov MMUCTR_IIV|MMUCTR_DIV,d0
+ mov d0,(MMUCTR)
+#ifdef CONFIG_AM34_2
+ mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE|MMUCTR_WTE,d0
+#else
+ mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
+#endif
+ mov d0,(MMUCTR)
+
+ # turn on AM33v2 exception handling mode and set the trap table base
+ movhu (CPUP),d0
+ or CPUP_EXM_AM33V2,d0
+ movhu d0,(CPUP)
+ mov CONFIG_INTERRUPT_VECTOR_BASE,d0
+ mov d0,(TBR)
+
+ # invalidate and enable both of the caches
+#ifdef CONFIG_SMP
+ mov ECHCTR,a0
+ clr d0
+ mov d0,(a0)
+#endif
+ mov CHCTR,a0
+ clr d0
+ movhu d0,(a0) # turn off first
+ mov CHCTR_ICINV|CHCTR_DCINV,d0
+ movhu d0,(a0)
+ setlb
+ mov (a0),d0
+ btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
+ lne
+
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+#ifdef CONFIG_MN10300_CACHE_WBACK
+#ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
+#else
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
+#endif /* NOWRALLOC */
+#else
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
+#endif /* WBACK */
+ movhu d0,(a0) # enable
+#endif /* ENABLED */
+
+ # turn on RTS on the debug serial port if applicable
+#ifdef CONFIG_MN10300_UNIT_ASB2305
+ bset UART_MCR_RTS,(ASB2305_DEBUG_MCR)
+#endif
+
+ # clear the BSS area
+ mov __bss_start,a0
+ mov __bss_stop,a1
+ clr d0
+bssclear:
+ cmp a1,a0
+ bge bssclear_end
+ mov d0,(a0)
+ inc4 a0
+ bra bssclear
+bssclear_end:
+
+ # retrieve the parameters (including command line) before we overwrite
+ # them
+ cmp 0xabadcafe,d1
+ bne __no_parameters
+
+__copy_parameters:
+ mov redboot_command_line,a0
+ mov a0,a1
+ add COMMAND_LINE_SIZE,a1
+1:
+ movbu (a3),d0
+ inc a3
+ movbu d0,(a0)
+ inc a0
+ cmp a1,a0
+ blt 1b
+
+ mov redboot_platform_name,a0
+ mov a0,a1
+ add COMMAND_LINE_SIZE,a1
+ mov d2,a3
+1:
+ movbu (a3),d0
+ inc a3
+ movbu d0,(a0)
+ inc a0
+ cmp a1,a0
+ blt 1b
+
+__no_parameters:
+
+ # set up the registers with recognisable rubbish in them
+ mov init_thread_union+THREAD_SIZE-12,sp
+
+ mov 0xea01eaea,d0
+ mov d0,(4,sp) # EPSW save area
+ mov 0xea02eaea,d0
+ mov d0,(8,sp) # PC save area
+
+ mov 0xeb0060ed,d0
+ mov d0,mdr
+ mov 0xeb0061ed,d0
+ mov d0,mdrq
+ mov 0xeb0062ed,d0
+ mov d0,mcrh
+ mov 0xeb0063ed,d0
+ mov d0,mcrl
+ mov 0xeb0064ed,d0
+ mov d0,mcvf
+ mov 0xed0065ed,a3
+ mov a3,usp
+
+ mov 0xed00e0ed,e0
+ mov 0xed00e1ed,e1
+ mov 0xed00e2ed,e2
+ mov 0xed00e3ed,e3
+ mov 0xed00e4ed,e4
+ mov 0xed00e5ed,e5
+ mov 0xed00e6ed,e6
+ mov 0xed00e7ed,e7
+
+ mov 0xed00d0ed,d0
+ mov 0xed00d1ed,d1
+ mov 0xed00d2ed,d2
+ mov 0xed00d3ed,d3
+ mov 0xed00a0ed,a0
+ mov 0xed00a1ed,a1
+ mov 0xed00a2ed,a2
+ mov 0,a3
+
+ # set up the initial kernel stack
+ SAVE_ALL
+ mov 0xffffffff,d0
+ mov d0,(REG_ORIG_D0,fp)
+
+ # put different recognisable rubbish in the regs
+ mov 0xfb0060ed,d0
+ mov d0,mdr
+ mov 0xfb0061ed,d0
+ mov d0,mdrq
+ mov 0xfb0062ed,d0
+ mov d0,mcrh
+ mov 0xfb0063ed,d0
+ mov d0,mcrl
+ mov 0xfb0064ed,d0
+ mov d0,mcvf
+ mov 0xfd0065ed,a0
+ mov a0,usp
+
+ mov 0xfd00e0ed,e0
+ mov 0xfd00e1ed,e1
+ mov 0xfd00e2ed,e2
+ mov 0xfd00e3ed,e3
+ mov 0xfd00e4ed,e4
+ mov 0xfd00e5ed,e5
+ mov 0xfd00e6ed,e6
+ mov 0xfd00e7ed,e7
+
+ mov 0xfd00d0ed,d0
+ mov 0xfd00d1ed,d1
+ mov 0xfd00d2ed,d2
+ mov 0xfd00d3ed,d3
+ mov 0xfd00a0ed,a0
+ mov 0xfd00a1ed,a1
+ mov 0xfd00a2ed,a2
+
+ # we may be holding current in E2
+#ifdef CONFIG_MN10300_CURRENT_IN_E2
+ mov init_task,e2
+#endif
+
+ # initialise the processor and the unit
+ call processor_init[],0
+ call unit_init[],0
+
+#ifdef CONFIG_SMP
+ # mark the primary CPU in cpu_boot_map
+ mov cpu_boot_map,a0
+ mov 0x1,d0
+ mov d0,(a0)
+
+ # signal each secondary CPU to begin booting
+ mov 0x1,d2 # CPU ID
+
+loop_request_boot_secondary:
+ mov d2,a0
+ # send SMP_BOOT_IPI to secondary CPU
+ asl CROSS_ICR_CPU_SHIFT,a0
+ add CROSS_GxICR(SMP_BOOT_IRQ,0),a0
+ movhu (a0),d0
+ or GxICR_REQUEST|GxICR_DETECT,d0
+ movhu d0,(a0)
+ movhu (a0),d0 # flush
+
+ # wait up to 100ms for AP's IPI to be received
+ clr d3
+wait_on_secondary_boot:
+ mov DELAY_TIME_BOOT_IPI,d0
+ call __delay[],0
+ inc d3
+ mov cpu_boot_map,a0
+ mov (a0),d0
+ lsr d2,d0
+ btst 0x1,d0
+ bne 1f
+ cmp TIME_OUT_COUNT_BOOT_IPI,d3
+ bne wait_on_secondary_boot
+1:
+ inc d2
+ cmp NR_CPUS,d2
+ bne loop_request_boot_secondary
+#endif /* CONFIG_SMP */
+
+#ifdef CONFIG_GDBSTUB
+ call gdbstub_init[],0
+
+#ifdef CONFIG_GDBSTUB_IMMEDIATE
+ .globl __gdbstub_pause
+__gdbstub_pause:
+ bra __gdbstub_pause
+#endif
+#endif
+
+ jmp start_kernel
+ .size _start,.-_start
+
+###############################################################################
+#
+# Secondary CPU boot point
+#
+###############################################################################
+#ifdef CONFIG_SMP
+startup_secondary:
+ # preload the PGD pointer register
+ mov swapper_pg_dir,d0
+ mov d0,(PTBR)
+ clr d0
+ movbu d0,(PIDR)
+
+ # turn on the TLBs
+ mov MMUCTR_IIV|MMUCTR_DIV,d0
+ mov d0,(MMUCTR)
+#ifdef CONFIG_AM34_2
+ mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE|MMUCTR_WTE,d0
+#else
+ mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
+#endif
+ mov d0,(MMUCTR)
+
+ # turn on AM33v2 exception handling mode and set the trap table base
+ movhu (CPUP),d0
+ or CPUP_EXM_AM33V2,d0
+ movhu d0,(CPUP)
+
+ # set the interrupt vector table
+ mov CONFIG_INTERRUPT_VECTOR_BASE,d0
+ mov d0,(TBR)
+
+ # invalidate and enable both of the caches
+ mov ECHCTR,a0
+ clr d0
+ mov d0,(a0)
+ mov CHCTR,a0
+ clr d0
+ movhu d0,(a0) # turn off first
+ mov CHCTR_ICINV|CHCTR_DCINV,d0
+ movhu d0,(a0)
+ setlb
+ mov (a0),d0
+ btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy (use CPU loop buffer)
+ lne
+
+#ifdef CONFIG_MN10300_CACHE_ENABLED
+#ifdef CONFIG_MN10300_CACHE_WBACK
+#ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
+#else
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
+#endif /* !NOWRALLOC */
+#else
+ mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
+#endif /* WBACK */
+ movhu d0,(a0) # enable
+#endif /* ENABLED */
+
+ # Clear the boot IPI interrupt for this CPU
+ movhu (GxICR(SMP_BOOT_IRQ)),d0
+ and ~GxICR_REQUEST,d0
+ movhu d0,(GxICR(SMP_BOOT_IRQ))
+ movhu (GxICR(SMP_BOOT_IRQ)),d0 # flush
+
+ /* get stack */
+ mov CONFIG_INTERRUPT_VECTOR_BASE + CONFIG_BOOT_STACK_OFFSET,a0
+ mov (CPUID),d0
+ and CPUID_MASK,d0
+ mulu CONFIG_BOOT_STACK_SIZE,d0
+ sub d0,a0
+ mov a0,sp
+
+ # init interrupt for AP
+ call smp_prepare_cpu_init[],0
+
+ # mark this secondary CPU in cpu_boot_map
+ mov (CPUID),d0
+ mov 0x1,d1
+ asl d0,d1
+ mov cpu_boot_map,a0
+ bset d1,(a0)
+
+ or EPSW_IE|EPSW_IM_1,epsw # permit level 0 interrupts
+ nop
+ nop
+#ifdef CONFIG_MN10300_CACHE_WBACK
+ # flush the local cache if it's in writeback mode
+ call mn10300_local_dcache_flush_inv[],0
+ setlb
+ mov (CHCTR),d0
+ btst CHCTR_DCBUSY,d0 # wait till not busy (use CPU loop buffer)
+ lne
+#endif
+
+ # now sleep waiting for further instructions
+secondary_sleep:
+ mov CPUM_SLEEP,d0
+ movhu d0,(CPUM)
+ nop
+ nop
+ bra secondary_sleep
+ .size startup_secondary,.-startup_secondary
+#endif /* CONFIG_SMP */
+
+###############################################################################
+#
+#
+#
+###############################################################################
+ENTRY(__head_end)
+
+/*
+ * This is initialized to disallow all access to the low 2G region
+ * - the high 2G region is managed directly by the MMU
+ * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC
+ */
+ .section .bss
+ .balign PAGE_SIZE
+ENTRY(swapper_pg_dir)
+ .space PTRS_PER_PGD*4
+
+/*
+ * The page tables are initialized to only 8MB here - the final page
+ * tables are set up later depending on memory size.
+ */
+
+ .balign PAGE_SIZE
+ENTRY(empty_zero_page)
+ .space PAGE_SIZE
+
+ .balign PAGE_SIZE
+ENTRY(empty_bad_page)
+ .space PAGE_SIZE
+
+ .balign PAGE_SIZE
+ENTRY(empty_bad_pte_table)
+ .space PAGE_SIZE
+
+ .balign PAGE_SIZE
+ENTRY(large_page_table)
+ .space PAGE_SIZE
+
+ .balign PAGE_SIZE
+ENTRY(kernel_vmalloc_ptes)
+ .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4
diff --git a/arch/mn10300/kernel/init_task.c b/arch/mn10300/kernel/init_task.c
new file mode 100644
index 00000000000..a481b043bea
--- /dev/null
+++ b/arch/mn10300/kernel/init_task.c
@@ -0,0 +1,39 @@
+/* MN10300 Initial task definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/init_task.h>
+#include <linux/fs.h>
+#include <linux/mqueue.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is THREAD_SIZE aligned due to the
+ * way process stacks are handled. This is done by having a special
+ * "init_task" linker map entry..
+ */
+union thread_union init_thread_union __init_task_data =
+ { INIT_THREAD_INFO(init_task) };
+
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+struct task_struct init_task = INIT_TASK(init_task);
+EXPORT_SYMBOL(init_task);
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
new file mode 100644
index 00000000000..a5ac755dd69
--- /dev/null
+++ b/arch/mn10300/kernel/internal.h
@@ -0,0 +1,42 @@
+/* Internal definitions for the arch part of the core kernel
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+struct clocksource;
+struct clock_event_device;
+
+/*
+ * kthread.S
+ */
+extern int kernel_thread_helper(int);
+
+/*
+ * entry.S
+ */
+extern void ret_from_fork(struct task_struct *) __attribute__((noreturn));
+
+/*
+ * smp-low.S
+ */
+#ifdef CONFIG_SMP
+extern void mn10300_low_ipi_handler(void);
+#endif
+
+/*
+ * smp.c
+ */
+#ifdef CONFIG_SMP
+extern void smp_jump_to_debugger(void);
+#endif
+
+/*
+ * time.c
+ */
+extern irqreturn_t local_timer_interrupt(void);
diff --git a/arch/mn10300/kernel/io.c b/arch/mn10300/kernel/io.c
new file mode 100644
index 00000000000..e96fdf6bb54
--- /dev/null
+++ b/arch/mn10300/kernel/io.c
@@ -0,0 +1,30 @@
+/* MN10300 Misaligned multibyte-word I/O
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <asm/io.h>
+
+/*
+ * output data from a potentially misaligned buffer
+ */
+void __outsl(unsigned long addr, const void *buffer, int count)
+{
+ const unsigned char *buf = buffer;
+ unsigned long val;
+
+ while (count--) {
+ memcpy(&val, buf, 4);
+ outl(val, addr);
+ buf += 4;
+ }
+}
+EXPORT_SYMBOL(__outsl);
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
new file mode 100644
index 00000000000..2381df83bd0
--- /dev/null
+++ b/arch/mn10300/kernel/irq.c
@@ -0,0 +1,401 @@
+/* MN10300 Arch-specific interrupt handling
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/seq_file.h>
+#include <linux/cpumask.h>
+#include <asm/setup.h>
+#include <asm/serial-regs.h>
+
+unsigned long __mn10300_irq_enabled_epsw[NR_CPUS] __cacheline_aligned_in_smp = {
+ [0 ... NR_CPUS - 1] = EPSW_IE | EPSW_IM_7
+};
+EXPORT_SYMBOL(__mn10300_irq_enabled_epsw);
+
+#ifdef CONFIG_SMP
+static char irq_affinity_online[NR_IRQS] = {
+ [0 ... NR_IRQS - 1] = 0
+};
+
+#define NR_IRQ_WORDS ((NR_IRQS + 31) / 32)
+static unsigned long irq_affinity_request[NR_IRQ_WORDS] = {
+ [0 ... NR_IRQ_WORDS - 1] = 0
+};
+#endif /* CONFIG_SMP */
+
+atomic_t irq_err_count;
+
+/*
+ * MN10300 interrupt controller operations
+ */
+static void mn10300_cpupic_ack(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+ unsigned long flags;
+ u16 tmp;
+
+ flags = arch_local_cli_save();
+ GxICR_u8(irq) = GxICR_DETECT;
+ tmp = GxICR(irq);
+ arch_local_irq_restore(flags);
+}
+
+static void __mask_and_set_icr(unsigned int irq,
+ unsigned int mask, unsigned int set)
+{
+ unsigned long flags;
+ u16 tmp;
+
+ flags = arch_local_cli_save();
+ tmp = GxICR(irq);
+ GxICR(irq) = (tmp & mask) | set;
+ tmp = GxICR(irq);
+ arch_local_irq_restore(flags);
+}
+
+static void mn10300_cpupic_mask(struct irq_data *d)
+{
+ __mask_and_set_icr(d->irq, GxICR_LEVEL, 0);
+}
+
+static void mn10300_cpupic_mask_ack(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+#ifdef CONFIG_SMP
+ unsigned long flags;
+ u16 tmp;
+
+ flags = arch_local_cli_save();
+
+ if (!test_and_clear_bit(irq, irq_affinity_request)) {
+ tmp = GxICR(irq);
+ GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
+ tmp = GxICR(irq);
+ } else {
+ u16 tmp2;
+ tmp = GxICR(irq);
+ GxICR(irq) = (tmp & GxICR_LEVEL);
+ tmp2 = GxICR(irq);
+
+ irq_affinity_online[irq] =
+ cpumask_any_and(d->affinity, cpu_online_mask);
+ CROSS_GxICR(irq, irq_affinity_online[irq]) =
+ (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT;
+ tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
+ }
+
+ arch_local_irq_restore(flags);
+#else /* CONFIG_SMP */
+ __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_DETECT);
+#endif /* CONFIG_SMP */
+}
+
+static void mn10300_cpupic_unmask(struct irq_data *d)
+{
+ __mask_and_set_icr(d->irq, GxICR_LEVEL, GxICR_ENABLE);
+}
+
+static void mn10300_cpupic_unmask_clear(struct irq_data *d)
+{
+ unsigned int irq = d->irq;
+ /* the MN10300 PIC latches its interrupt request bit, even after the
+ * device has ceased to assert its interrupt line and the interrupt
+ * channel has been disabled in the PIC, so for level-triggered
+ * interrupts we need to clear the request bit when we re-enable */
+#ifdef CONFIG_SMP
+ unsigned long flags;
+ u16 tmp;
+
+ flags = arch_local_cli_save();
+
+ if (!test_and_clear_bit(irq, irq_affinity_request)) {
+ tmp = GxICR(irq);
+ GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
+ tmp = GxICR(irq);
+ } else {
+ tmp = GxICR(irq);
+
+ irq_affinity_online[irq] = cpumask_any_and(d->affinity,
+ cpu_online_mask);
+ CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
+ tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
+ }
+
+ arch_local_irq_restore(flags);
+#else /* CONFIG_SMP */
+ __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_ENABLE | GxICR_DETECT);
+#endif /* CONFIG_SMP */
+}
+
+#ifdef CONFIG_SMP
+static int
+mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask,
+ bool force)
+{
+ unsigned long flags;
+ int err;
+
+ flags = arch_local_cli_save();
+
+ /* check irq no */
+ switch (d->irq) {
+ case TMJCIRQ:
+ case RESCHEDULE_IPI:
+ case CALL_FUNC_SINGLE_IPI:
+ case LOCAL_TIMER_IPI:
+ case FLUSH_CACHE_IPI:
+ case CALL_FUNCTION_NMI_IPI:
+ case DEBUGGER_NMI_IPI:
+#ifdef CONFIG_MN10300_TTYSM0
+ case SC0RXIRQ:
+ case SC0TXIRQ:
+#ifdef CONFIG_MN10300_TTYSM0_TIMER8
+ case TM8IRQ:
+#elif CONFIG_MN10300_TTYSM0_TIMER2
+ case TM2IRQ:
+#endif /* CONFIG_MN10300_TTYSM0_TIMER8 */
+#endif /* CONFIG_MN10300_TTYSM0 */
+
+#ifdef CONFIG_MN10300_TTYSM1
+ case SC1RXIRQ:
+ case SC1TXIRQ:
+#ifdef CONFIG_MN10300_TTYSM1_TIMER12
+ case TM12IRQ:
+#elif CONFIG_MN10300_TTYSM1_TIMER9
+ case TM9IRQ:
+#elif CONFIG_MN10300_TTYSM1_TIMER3
+ case TM3IRQ:
+#endif /* CONFIG_MN10300_TTYSM1_TIMER12 */
+#endif /* CONFIG_MN10300_TTYSM1 */
+
+#ifdef CONFIG_MN10300_TTYSM2
+ case SC2RXIRQ:
+ case SC2TXIRQ:
+ case TM10IRQ:
+#endif /* CONFIG_MN10300_TTYSM2 */
+ err = -1;
+ break;
+
+ default:
+ set_bit(d->irq, irq_affinity_request);
+ err = 0;
+ break;
+ }
+
+ arch_local_irq_restore(flags);
+ return err;
+}
+#endif /* CONFIG_SMP */
+
+/*
+ * MN10300 PIC level-triggered IRQ handling.
+ *
+ * The PIC has no 'ACK' function per se. It is possible to clear individual
+ * channel latches, but each latch relatches whether or not the channel is
+ * masked, so we need to clear the latch when we unmask the channel.
+ *
+ * Also for this reason, we don't supply an ack() op (it's unused anyway if
+ * mask_ack() is provided), and mask_ack() just masks.
+ */
+static struct irq_chip mn10300_cpu_pic_level = {
+ .name = "cpu_l",
+ .irq_disable = mn10300_cpupic_mask,
+ .irq_enable = mn10300_cpupic_unmask_clear,
+ .irq_ack = NULL,
+ .irq_mask = mn10300_cpupic_mask,
+ .irq_mask_ack = mn10300_cpupic_mask,
+ .irq_unmask = mn10300_cpupic_unmask_clear,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = mn10300_cpupic_setaffinity,
+#endif
+};
+
+/*
+ * MN10300 PIC edge-triggered IRQ handling.
+ *
+ * We use the latch clearing function of the PIC as the 'ACK' function.
+ */
+static struct irq_chip mn10300_cpu_pic_edge = {
+ .name = "cpu_e",
+ .irq_disable = mn10300_cpupic_mask,
+ .irq_enable = mn10300_cpupic_unmask,
+ .irq_ack = mn10300_cpupic_ack,
+ .irq_mask = mn10300_cpupic_mask,
+ .irq_mask_ack = mn10300_cpupic_mask_ack,
+ .irq_unmask = mn10300_cpupic_unmask,
+#ifdef CONFIG_SMP
+ .irq_set_affinity = mn10300_cpupic_setaffinity,
+#endif
+};
+
+/*
+ * 'what should we do if we get a hw irq event on an illegal vector'.
+ * each architecture has to answer this themselves.
+ */
+void ack_bad_irq(int irq)
+{
+ printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
+}
+
+/*
+ * change the level at which an IRQ executes
+ * - must not be called whilst interrupts are being processed!
+ */
+void set_intr_level(int irq, u16 level)
+{
+ BUG_ON(in_interrupt());
+
+ __mask_and_set_icr(irq, GxICR_ENABLE, level);
+}
+
+/*
+ * mark an interrupt to be ACK'd after interrupt handlers have been run rather
+ * than before
+ */
+void mn10300_set_lateack_irq_type(int irq)
+{
+ irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level,
+ handle_level_irq);
+}
+
+/*
+ * initialise the interrupt system
+ */
+void __init init_IRQ(void)
+{
+ int irq;
+
+ for (irq = 0; irq < NR_IRQS; irq++)
+ if (irq_get_chip(irq) == &no_irq_chip)
+ /* due to the PIC latching interrupt requests, even
+ * when the IRQ is disabled, IRQ_PENDING is superfluous
+ * and we can use handle_level_irq() for edge-triggered
+ * interrupts */
+ irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge,
+ handle_level_irq);
+
+ unit_init_IRQ();
+}
+
+/*
+ * handle normal device IRQs
+ */
+asmlinkage void do_IRQ(void)
+{
+ unsigned long sp, epsw, irq_disabled_epsw, old_irq_enabled_epsw;
+ unsigned int cpu_id = smp_processor_id();
+ int irq;
+
+ sp = current_stack_pointer();
+ BUG_ON(sp - (sp & ~(THREAD_SIZE - 1)) < STACK_WARN);
+
+ /* make sure local_irq_enable() doesn't muck up the interrupt priority
+ * setting in EPSW */
+ old_irq_enabled_epsw = __mn10300_irq_enabled_epsw[cpu_id];
+ local_save_flags(epsw);
+ __mn10300_irq_enabled_epsw[cpu_id] = EPSW_IE | (EPSW_IM & epsw);
+ irq_disabled_epsw = EPSW_IE | MN10300_CLI_LEVEL;
+
+#ifdef CONFIG_MN10300_WD_TIMER
+ __IRQ_STAT(cpu_id, __irq_count)++;
+#endif
+
+ irq_enter();
+
+ for (;;) {
+ /* ask the interrupt controller for the next IRQ to process
+ * - the result we get depends on EPSW.IM
+ */
+ irq = IAGR & IAGR_GN;
+ if (!irq)
+ break;
+
+ local_irq_restore(irq_disabled_epsw);
+
+ generic_handle_irq(irq >> 2);
+
+ /* restore IRQ controls for IAGR access */
+ local_irq_restore(epsw);
+ }
+
+ __mn10300_irq_enabled_epsw[cpu_id] = old_irq_enabled_epsw;
+
+ irq_exit();
+}
+
+/*
+ * Display interrupt management information through /proc/interrupts
+ */
+int arch_show_interrupts(struct seq_file *p, int prec)
+{
+#ifdef CONFIG_MN10300_WD_TIMER
+ int j;
+
+ seq_printf(p, "%*s: ", prec, "NMI");
+ for (j = 0; j < NR_CPUS; j++)
+ if (cpu_online(j))
+ seq_printf(p, "%10u ", nmi_count(j));
+ seq_putc(p, '\n');
+#endif
+
+ seq_printf(p, "%*s: ", prec, "ERR");
+ seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
+ return 0;
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+void migrate_irqs(void)
+{
+ int irq;
+ unsigned int self, new;
+ unsigned long flags;
+
+ self = smp_processor_id();
+ for (irq = 0; irq < NR_IRQS; irq++) {
+ struct irq_data *data = irq_get_irq_data(irq);
+
+ if (irqd_is_per_cpu(data))
+ continue;
+
+ if (cpumask_test_cpu(self, &data->affinity) &&
+ !cpumask_intersects(&irq_affinity[irq], cpu_online_mask)) {
+ int cpu_id;
+ cpu_id = cpumask_first(cpu_online_mask);
+ cpumask_set_cpu(cpu_id, &data->affinity);
+ }
+ /* We need to operate irq_affinity_online atomically. */
+ arch_local_cli_save(flags);
+ if (irq_affinity_online[irq] == self) {
+ u16 x, tmp;
+
+ x = GxICR(irq);
+ GxICR(irq) = x & GxICR_LEVEL;
+ tmp = GxICR(irq);
+
+ new = cpumask_any_and(&data->affinity,
+ cpu_online_mask);
+ irq_affinity_online[irq] = new;
+
+ CROSS_GxICR(irq, new) =
+ (x & GxICR_LEVEL) | GxICR_DETECT;
+ tmp = CROSS_GxICR(irq, new);
+
+ x &= GxICR_LEVEL | GxICR_ENABLE;
+ if (GxICR(irq) & GxICR_REQUEST)
+ x |= GxICR_REQUEST | GxICR_DETECT;
+ CROSS_GxICR(irq, new) = x;
+ tmp = CROSS_GxICR(irq, new);
+ }
+ arch_local_irq_restore(flags);
+ }
+}
+#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/mn10300/kernel/kernel_execve.S b/arch/mn10300/kernel/kernel_execve.S
new file mode 100644
index 00000000000..86039f10526
--- /dev/null
+++ b/arch/mn10300/kernel/kernel_execve.S
@@ -0,0 +1,37 @@
+/* MN10300 In-kernel program execution
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+
+###############################################################################
+#
+# Do a system call from kernel instead of calling sys_execve so we end up with
+# proper pt_regs.
+#
+# int kernel_execve(const char *filename, char *const argv[],
+# char *const envp[])
+#
+# On entry: D0/D1/8(SP): arguments to function
+# On return: D0: syscall return.
+#
+###############################################################################
+ .globl kernel_execve
+ .type kernel_execve,@function
+kernel_execve:
+ mov a3,a1
+ mov d0,a0
+ mov (12,sp),a3
+ mov +__NR_execve,d0
+ syscall 0
+ mov a1,a3
+ rets
+
+ .size kernel_execve,.-kernel_execve
diff --git a/arch/mn10300/kernel/kgdb.c b/arch/mn10300/kernel/kgdb.c
new file mode 100644
index 00000000000..f6c981db2a3
--- /dev/null
+++ b/arch/mn10300/kernel/kgdb.c
@@ -0,0 +1,502 @@
+/* kgdb support for MN10300
+ *
+ * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#include <linux/slab.h>
+#include <linux/ptrace.h>
+#include <linux/kgdb.h>
+#include <linux/uaccess.h>
+#include <unit/leds.h>
+#include <unit/serial.h>
+#include <asm/debugger.h>
+#include <asm/serial-regs.h>
+#include "internal.h"
+
+/*
+ * Software single-stepping breakpoint save (used by __switch_to())
+ */
+static struct thread_info *kgdb_sstep_thread;
+u8 *kgdb_sstep_bp_addr[2];
+u8 kgdb_sstep_bp[2];
+
+/*
+ * Copy kernel exception frame registers to the GDB register file
+ */
+void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+ unsigned long ssp = (unsigned long) (regs + 1);
+
+ gdb_regs[GDB_FR_D0] = regs->d0;
+ gdb_regs[GDB_FR_D1] = regs->d1;
+ gdb_regs[GDB_FR_D2] = regs->d2;
+ gdb_regs[GDB_FR_D3] = regs->d3;
+ gdb_regs[GDB_FR_A0] = regs->a0;
+ gdb_regs[GDB_FR_A1] = regs->a1;
+ gdb_regs[GDB_FR_A2] = regs->a2;
+ gdb_regs[GDB_FR_A3] = regs->a3;
+ gdb_regs[GDB_FR_SP] = (regs->epsw & EPSW_nSL) ? regs->sp : ssp;
+ gdb_regs[GDB_FR_PC] = regs->pc;
+ gdb_regs[GDB_FR_MDR] = regs->mdr;
+ gdb_regs[GDB_FR_EPSW] = regs->epsw;
+ gdb_regs[GDB_FR_LIR] = regs->lir;
+ gdb_regs[GDB_FR_LAR] = regs->lar;
+ gdb_regs[GDB_FR_MDRQ] = regs->mdrq;
+ gdb_regs[GDB_FR_E0] = regs->e0;
+ gdb_regs[GDB_FR_E1] = regs->e1;
+ gdb_regs[GDB_FR_E2] = regs->e2;
+ gdb_regs[GDB_FR_E3] = regs->e3;
+ gdb_regs[GDB_FR_E4] = regs->e4;
+ gdb_regs[GDB_FR_E5] = regs->e5;
+ gdb_regs[GDB_FR_E6] = regs->e6;
+ gdb_regs[GDB_FR_E7] = regs->e7;
+ gdb_regs[GDB_FR_SSP] = ssp;
+ gdb_regs[GDB_FR_MSP] = 0;
+ gdb_regs[GDB_FR_USP] = regs->sp;
+ gdb_regs[GDB_FR_MCRH] = regs->mcrh;
+ gdb_regs[GDB_FR_MCRL] = regs->mcrl;
+ gdb_regs[GDB_FR_MCVF] = regs->mcvf;
+ gdb_regs[GDB_FR_DUMMY0] = 0;
+ gdb_regs[GDB_FR_DUMMY1] = 0;
+ gdb_regs[GDB_FR_FS0] = 0;
+}
+
+/*
+ * Extracts kernel SP/PC values understandable by gdb from the values
+ * saved by switch_to().
+ */
+void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
+{
+ gdb_regs[GDB_FR_SSP] = p->thread.sp;
+ gdb_regs[GDB_FR_PC] = p->thread.pc;
+ gdb_regs[GDB_FR_A3] = p->thread.a3;
+ gdb_regs[GDB_FR_USP] = p->thread.usp;
+ gdb_regs[GDB_FR_FPCR] = p->thread.fpu_state.fpcr;
+}
+
+/*
+ * Fill kernel exception frame registers from the GDB register file
+ */
+void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+ regs->d0 = gdb_regs[GDB_FR_D0];
+ regs->d1 = gdb_regs[GDB_FR_D1];
+ regs->d2 = gdb_regs[GDB_FR_D2];
+ regs->d3 = gdb_regs[GDB_FR_D3];
+ regs->a0 = gdb_regs[GDB_FR_A0];
+ regs->a1 = gdb_regs[GDB_FR_A1];
+ regs->a2 = gdb_regs[GDB_FR_A2];
+ regs->a3 = gdb_regs[GDB_FR_A3];
+ regs->sp = gdb_regs[GDB_FR_SP];
+ regs->pc = gdb_regs[GDB_FR_PC];
+ regs->mdr = gdb_regs[GDB_FR_MDR];
+ regs->epsw = gdb_regs[GDB_FR_EPSW];
+ regs->lir = gdb_regs[GDB_FR_LIR];
+ regs->lar = gdb_regs[GDB_FR_LAR];
+ regs->mdrq = gdb_regs[GDB_FR_MDRQ];
+ regs->e0 = gdb_regs[GDB_FR_E0];
+ regs->e1 = gdb_regs[GDB_FR_E1];
+ regs->e2 = gdb_regs[GDB_FR_E2];
+ regs->e3 = gdb_regs[GDB_FR_E3];
+ regs->e4 = gdb_regs[GDB_FR_E4];
+ regs->e5 = gdb_regs[GDB_FR_E5];
+ regs->e6 = gdb_regs[GDB_FR_E6];
+ regs->e7 = gdb_regs[GDB_FR_E7];
+ regs->sp = gdb_regs[GDB_FR_SSP];
+ /* gdb_regs[GDB_FR_MSP]; */
+ // regs->usp = gdb_regs[GDB_FR_USP];
+ regs->mcrh = gdb_regs[GDB_FR_MCRH];</