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authorAnton Arapov <anton@redhat.com>2012-08-07 11:21:50 +0200
committerAnton Arapov <anton@redhat.com>2012-08-07 12:52:25 +0200
commit1d44b6f3fcf6058fb7c960b7558766967e8028f7 (patch)
tree53d88547c973ba048d233091a3f91f3173ad01df /arch/arm/mach-ux500/include/mach
parentd91eda5d7b0383e6a0c83e0146ff141ff3b1355b (diff)
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fedora kernel: 222b075b3ff0d9e88aa9353e3c80667756ed7361v3.5.0-4
Signed-off-by: Anton Arapov <anton@redhat.com>
Diffstat (limited to 'arch/arm/mach-ux500/include/mach')
-rw-r--r--arch/arm/mach-ux500/include/mach/crypto-ux500.h22
-rw-r--r--arch/arm/mach-ux500/include/mach/db5500-regs.h143
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h6
-rw-r--r--arch/arm/mach-ux500/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-ux500/include/mach/devices.h4
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h7
-rw-r--r--arch/arm/mach-ux500/include/mach/id.h17
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-board-u5500.h21
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-db5500.h113
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-ux500/include/mach/mbox-db5500.h88
-rw-r--r--arch/arm/mach-ux500/include/mach/msp.h29
-rw-r--r--arch/arm/mach-ux500/include/mach/setup.h7
-rw-r--r--arch/arm/mach-ux500/include/mach/uncompress.h7
14 files changed, 86 insertions, 389 deletions
diff --git a/arch/arm/mach-ux500/include/mach/crypto-ux500.h b/arch/arm/mach-ux500/include/mach/crypto-ux500.h
new file mode 100644
index 00000000000..5b2d0817e26
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/crypto-ux500.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson
+ * License terms: GNU General Public License (GPL) version 2
+ */
+#ifndef _CRYPTO_UX500_H
+#define _CRYPTO_UX500_H
+#include <linux/dmaengine.h>
+#include <plat/ste_dma40.h>
+
+struct hash_platform_data {
+ void *mem_to_engine;
+ bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
+};
+
+struct cryp_platform_data {
+ struct stedma40_chan_cfg mem_to_engine;
+ struct stedma40_chan_cfg engine_to_mem;
+};
+
+#endif
diff --git a/arch/arm/mach-ux500/include/mach/db5500-regs.h b/arch/arm/mach-ux500/include/mach/db5500-regs.h
deleted file mode 100644
index 8e714bcb099..00000000000
--- a/arch/arm/mach-ux500/include/mach/db5500-regs.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_DB5500_REGS_H
-#define __MACH_DB5500_REGS_H
-
-#define U5500_PER1_BASE 0xA0020000
-#define U5500_PER2_BASE 0xA0010000
-#define U5500_PER3_BASE 0x80140000
-#define U5500_PER4_BASE 0x80150000
-#define U5500_PER5_BASE 0x80100000
-#define U5500_PER6_BASE 0x80120000
-
-#define U5500_GIC_DIST_BASE 0xA0411000
-#define U5500_GIC_CPU_BASE 0xA0410100
-#define U5500_DMA_BASE 0x90030000
-#define U5500_STM_BASE 0x90020000
-#define U5500_STM_REG_BASE (U5500_STM_BASE + 0xF000)
-#define U5500_MCDE_BASE 0xA0400000
-#define U5500_MODEM_BASE 0xB0000000
-#define U5500_L2CC_BASE 0xA0412000
-#define U5500_SCU_BASE 0xA0410000
-#define U5500_DSI1_BASE 0xA0401000
-#define U5500_DSI2_BASE 0xA0402000
-#define U5500_SIA_BASE 0xA0100000
-#define U5500_SVA_BASE 0x80200000
-#define U5500_HSEM_BASE 0xA0000000
-#define U5500_NAND0_BASE 0x60000000
-#define U5500_NAND1_BASE 0x70000000
-#define U5500_TWD_BASE 0xa0410600
-#define U5500_ICN_BASE 0xA0040000
-#define U5500_B2R2_BASE 0xa0200000
-#define U5500_BOOT_ROM_BASE 0x90000000
-
-#define U5500_FSMC_BASE (U5500_PER1_BASE + 0x0000)
-#define U5500_SDI0_BASE (U5500_PER1_BASE + 0x1000)
-#define U5500_SDI2_BASE (U5500_PER1_BASE + 0x2000)
-#define U5500_UART0_BASE (U5500_PER1_BASE + 0x3000)
-#define U5500_I2C1_BASE (U5500_PER1_BASE + 0x4000)
-#define U5500_MSP0_BASE (U5500_PER1_BASE + 0x5000)
-#define U5500_GPIO0_BASE (U5500_PER1_BASE + 0xE000)
-#define U5500_CLKRST1_BASE (U5500_PER1_BASE + 0xF000)
-
-#define U5500_USBOTG_BASE (U5500_PER2_BASE + 0x0000)
-#define U5500_GPIO1_BASE (U5500_PER2_BASE + 0xE000)
-#define U5500_CLKRST2_BASE (U5500_PER2_BASE + 0xF000)
-
-#define U5500_KEYPAD_BASE (U5500_PER3_BASE + 0x0000)
-#define U5500_PWM_BASE (U5500_PER3_BASE + 0x1000)
-#define U5500_GPIO3_BASE (U5500_PER3_BASE + 0xE000)
-#define U5500_CLKRST3_BASE (U5500_PER3_BASE + 0xF000)
-
-#define U5500_BACKUPRAM0_BASE (U5500_PER4_BASE + 0x0000)
-#define U5500_BACKUPRAM1_BASE (U5500_PER4_BASE + 0x1000)
-#define U5500_RTT0_BASE (U5500_PER4_BASE + 0x2000)
-#define U5500_RTT1_BASE (U5500_PER4_BASE + 0x3000)
-#define U5500_RTC_BASE (U5500_PER4_BASE + 0x4000)
-#define U5500_SCR_BASE (U5500_PER4_BASE + 0x5000)
-#define U5500_DMC_BASE (U5500_PER4_BASE + 0x6000)
-#define U5500_PRCMU_BASE (U5500_PER4_BASE + 0x7000)
-#define U5500_PRCMU_TIMER_3_BASE (U5500_PER4_BASE + 0x07338)
-#define U5500_PRCMU_TIMER_4_BASE (U5500_PER4_BASE + 0x07450)
-#define U5500_MSP1_BASE (U5500_PER4_BASE + 0x9000)
-#define U5500_GPIO2_BASE (U5500_PER4_BASE + 0xA000)
-#define U5500_MTIMER_BASE (U5500_PER4_BASE + 0xC000)
-#define U5500_CDETECT_BASE (U5500_PER4_BASE + 0xF000)
-#define U5500_PRCMU_TCDM_BASE (U5500_PER4_BASE + 0x18000)
-#define U5500_PRCMU_TCPM_BASE (U5500_PER4_BASE + 0x10000)
-#define U5500_TPIU_BASE (U5500_PER4_BASE + 0x50000)
-
-#define U5500_SPI0_BASE (U5500_PER5_BASE + 0x0000)
-#define U5500_SPI1_BASE (U5500_PER5_BASE + 0x1000)
-#define U5500_SPI2_BASE (U5500_PER5_BASE + 0x2000)
-#define U5500_SPI3_BASE (U5500_PER5_BASE + 0x3000)
-#define U5500_UART1_BASE (U5500_PER5_BASE + 0x4000)
-#define U5500_UART2_BASE (U5500_PER5_BASE + 0x5000)
-#define U5500_UART3_BASE (U5500_PER5_BASE + 0x6000)
-#define U5500_SDI1_BASE (U5500_PER5_BASE + 0x7000)
-#define U5500_SDI3_BASE (U5500_PER5_BASE + 0x8000)
-#define U5500_SDI4_BASE (U5500_PER5_BASE + 0x9000)
-#define U5500_I2C2_BASE (U5500_PER5_BASE + 0xA000)
-#define U5500_I2C3_BASE (U5500_PER5_BASE + 0xB000)
-#define U5500_MSP2_BASE (U5500_PER5_BASE + 0xC000)
-#define U5500_IRDA_BASE (U5500_PER5_BASE + 0xD000)
-#define U5500_IRRC_BASE (U5500_PER5_BASE + 0x10000)
-#define U5500_GPIO4_BASE (U5500_PER5_BASE + 0x1E000)
-#define U5500_CLKRST5_BASE (U5500_PER5_BASE + 0x1F000)
-
-#define U5500_RNG_BASE (U5500_PER6_BASE + 0x0000)
-#define U5500_HASH0_BASE (U5500_PER6_BASE + 0x1000)
-#define U5500_HASH1_BASE (U5500_PER6_BASE + 0x2000)
-#define U5500_PKA_BASE (U5500_PER6_BASE + 0x4000)
-#define U5500_PKAM_BASE (U5500_PER6_BASE + 0x5100)
-#define U5500_MTU0_BASE (U5500_PER6_BASE + 0x6000)
-#define U5500_MTU1_BASE (U5500_PER6_BASE + 0x7000)
-#define U5500_CR_BASE (U5500_PER6_BASE + 0x8000)
-#define U5500_CRYP0_BASE (U5500_PER6_BASE + 0xA000)
-#define U5500_CRYP1_BASE (U5500_PER6_BASE + 0xB000)
-#define U5500_CLKRST6_BASE (U5500_PER6_BASE + 0xF000)
-
-#define U5500_GPIOBANK0_BASE U5500_GPIO0_BASE
-#define U5500_GPIOBANK1_BASE (U5500_GPIO0_BASE + 0x80)
-#define U5500_GPIOBANK2_BASE U5500_GPIO1_BASE
-#define U5500_GPIOBANK3_BASE U5500_GPIO2_BASE
-#define U5500_GPIOBANK4_BASE U5500_GPIO3_BASE
-#define U5500_GPIOBANK5_BASE U5500_GPIO4_BASE
-#define U5500_GPIOBANK6_BASE (U5500_GPIO4_BASE + 0x80)
-#define U5500_GPIOBANK7_BASE (U5500_GPIO4_BASE + 0x100)
-
-#define U5500_MBOX_BASE (U5500_MODEM_BASE + 0xFFD1000)
-#define U5500_MBOX0_PEER_START (U5500_MBOX_BASE + 0x40)
-#define U5500_MBOX0_PEER_END (U5500_MBOX_BASE + 0x5F)
-#define U5500_MBOX0_LOCAL_START (U5500_MBOX_BASE + 0x60)
-#define U5500_MBOX0_LOCAL_END (U5500_MBOX_BASE + 0x7F)
-#define U5500_MBOX1_PEER_START (U5500_MBOX_BASE + 0x80)
-#define U5500_MBOX1_PEER_END (U5500_MBOX_BASE + 0x9F)
-#define U5500_MBOX1_LOCAL_START (U5500_MBOX_BASE + 0xA0)
-#define U5500_MBOX1_LOCAL_END (U5500_MBOX_BASE + 0xBF)
-#define U5500_MBOX2_PEER_START (U5500_MBOX_BASE + 0x00)
-#define U5500_MBOX2_PEER_END (U5500_MBOX_BASE + 0x1F)
-#define U5500_MBOX2_LOCAL_START (U5500_MBOX_BASE + 0x20)
-#define U5500_MBOX2_LOCAL_END (U5500_MBOX_BASE + 0x3F)
-
-#define U5500_ACCCON_BASE_SEC (0xBFFF0000)
-#define U5500_ACCCON_BASE (0xBFFF1000)
-#define U5500_ACCCON_CPUVEC_RESET_ADDR_OFFSET (0x00000020)
-#define U5500_ACCCON_ACC_CPU_CTRL_OFFSET (0x000000BC)
-#define U5500_INTCON_MBOX1_INT_RESET_ADDR (0xBFFD31A4)
-
-#define U5500_ESRAM_BASE 0x40000000
-#define U5500_ESRAM_DMA_LCPA_OFFSET 0x10000
-#define U5500_DMA_LCPA_BASE (U5500_ESRAM_BASE + U5500_ESRAM_DMA_LCPA_OFFSET)
-
-#define U5500_MCDE_SIZE 0x1000
-#define U5500_DSI_LINK_SIZE 0x1000
-#define U5500_DSI_LINK_COUNT 0x2
-#define U5500_DSI_LINK1_BASE (U5500_MCDE_BASE + U5500_MCDE_SIZE)
-#define U5500_DSI_LINK2_BASE (U5500_DSI_LINK1_BASE + U5500_DSI_LINK_SIZE)
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 9ec20b96d8f..1530d493879 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -41,6 +41,10 @@
/* ASIC ID is at 0xbf4 offset within this region */
#define U8500_ASIC_ID_BASE 0x9001D000
+#define U9540_BOOT_ROM_BASE 0xFFFE0000
+/* ASIC ID is at 0xbf4 offset within this region */
+#define U9540_ASIC_ID_BASE 0xFFFFD000
+
#define U8500_PER6_BASE 0xa03c0000
#define U8500_PER7_BASE 0xa03d0000
#define U8500_PER5_BASE 0xa03e0000
@@ -96,7 +100,9 @@
#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000)
#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
+#define U9540_DMC1_BASE (U8500_PER4_BASE + 0x0A000)
#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
+#define U9540_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x6A000)
#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000)
#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)
#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
index 8d74d927d4e..67035223334 100644
--- a/arch/arm/mach-ux500/include/mach/debug-macro.S
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -20,10 +20,6 @@
* built, so that there's some hint during the build that something is wrong.
*/
-#ifdef CONFIG_UX500_SOC_DB5500
-#define __UX500_UART(n) U5500_UART##n##_BASE
-#endif
-
#ifdef CONFIG_UX500_SOC_DB8500
#define __UX500_UART(n) U8500_UART##n##_BASE
#endif
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
index 5f6cb71fc62..cbc6f1e4104 100644
--- a/arch/arm/mach-ux500/include/mach/devices.h
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -10,11 +10,13 @@
struct platform_device;
struct amba_device;
-extern struct platform_device u5500_gpio_devs[];
extern struct platform_device u8500_gpio_devs[];
extern struct amba_device ux500_pl031_device;
+extern struct platform_device ux500_hash1_device;
+extern struct platform_device ux500_cryp1_device;
+
extern struct platform_device u8500_dma40_device;
extern struct platform_device ux500_ske_keypad_device;
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index f84698936d3..28d16e744bf 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -17,6 +17,8 @@
*/
#define U8500_IO_VIRTUAL 0xf0000000
#define U8500_IO_PHYSICAL 0xa0000000
+/* This is where we map in the ROM to check ASIC IDs */
+#define UX500_VIRT_ROM 0xf0000000
/* This macro is used in assembly, so no cast */
#define IO_ADDRESS(x) \
@@ -24,13 +26,16 @@
/* typesafe io address */
#define __io_address(n) IOMEM(IO_ADDRESS(n))
+
/* Used by some plat-nomadik code */
#define io_p2v(n) __io_address(n)
#include <mach/db8500-regs.h>
-#include <mach/db5500-regs.h>
#define MSP_TX_RX_REG_OFFSET 0
+#define CRYP1_RX_REG_OFFSET 0x10
+#define CRYP1_TX_REG_OFFSET 0x8
+#define HASH1_TX_REG_OFFSET 0x4
#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/include/mach/id.h
index 833d6a6edc9..c6e2db9e9e5 100644
--- a/arch/arm/mach-ux500/include/mach/id.h
+++ b/arch/arm/mach-ux500/include/mach/id.h
@@ -41,6 +41,16 @@ static inline bool __attribute_const__ cpu_is_u8500(void)
return dbx500_partnumber() == 0x8500;
}
+static inline bool __attribute_const__ cpu_is_u9540(void)
+{
+ return dbx500_partnumber() == 0x9540;
+}
+
+static inline bool cpu_is_u8500_family(void)
+{
+ return cpu_is_u8500() || cpu_is_u9540();
+}
+
static inline bool __attribute_const__ cpu_is_u5500(void)
{
return dbx500_partnumber() == 0x5500;
@@ -111,7 +121,12 @@ static inline bool cpu_is_u8500v21(void)
static inline bool cpu_is_u8500v20_or_later(void)
{
- return cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11();
+ /*
+ * U9540 has so much in common with U8500 that is is considered a
+ * U8500 variant.
+ */
+ return cpu_is_u9540() ||
+ (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11());
}
static inline bool ux500_is_svp(void)
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h b/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h
deleted file mode 100644
index 29d972c7717..00000000000
--- a/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_IRQS_BOARD_U5500_H
-#define __MACH_IRQS_BOARD_U5500_H
-
-#define AB5500_NR_IRQS 5
-#define IRQ_AB5500_BASE IRQ_BOARD_START
-#define IRQ_AB5500_END (IRQ_AB5500_BASE + AB5500_NR_IRQS)
-
-#define U5500_IRQ_END IRQ_AB5500_END
-
-#if IRQ_BOARD_END < U5500_IRQ_END
-#undef IRQ_BOARD_END
-#define IRQ_BOARD_END U5500_IRQ_END
-#endif
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
deleted file mode 100644
index 77239776a6f..00000000000
--- a/arch/arm/mach-ux500/include/mach/irqs-db5500.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Rabin Vincent <rabin.vincent@stericsson.com>
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_IRQS_DB5500_H
-#define __MACH_IRQS_DB5500_H
-
-#define IRQ_DB5500_MTU0 (IRQ_SHPI_START + 4)
-#define IRQ_DB5500_SPI2 (IRQ_SHPI_START + 6)
-#define IRQ_DB5500_PMU0 (IRQ_SHPI_START + 7)
-#define IRQ_DB5500_SPI0 (IRQ_SHPI_START + 8)
-#define IRQ_DB5500_RTT (IRQ_SHPI_START + 9)
-#define IRQ_DB5500_PKA (IRQ_SHPI_START + 10)
-#define IRQ_DB5500_UART0 (IRQ_SHPI_START + 11)
-#define IRQ_DB5500_I2C3 (IRQ_SHPI_START + 12)
-#define IRQ_DB5500_L2CC (IRQ_SHPI_START + 13)
-#define IRQ_DB5500_MSP0 (IRQ_SHPI_START + 14)
-#define IRQ_DB5500_CRYP1 (IRQ_SHPI_START + 15)
-#define IRQ_DB5500_PMU1 (IRQ_SHPI_START + 16)
-#define IRQ_DB5500_MTU1 (IRQ_SHPI_START + 17)
-#define IRQ_DB5500_RTC (IRQ_SHPI_START + 18)
-#define IRQ_DB5500_UART1 (IRQ_SHPI_START + 19)
-#define IRQ_DB5500_USB_WAKEUP (IRQ_SHPI_START + 20)
-#define IRQ_DB5500_I2C0 (IRQ_SHPI_START + 21)
-#define IRQ_DB5500_I2C1 (IRQ_SHPI_START + 22)
-#define IRQ_DB5500_USBOTG (IRQ_SHPI_START + 23)
-#define IRQ_DB5500_DMA_SECURE (IRQ_SHPI_START + 24)
-#define IRQ_DB5500_DMA (IRQ_SHPI_START + 25)
-#define IRQ_DB5500_UART2 (IRQ_SHPI_START + 26)
-#define IRQ_DB5500_ICN_PMU1 (IRQ_SHPI_START + 27)
-#define IRQ_DB5500_ICN_PMU2 (IRQ_SHPI_START + 28)
-#define IRQ_DB5500_UART3 (IRQ_SHPI_START + 29)
-#define IRQ_DB5500_SPI3 (IRQ_SHPI_START + 30)
-#define IRQ_DB5500_SDMMC4 (IRQ_SHPI_START + 31)
-#define IRQ_DB5500_IRRC (IRQ_SHPI_START + 33)
-#define IRQ_DB5500_IRDA_FT (IRQ_SHPI_START + 34)
-#define IRQ_DB5500_IRDA_SD (IRQ_SHPI_START + 35)
-#define IRQ_DB5500_IRDA_FI (IRQ_SHPI_START + 36)
-#define IRQ_DB5500_IRDA_FD (IRQ_SHPI_START + 37)
-#define IRQ_DB5500_FSMC_CODEREADY (IRQ_SHPI_START + 38)
-#define IRQ_DB5500_FSMC_NANDWAIT (IRQ_SHPI_START + 39)
-#define IRQ_DB5500_AB5500 (IRQ_SHPI_START + 40)
-#define IRQ_DB5500_SDMMC2 (IRQ_SHPI_START + 41)
-#define IRQ_DB5500_SIA (IRQ_SHPI_START + 42)
-#define IRQ_DB5500_SIA2 (IRQ_SHPI_START + 43)
-#define IRQ_DB5500_HVA (IRQ_SHPI_START + 44)
-#define IRQ_DB5500_HVA2 (IRQ_SHPI_START + 45)
-#define IRQ_DB5500_PRCMU0 (IRQ_SHPI_START + 46)
-#define IRQ_DB5500_PRCMU1 (IRQ_SHPI_START + 47)
-#define IRQ_DB5500_DISP (IRQ_SHPI_START + 48)
-#define IRQ_DB5500_SDMMC1 (IRQ_SHPI_START + 50)
-#define IRQ_DB5500_MSP1 (IRQ_SHPI_START + 52)
-#define IRQ_DB5500_KBD (IRQ_SHPI_START + 53)
-#define IRQ_DB5500_I2C2 (IRQ_SHPI_START + 55)
-#define IRQ_DB5500_B2R2 (IRQ_SHPI_START + 56)
-#define IRQ_DB5500_CRYP0 (IRQ_SHPI_START + 57)
-#define IRQ_DB5500_SDMMC3 (IRQ_SHPI_START + 59)
-#define IRQ_DB5500_SDMMC0 (IRQ_SHPI_START + 60)
-#define IRQ_DB5500_HSEM (IRQ_SHPI_START + 61)
-#define IRQ_DB5500_SBAG (IRQ_SHPI_START + 63)
-#define IRQ_DB5500_MODEM (IRQ_SHPI_START + 65)
-#define IRQ_DB5500_SPI1 (IRQ_SHPI_START + 96)
-#define IRQ_DB5500_MSP2 (IRQ_SHPI_START + 98)
-#define IRQ_DB5500_SRPTIMER (IRQ_SHPI_START + 101)
-#define IRQ_DB5500_CTI0 (IRQ_SHPI_START + 108)
-#define IRQ_DB5500_CTI1 (IRQ_SHPI_START + 109)
-#define IRQ_DB5500_ICN_ERR (IRQ_SHPI_START + 110)
-#define IRQ_DB5500_MALI_PPMMU (IRQ_SHPI_START + 112)
-#define IRQ_DB5500_MALI_PP (IRQ_SHPI_START + 113)
-#define IRQ_DB5500_MALI_GPMMU (IRQ_SHPI_START + 114)
-#define IRQ_DB5500_MALI_GP (IRQ_SHPI_START + 115)
-#define IRQ_DB5500_MALI (IRQ_SHPI_START + 116)
-#define IRQ_DB5500_PRCMU_SEM (IRQ_SHPI_START + 118)
-#define IRQ_DB5500_GPIO0 (IRQ_SHPI_START + 119)
-#define IRQ_DB5500_GPIO1 (IRQ_SHPI_START + 120)
-#define IRQ_DB5500_GPIO2 (IRQ_SHPI_START + 121)
-#define IRQ_DB5500_GPIO3 (IRQ_SHPI_START + 122)
-#define IRQ_DB5500_GPIO4 (IRQ_SHPI_START + 123)
-#define IRQ_DB5500_GPIO5 (IRQ_SHPI_START + 124)
-#define IRQ_DB5500_GPIO6 (IRQ_SHPI_START + 125)
-#define IRQ_DB5500_GPIO7 (IRQ_SHPI_START + 126)
-
-#ifdef CONFIG_UX500_SOC_DB5500
-
-/*
- * After the GPIO ones we reserve a range of IRQ:s in which virtual
- * IRQ:s representing modem IRQ:s can be allocated
- */
-#define IRQ_MODEM_EVENTS_BASE IRQ_SOC_START
-#define IRQ_MODEM_EVENTS_NBR 72
-#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)
-
-/* List of virtual IRQ:s that are allocated from the range above */
-#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43)
-#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45)
-#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41)
-
-/*
- * We may have several SoCs, but only one will run at a
- * time, so the one with most IRQs will bump this ahead,
- * but the IRQ_SOC_START remains the same for either SoC.
- */
-#if IRQ_SOC_END < IRQ_MODEM_EVENTS_END
-#undef IRQ_SOC_END
-#define IRQ_SOC_END IRQ_MODEM_EVENTS_END
-#endif
-
-#endif /* CONFIG_UX500_SOC_DB5500 */
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index c23a6b5f0c4..e8928548b6a 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -24,7 +24,7 @@
*/
#define IRQ_MTU0 (IRQ_SHPI_START + 4)
-#define DBX500_NR_INTERNAL_IRQS 160
+#define DBX500_NR_INTERNAL_IRQS 166
/* After chip-specific IRQ numbers we have the GPIO ones */
#define NOMADIK_NR_GPIO 288
@@ -36,7 +36,6 @@
/* This will be overridden by SoC-specific irq headers */
#define IRQ_SOC_END IRQ_SOC_START
-#include <mach/irqs-db5500.h>
#include <mach/irqs-db8500.h>
#define IRQ_BOARD_START IRQ_SOC_END
@@ -47,10 +46,6 @@
#include <mach/irqs-board-mop500.h>
#endif
-#ifdef CONFIG_MACH_U5500
-#include <mach/irqs-board-u5500.h>
-#endif
-
#define NR_IRQS IRQ_BOARD_END
#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ux500/include/mach/mbox-db5500.h b/arch/arm/mach-ux500/include/mach/mbox-db5500.h
deleted file mode 100644
index 7f9da4d2fbd..00000000000
--- a/arch/arm/mach-ux500/include/mach/mbox-db5500.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- * Author: Stefan Nilsson <stefan.xk.nilsson@stericsson.com> for ST-Ericsson.
- * Author: Martin Persson <martin.persson@stericsson.com> for ST-Ericsson.
- * License terms: GNU General Public License (GPL), version 2.
- */
-
-#ifndef __INC_STE_MBOX_H
-#define __INC_STE_MBOX_H
-
-#define MBOX_BUF_SIZE 16
-#define MBOX_NAME_SIZE 8
-
-/**
- * mbox_recv_cb_t - Definition of the mailbox callback.
- * @mbox_msg: The mailbox message.
- * @priv: The clients private data as specified in the call to mbox_setup.
- *
- * This function will be called upon reception of new mailbox messages.
- */
-typedef void mbox_recv_cb_t (u32 mbox_msg, void *priv);
-
-/**
- * struct mbox - Mailbox instance struct
- * @list: Linked list head.
- * @pdev: Pointer to device struct.
- * @cb: Callback function. Will be called
- * when new data is received.
- * @client_data: Clients private data. Will be sent back
- * in the callback function.
- * @virtbase_peer: Virtual address for outgoing mailbox.
- * @virtbase_local: Virtual address for incoming mailbox.
- * @buffer: Then internal queue for outgoing messages.
- * @name: Name of this mailbox.
- * @buffer_available: Completion variable to achieve "blocking send".
- * This variable will be signaled when there is
- * internal buffer space available.
- * @client_blocked: To keep track if any client is currently
- * blocked.
- * @lock: Spinlock to protect this mailbox instance.
- * @write_index: Index in internal buffer to write to.
- * @read_index: Index in internal buffer to read from.
- * @allocated: Indicates whether this particular mailbox
- * id has been allocated by someone.
- */
-struct mbox {
- struct list_head list;
- struct platform_device *pdev;
- mbox_recv_cb_t *cb;
- void *client_data;
- void __iomem *virtbase_peer;
- void __iomem *virtbase_local;
- u32 buffer[MBOX_BUF_SIZE];
- char name[MBOX_NAME_SIZE];
- struct completion buffer_available;
- u8 client_blocked;
- spinlock_t lock;
- u8 write_index;
- u8 read_index;
- bool allocated;
-};
-
-/**
- * mbox_setup - Set up a mailbox and return its instance.
- * @mbox_id: The ID number of the mailbox. 0 or 1 for modem CPU,
- * 2 for modem DSP.
- * @mbox_cb: Pointer to the callback function to be called when a new message
- * is received.
- * @priv: Client user data which will be returned in the callback.
- *
- * Returns a mailbox instance to be specified in subsequent calls to mbox_send.
- */
-struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv);
-
-/**
- * mbox_send - Send a mailbox message.
- * @mbox: Mailbox instance (returned by mbox_setup)
- * @mbox_msg: The mailbox message to send.
- * @block: Specifies whether this call will block until send is possible,
- * or return an error if the mailbox buffer is full.
- *
- * Returns 0 on success or a negative error code on error. -ENOMEM indicates
- * that the internal buffer is full and you have to try again later (or
- * specify "block" in order to block until send is possible).
- */
-int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block);
-
-#endif /*INC_STE_MBOX_H*/
diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h
new file mode 100644
index 00000000000..798be19129e
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/msp.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __MSP_H
+#define __MSP_H
+
+#include <plat/ste_dma40.h>
+
+enum msp_i2s_id {
+ MSP_I2S_0 = 0,
+ MSP_I2S_1,
+ MSP_I2S_2,
+ MSP_I2S_3,
+};
+
+/* Platform data structure for a MSP I2S-device */
+struct msp_i2s_platform_data {
+ enum msp_i2s_id id;
+ struct stedma40_chan_cfg *msp_i2s_dma_rx;
+ struct stedma40_chan_cfg *msp_i2s_dma_tx;
+ int (*msp_i2s_init) (void);
+ int (*msp_i2s_exit) (void);
+};
+
+#endif
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index 3dc00ffa7bf..8b7ed82a286 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -15,17 +15,12 @@
#include <linux/init.h>
void __init ux500_map_io(void);
-extern void __init u5500_map_io(void);
extern void __init u8500_map_io(void);
-extern struct device * __init u5500_init_devices(void);
extern struct device * __init u8500_init_devices(void);
extern void __init ux500_init_irq(void);
-
-extern void __init u5500_sdi_init(struct device *parent);
-
-extern void __init db5500_dma_init(struct device *parent);
+extern void __init ux500_init_late(void);
extern struct device *ux500_soc_device_init(const char *soc_id);
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
index 6fb3c4b0105..34775baadae 100644
--- a/arch/arm/mach-ux500/include/mach/uncompress.h
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -50,11 +50,8 @@ static void flush(void)
static inline void arch_decomp_setup(void)
{
- /* Check in run time if we run on an U8500 or U5500 */
- if (machine_is_u5500())
- ux500_uart_base = U5500_UART0_BASE;
- else
- ux500_uart_base = U8500_UART2_BASE;
+ /* Use machine_is_foo() macro if you need to switch base someday */
+ ux500_uart_base = U8500_UART2_BASE;
}
#define arch_decomp_wdog() /* nothing to do here */