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authorAnton Arapov <anton@redhat.com>2012-08-07 11:21:50 +0200
committerAnton Arapov <anton@redhat.com>2012-08-07 12:52:25 +0200
commit1d44b6f3fcf6058fb7c960b7558766967e8028f7 (patch)
tree53d88547c973ba048d233091a3f91f3173ad01df /arch/arm/mach-lpc32xx
parentd91eda5d7b0383e6a0c83e0146ff141ff3b1355b (diff)
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fedora kernel: 222b075b3ff0d9e88aa9353e3c80667756ed7361v3.5.0-4
Signed-off-by: Anton Arapov <anton@redhat.com>
Diffstat (limited to 'arch/arm/mach-lpc32xx')
-rw-r--r--arch/arm/mach-lpc32xx/Kconfig26
-rw-r--r--arch/arm/mach-lpc32xx/clock.c77
-rw-r--r--arch/arm/mach-lpc32xx/common.c188
-rw-r--r--arch/arm/mach-lpc32xx/common.h14
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/gpio.h9
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/i2c.h63
-rw-r--r--arch/arm/mach-lpc32xx/irq.c78
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c149
8 files changed, 166 insertions, 438 deletions
diff --git a/arch/arm/mach-lpc32xx/Kconfig b/arch/arm/mach-lpc32xx/Kconfig
index 75946ac89ee..e0b3eee8383 100644
--- a/arch/arm/mach-lpc32xx/Kconfig
+++ b/arch/arm/mach-lpc32xx/Kconfig
@@ -29,30 +29,4 @@ config ARCH_LPC32XX_UART6_SELECT
endmenu
-menu "LPC32XX chip components"
-
-config ARCH_LPC32XX_IRAM_FOR_NET
- bool "Use IRAM for network buffers"
- default y
- help
- Say Y here to use the LPC internal fast IRAM (i.e. 256KB SRAM) as
- network buffer. If the total combined required buffer sizes is
- larger than the size of IRAM, then SDRAM will be used instead.
-
- This can be enabled safely if the IRAM is not intended for other
- uses.
-
-config ARCH_LPC32XX_MII_SUPPORT
- bool "Check to enable MII support or leave disabled for RMII support"
- help
- Say Y here to enable MII support, or N for RMII support. Regardless of
- which support is selected, the ethernet interface driver needs to be
- selected in the device driver networking section.
-
- The PHY3250 reference board uses RMII, so users of this board should
- say N.
-
-endmenu
-
endif
-
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 2fc24ca1205..f6a3ffec1f4 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -1095,49 +1095,42 @@ struct clk *clk_get_parent(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_parent);
-#define _REGISTER_CLOCK(d, n, c) \
- { \
- .dev_id = (d), \
- .con_id = (n), \
- .clk = &(c), \
- },
-
static struct clk_lookup lookups[] = {
- _REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)
- _REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)
- _REGISTER_CLOCK(NULL, "osc_main", osc_main)
- _REGISTER_CLOCK(NULL, "sys_ck", clk_sys)
- _REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)
- _REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)
- _REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)
- _REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)
- _REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)
- _REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)
- _REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)
- _REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)
- _REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)
- _REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)
- _REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)
- _REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)
- _REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)
- _REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)
- _REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)
- _REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)
- _REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)
- _REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)
- _REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)
- _REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
- _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
- _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
- _REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
- _REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)
- _REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)
- _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
- _REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)
- _REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)
- _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
- _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
- _REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
+ CLKDEV_INIT(NULL, "osc_32KHz", &osc_32KHz),
+ CLKDEV_INIT(NULL, "osc_pll397", &osc_pll397),
+ CLKDEV_INIT(NULL, "osc_main", &osc_main),
+ CLKDEV_INIT(NULL, "sys_ck", &clk_sys),
+ CLKDEV_INIT(NULL, "arm_pll_ck", &clk_armpll),
+ CLKDEV_INIT(NULL, "ck_pll5", &clk_usbpll),
+ CLKDEV_INIT(NULL, "hclk_ck", &clk_hclk),
+ CLKDEV_INIT(NULL, "pclk_ck", &clk_pclk),
+ CLKDEV_INIT(NULL, "timer0_ck", &clk_timer0),
+ CLKDEV_INIT(NULL, "timer1_ck", &clk_timer1),
+ CLKDEV_INIT(NULL, "timer2_ck", &clk_timer2),
+ CLKDEV_INIT(NULL, "timer3_ck", &clk_timer3),
+ CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
+ CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
+ CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
+ CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
+ CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
+ CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
+ CLKDEV_INIT(NULL, "uart6_ck", &clk_uart6),
+ CLKDEV_INIT("400a0000.i2c", NULL, &clk_i2c0),
+ CLKDEV_INIT("400a8000.i2c", NULL, &clk_i2c1),
+ CLKDEV_INIT("31020300.i2c", NULL, &clk_i2c2),
+ CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),
+ CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),
+ CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan),
+ CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand),
+ CLKDEV_INIT("40048000.adc", NULL, &clk_adc),
+ CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0),
+ CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1),
+ CLKDEV_INIT("40048000.tsc", NULL, &clk_tsc),
+ CLKDEV_INIT("20098000.sd", NULL, &clk_mmc),
+ CLKDEV_INIT("31060000.ethernet", NULL, &clk_net),
+ CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
+ CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd),
+ CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
};
static int __init clk_init(void)
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index bbbf063a74c..5c96057b6d7 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -27,186 +27,11 @@
#include <asm/mach/map.h>
-#include <mach/i2c.h>
#include <mach/hardware.h>
#include <mach/platform.h>
#include "common.h"
/*
- * Watchdog timer
- */
-static struct resource watchdog_resources[] = {
- [0] = {
- .start = LPC32XX_WDTIM_BASE,
- .end = LPC32XX_WDTIM_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device lpc32xx_watchdog_device = {
- .name = "pnx4008-watchdog",
- .id = -1,
- .num_resources = ARRAY_SIZE(watchdog_resources),
- .resource = watchdog_resources,
-};
-
-/*
- * I2C busses
- */
-static struct i2c_pnx_data i2c0_data = {
- .name = I2C_CHIP_NAME "1",
- .base = LPC32XX_I2C1_BASE,
- .irq = IRQ_LPC32XX_I2C_1,
-};
-
-static struct i2c_pnx_data i2c1_data = {
- .name = I2C_CHIP_NAME "2",
- .base = LPC32XX_I2C2_BASE,
- .irq = IRQ_LPC32XX_I2C_2,
-};
-
-static struct i2c_pnx_data i2c2_data = {
- .name = "USB-I2C",
- .base = LPC32XX_OTG_I2C_BASE,
- .irq = IRQ_LPC32XX_USB_I2C,
-};
-
-struct platform_device lpc32xx_i2c0_device = {
- .name = "pnx-i2c",
- .id = 0,
- .dev = {
- .platform_data = &i2c0_data,
- },
-};
-
-struct platform_device lpc32xx_i2c1_device = {
- .name = "pnx-i2c",
- .id = 1,
- .dev = {
- .platform_data = &i2c1_data,
- },
-};
-
-struct platform_device lpc32xx_i2c2_device = {
- .name = "pnx-i2c",
- .id = 2,
- .dev = {
- .platform_data = &i2c2_data,
- },
-};
-
-/* TSC (Touch Screen Controller) */
-
-static struct resource lpc32xx_tsc_resources[] = {
- {
- .start = LPC32XX_ADC_BASE,
- .end = LPC32XX_ADC_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_LPC32XX_TS_IRQ,
- .end = IRQ_LPC32XX_TS_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device lpc32xx_tsc_device = {
- .name = "ts-lpc32xx",
- .id = -1,
- .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources),
- .resource = lpc32xx_tsc_resources,
-};
-
-/* RTC */
-
-static struct resource lpc32xx_rtc_resources[] = {
- {
- .start = LPC32XX_RTC_BASE,
- .end = LPC32XX_RTC_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },{
- .start = IRQ_LPC32XX_RTC,
- .end = IRQ_LPC32XX_RTC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device lpc32xx_rtc_device = {
- .name = "rtc-lpc32xx",
- .id = -1,
- .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources),
- .resource = lpc32xx_rtc_resources,
-};
-
-/*
- * ADC support
- */
-static struct resource adc_resources[] = {
- {
- .start = LPC32XX_ADC_BASE,
- .end = LPC32XX_ADC_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_LPC32XX_TS_IRQ,
- .end = IRQ_LPC32XX_TS_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device lpc32xx_adc_device = {
- .name = "lpc32xx-adc",
- .id = -1,
- .num_resources = ARRAY_SIZE(adc_resources),
- .resource = adc_resources,
-};
-
-/*
- * USB support
- */
-/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32) 0;
-static struct resource ohci_resources[] = {
- {
- .start = IO_ADDRESS(LPC32XX_USB_BASE),
- .end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1),
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_LPC32XX_USB_HOST,
- .flags = IORESOURCE_IRQ,
- },
-};
-struct platform_device lpc32xx_ohci_device = {
- .name = "usb-ohci",
- .id = -1,
- .dev = {
- .dma_mask = &ohci_dmamask,
- .coherent_dma_mask = 0xFFFFFFFF,
- },
- .num_resources = ARRAY_SIZE(ohci_resources),
- .resource = ohci_resources,
-};
-
-/*
- * Network Support
- */
-static struct resource net_resources[] = {
- [0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K),
- [1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K),
- [2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET),
-};
-
-static u64 lpc32xx_mac_dma_mask = 0xffffffffUL;
-struct platform_device lpc32xx_net_device = {
- .name = "lpc-eth",
- .id = 0,
- .dev = {
- .dma_mask = &lpc32xx_mac_dma_mask,
- .coherent_dma_mask = 0xffffffffUL,
- },
- .num_resources = ARRAY_SIZE(net_resources),
- .resource = net_resources,
-};
-
-/*
* Returns the unique ID for the device
*/
void lpc32xx_get_uid(u32 devid[4])
@@ -398,3 +223,16 @@ void lpc23xx_restart(char mode, const char *cmd)
while (1)
;
}
+
+static int __init lpc32xx_display_uid(void)
+{
+ u32 uid[4];
+
+ lpc32xx_get_uid(uid);
+
+ printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
+ uid[3], uid[2], uid[1], uid[0]);
+
+ return 1;
+}
+arch_initcall(lpc32xx_display_uid);
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 68e45e8c948..afeac3b1fae 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -23,26 +23,12 @@
#include <linux/platform_device.h>
/*
- * Arch specific platform device structures
- */
-extern struct platform_device lpc32xx_watchdog_device;
-extern struct platform_device lpc32xx_i2c0_device;
-extern struct platform_device lpc32xx_i2c1_device;
-extern struct platform_device lpc32xx_i2c2_device;
-extern struct platform_device lpc32xx_tsc_device;
-extern struct platform_device lpc32xx_adc_device;
-extern struct platform_device lpc32xx_rtc_device;
-extern struct platform_device lpc32xx_ohci_device;
-extern struct platform_device lpc32xx_net_device;
-
-/*
* Other arch specific structures and functions
*/
extern struct sys_timer lpc32xx_timer;
extern void __init lpc32xx_init_irq(void);
extern void __init lpc32xx_map_io(void);
extern void __init lpc32xx_serial_init(void);
-extern void __init lpc32xx_gpio_init(void);
extern void lpc23xx_restart(char, const char *);
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio.h b/arch/arm/mach-lpc32xx/include/mach/gpio.h
index 40a8c178f10..2ba6ca412be 100644
--- a/arch/arm/mach-lpc32xx/include/mach/gpio.h
+++ b/arch/arm/mach-lpc32xx/include/mach/gpio.h
@@ -1 +1,8 @@
-/* empty */
+#ifndef __MACH_GPIO_H
+#define __MACH_GPIO_H
+
+#include "gpio-lpc32xx.h"
+
+#define ARCH_NR_GPIOS (LPC32XX_GPO_P3_GRP + LPC32XX_GPO_P3_MAX)
+
+#endif /* __MACH_GPIO_H */
diff --git a/arch/arm/mach-lpc32xx/include/mach/i2c.h b/arch/arm/mach-lpc32xx/include/mach/i2c.h
deleted file mode 100644
index 034dc9286bc..00000000000
--- a/arch/arm/mach-lpc32xx/include/mach/i2c.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * PNX4008-specific tweaks for I2C IP3204 block
- *
- * Author: Vitaly Wool <vwool@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARCH_I2C_H
-#define __ASM_ARCH_I2C_H
-
-enum {
- mstatus_tdi = 0x00000001,
- mstatus_afi = 0x00000002,
- mstatus_nai = 0x00000004,
- mstatus_drmi = 0x00000008,
- mstatus_active = 0x00000020,
- mstatus_scl = 0x00000040,
- mstatus_sda = 0x00000080,
- mstatus_rff = 0x00000100,
- mstatus_rfe = 0x00000200,
- mstatus_tff = 0x00000400,
- mstatus_tfe = 0x00000800,
-};
-
-enum {
- mcntrl_tdie = 0x00000001,
- mcntrl_afie = 0x00000002,
- mcntrl_naie = 0x00000004,
- mcntrl_drmie = 0x00000008,
- mcntrl_daie = 0x00000020,
- mcntrl_rffie = 0x00000040,
- mcntrl_tffie = 0x00000080,
- mcntrl_reset = 0x00000100,
- mcntrl_cdbmode = 0x00000400,
-};
-
-enum {
- rw_bit = 1 << 0,
- start_bit = 1 << 8,
- stop_bit = 1 << 9,
-};
-
-#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
-#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
-#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
-#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
-#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
-#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
-#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
-#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
-#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */
-#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */
-#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */
-#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */
-#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */
-
-#define I2C_CHIP_NAME "PNX4008-I2C"
-
-#endif /* __ASM_ARCH_I2C_H */
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index d080cb1123d..5b1cc35e6fb 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -22,6 +22,11 @@
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
#include <mach/irqs.h>
#include <mach/hardware.h>
@@ -44,6 +49,9 @@
#define SIC1_ATR_DEFAULT 0x00026000
#define SIC2_ATR_DEFAULT 0x00000000
+static struct irq_domain *lpc32xx_mic_domain;
+static struct device_node *lpc32xx_mic_np;
+
struct lpc32xx_event_group_regs {
void __iomem *enab_reg;
void __iomem *edge_reg;
@@ -203,7 +211,7 @@ static void lpc32xx_mask_irq(struct irq_data *d)
{
unsigned int reg, ctrl, mask;
- get_controller(d->irq, &ctrl, &mask);
+ get_controller(d->hwirq, &ctrl, &mask);
reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask;
__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
@@ -213,7 +221,7 @@ static void lpc32xx_unmask_irq(struct irq_data *d)
{
unsigned int reg, ctrl, mask;
- get_controller(d->irq, &ctrl, &mask);
+ get_controller(d->hwirq, &ctrl, &mask);
reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;
__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));
@@ -223,14 +231,14 @@ static void lpc32xx_ack_irq(struct irq_data *d)
{
unsigned int ctrl, mask;
- get_controller(d->irq, &ctrl, &mask);
+ get_controller(d->hwirq, &ctrl, &mask);
__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));
/* Also need to clear pending wake event */
- if (lpc32xx_events[d->irq].mask != 0)
- __raw_writel(lpc32xx_events[d->irq].mask,
- lpc32xx_events[d->irq].event_group->rawstat_reg);
+ if (lpc32xx_events[d->hwirq].mask != 0)
+ __raw_writel(lpc32xx_events[d->hwirq].mask,
+ lpc32xx_events[d->hwirq].event_group->rawstat_reg);
}
static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,
@@ -274,22 +282,22 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
switch (type) {
case IRQ_TYPE_EDGE_RISING:
/* Rising edge sensitive */
- __lpc32xx_set_irq_type(d->irq, 1, 1);
+ __lpc32xx_set_irq_type(d->hwirq, 1, 1);
break;
case IRQ_TYPE_EDGE_FALLING:
/* Falling edge sensitive */
- __lpc32xx_set_irq_type(d->irq, 0, 1);
+ __lpc32xx_set_irq_type(d->hwirq, 0, 1);
break;
case IRQ_TYPE_LEVEL_LOW:
/* Low level sensitive */
- __lpc32xx_set_irq_type(d->irq, 0, 0);
+ __lpc32xx_set_irq_type(d->hwirq, 0, 0);
break;
case IRQ_TYPE_LEVEL_HIGH:
/* High level sensitive */
- __lpc32xx_set_irq_type(d->irq, 1, 0);
+ __lpc32xx_set_irq_type(d->hwirq, 1, 0);
break;
/* Other modes are not supported */
@@ -298,7 +306,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
}
/* Ok to use the level handler for all types */
- irq_set_handler(d->irq, handle_level_irq);
+ irq_set_handler(d->hwirq, handle_level_irq);
return 0;
}
@@ -307,33 +315,33 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
{
unsigned long eventreg;
- if (lpc32xx_events[d->irq].mask != 0) {
- eventreg = __raw_readl(lpc32xx_events[d->irq].
+ if (lpc32xx_events[d->hwirq].mask != 0) {
+ eventreg = __raw_readl(lpc32xx_events[d->hwirq].
event_group->enab_reg);
if (state)
- eventreg |= lpc32xx_events[d->irq].mask;
+ eventreg |= lpc32xx_events[d->hwirq].mask;
else {
- eventreg &= ~lpc32xx_events[d->irq].mask;
+ eventreg &= ~lpc32xx_events[d->hwirq].mask;
/*
* When disabling the wakeup, clear the latched
* event
*/
- __raw_writel(lpc32xx_events[d->irq].mask,
- lpc32xx_events[d->irq].
+ __raw_writel(lpc32xx_events[d->hwirq].mask,
+ lpc32xx_events[d->hwirq].
event_group->rawstat_reg);
}
__raw_writel(eventreg,
- lpc32xx_events[d->irq].event_group->enab_reg);
+ lpc32xx_events[d->hwirq].event_group->enab_reg);
return 0;
}
/* Clear event */
- __raw_writel(lpc32xx_events[d->irq].mask,
- lpc32xx_events[d->irq].event_group->rawstat_reg);
+ __raw_writel(lpc32xx_events[d->hwirq].mask,
+ lpc32xx_events[d->hwirq].event_group->rawstat_reg);
return -ENODEV;
}
@@ -353,6 +361,7 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr,
}
static struct irq_chip lpc32xx_irq_chip = {
+ .name = "MIC",
.irq_ack = lpc32xx_ack_irq,
.irq_mask = lpc32xx_mask_irq,
.irq_unmask = lpc32xx_unmask_irq,
@@ -386,9 +395,23 @@ static void lpc32xx_sic2_handler(unsigned int irq, struct irq_desc *desc)
}
}
+static int __init __lpc32xx_mic_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ lpc32xx_mic_np = node;
+
+ return 0;
+}
+
+static const struct of_device_id mic_of_match[] __initconst = {
+ { .compatible = "nxp,lpc3220-mic", .data = __lpc32xx_mic_of_init },
+ { }
+};
+
void __init lpc32xx_init_irq(void)
{
unsigned int i;
+ int irq_base;
/* Setup MIC */
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));
@@ -448,4 +471,19 @@ void __init lpc32xx_init_irq(void)
LPC32XX_CLKPWR_PIN_RS);
__raw_writel(__raw_readl(LPC32XX_CLKPWR_INT_RS),
LPC32XX_CLKPWR_INT_RS);
+
+ of_irq_init(mic_of_match);
+
+ irq_base = irq_alloc_descs(-1, 0, NR_IRQS, 0);
+ if (irq_base < 0) {
+ pr_warn("Cannot allocate irq_descs, assuming pre-allocated\n");
+ irq_base = 0;
+ }
+
+ lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, NR_IRQS,
+ irq_base, 0,
+ &irq_domain_simple_ops,
+ NULL);
+ if (!lpc32xx_mic_domain)
+ panic("Unable to add MIC irq domain\n");
}
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 7f7401ec748..540106cdb9e 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -1,8 +1,9 @@
/*
- * arch/arm/mach-lpc32xx/phy3250.c
+ * Platform support for LPC32xx SoC
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
+ * Copyright (C) 2012 Roland Stigge <stigge@antcom.de>
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
@@ -25,11 +26,16 @@
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
-#include <linux/leds.h>
#include <linux/gpio.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <linux/amba/pl022.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/clk.h>
+#include <linux/amba/pl08x.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@@ -47,7 +53,6 @@
#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5)
#define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0)
#define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4)
-#define LED_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 1)
/*
* AMBA LCD controller
@@ -150,9 +155,6 @@ static struct clcd_board lpc32xx_clcd_data = {
.remove = lpc32xx_clcd_remove,
};
-static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
- LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
-
/*
* AMBA SSP (SPI)
*/
@@ -180,8 +182,11 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
.enable_dma = 0,
};
-static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
- LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
+static struct pl022_ssp_controller lpc32xx_ssp1_data = {
+ .bus_id = 1,
+ .num_chipselect = 1,
+ .enable_dma = 0,
+};
/* AT25 driver registration */
static int __init phy3250_spi_board_register(void)
@@ -221,73 +226,20 @@ static int __init phy3250_spi_board_register(void)
}
arch_initcall(phy3250_spi_board_register);
-static struct i2c_board_info __initdata phy3250_i2c_board_info[] = {
- {
- I2C_BOARD_INFO("pcf8563", 0x51),
- },
-};
-
-static struct gpio_led phy_leds[] = {
- {
- .name = "led0",
- .gpio = LED_GPIO,
- .active_low = 1,
- .default_trigger = "heartbeat",
- },
-};
-
-static struct gpio_led_platform_data led_data = {
- .leds = phy_leds,
- .num_leds = ARRAY_SIZE(phy_leds),
-};
-
-static struct platform_device lpc32xx_gpio_led_device = {
- .name = "leds-gpio",
- .id = -1,
- .dev.platform_data = &led_data,
+static struct pl08x_platform_data pl08x_pd = {
};
-static struct platform_device *phy3250_devs[] __initdata = {
- &lpc32xx_rtc_device,
- &lpc32xx_tsc_device,
- &lpc32xx_i2c0_device,
- &lpc32xx_i2c1_device,
- &lpc32xx_i2c2_device,
- &lpc32xx_watchdog_device,
- &lpc32xx_gpio_led_device,
- &lpc32xx_adc_device,
- &lpc32xx_ohci_device,
- &lpc32xx_net_device,
+static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
+ OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", &lpc32xx_ssp0_data),
+ OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data),
+ OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data),
+ OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
+ { }
};
-static struct amba_device *amba_devs[] __initdata = {
- &lpc32xx_clcd_device,
- &lpc32xx_ssp0_device,
-};
-
-/*
- * Board specific functions
- */
-static void __init phy3250_board_init(void)
+static void __init lpc3250_machine_init(void)
{
u32 tmp;
- int i;
-
- lpc32xx_gpio_init();
-
- /* Register GPIOs used on this board */
- if (gpio_request(SPI0_CS_GPIO, "spi0 cs"))
- printk(KERN_ERR "Error requesting gpio %u",
- SPI0_CS_GPIO);
- else if (gpio_direction_output(SPI0_CS_GPIO, 1))
- printk(KERN_ERR "Error setting gpio %u to output",
- SPI0_CS_GPIO);
-
- /* Setup network interface for RMII mode */
- tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
- tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
- tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
- __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
/* Setup SLC NAND controller muxing */
__raw_writel(LPC32XX_CLKPWR_NANDCLK_SEL_SLC,
@@ -300,6 +252,12 @@ static void __init phy3250_board_init(void)
tmp |= LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16;
__raw_writel(tmp, LPC32XX_CLKPWR_LCDCLK_CTRL);
+ /* Set up USB power */
+ tmp = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
+ tmp |= LPC32XX_CLKPWR_USBCTRL_HCLK_EN |
+ LPC32XX_CLKPWR_USBCTRL_USBI2C_EN;
+ __raw_writel(tmp, LPC32XX_CLKPWR_USB_CTRL);
+
/* Set up I2C pull levels */
tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL);
tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE |
@@ -321,54 +279,51 @@ static void __init phy3250_board_init(void)
/*
* AMBA peripheral clocks need to be enabled prior to AMBA device
* detection or a data fault will occur, so enable the clocks
- * here. However, we don't want to enable them if the peripheral
- * isn't included in the image
+ * here.
*/
-#ifdef CONFIG_FB_ARMCLCD
tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL);
__raw_writel((tmp | LPC32XX_CLKPWR_LCDCTRL_CLK_EN),
LPC32XX_CLKPWR_LCDCLK_CTRL);
-#endif
-#ifdef CONFIG_SPI_PL022
+
tmp = __raw_readl(LPC32XX_CLKPWR_SSP_CLK_CTRL);
__raw_writel((tmp | LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN),
LPC32XX_CLKPWR_SSP_CLK_CTRL);
-#endif
- platform_add_devices(phy3250_devs, ARRAY_SIZE(phy3250_devs));
- for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
- struct amba_device *d = amba_devs[i];
- amba_device_register(d, &iomem_resource);
- }
+ tmp = __raw_readl(LPC32XX_CLKPWR_DMA_CLK_CTRL);
+ __raw_writel((tmp | LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN),
+ LPC32XX_CLKPWR_DMA_CLK_CTRL);
/* Test clock needed for UDA1380 initial init */
__raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC |
LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN,
LPC32XX_CLKPWR_TEST_CLK_SEL);
- i2c_register_board_info(0, phy3250_i2c_board_info,
- ARRAY_SIZE(phy3250_i2c_board_info));
-}
-
-static int __init lpc32xx_display_uid(void)
-{
- u32 uid[4];
-
- lpc32xx_get_uid(uid);
-
- printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
- uid[3], uid[2], uid[1], uid[0]);
+ of_platform_populate(NULL, of_default_bus_match_table,
+ lpc32xx_auxdata_lookup, NULL);
- return 1;
+ /* Register GPIOs used on this board */
+ if (gpio_request(SPI0_CS_GPIO, "spi0 cs"))
+ printk(KERN_ERR "Error requesting gpio %u",
+ SPI0_CS_GPIO);
+ else if (gpio_direction_output(SPI0_CS_GPIO, 1))
+ printk(KERN_ERR "Error setting gpio %u to output",
+ SPI0_CS_GPIO);
}
-arch_initcall(lpc32xx_display_uid);
-MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")
- /* Maintainer: Kevin Wells, NXP Semiconductors */
+static char const *lpc32xx_dt_compat[] __initdata = {
+ "nxp,lpc3220",
+ "nxp,lpc3230",
+ "nxp,lpc3240",
+ "nxp,lpc3250",
+ NULL
+};
+
+DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)")
.atag_offset = 0x100,
.map_io = lpc32xx_map_io,
.init_irq = lpc32xx_init_irq,
.timer = &lpc32xx_timer,
- .init_machine = phy3250_board_init,
+ .init_machine = lpc3250_machine_init,
+ .dt_compat = lpc32xx_dt_compat,
.restart = lpc23xx_restart,
MACHINE_END