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author | Anton Arapov <anton@redhat.com> | 2012-08-07 11:21:50 +0200 |
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committer | Anton Arapov <anton@redhat.com> | 2012-08-07 12:52:25 +0200 |
commit | 1d44b6f3fcf6058fb7c960b7558766967e8028f7 (patch) | |
tree | 53d88547c973ba048d233091a3f91f3173ad01df /arch/arm/mach-exynos/mach-origen.c | |
parent | d91eda5d7b0383e6a0c83e0146ff141ff3b1355b (diff) | |
download | kernel-uprobes-1d44b6f3fcf6058fb7c960b7558766967e8028f7.tar.gz kernel-uprobes-1d44b6f3fcf6058fb7c960b7558766967e8028f7.tar.xz kernel-uprobes-1d44b6f3fcf6058fb7c960b7558766967e8028f7.zip |
fedora kernel: 222b075b3ff0d9e88aa9353e3c80667756ed7361v3.5.0-4
Signed-off-by: Anton Arapov <anton@redhat.com>
Diffstat (limited to 'arch/arm/mach-exynos/mach-origen.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-origen.c | 62 |
1 files changed, 49 insertions, 13 deletions
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 878d4c99142..f5572be9d7b 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c @@ -45,6 +45,7 @@ #include <mach/ohci.h> #include <mach/map.h> +#include <drm/exynos_drm.h> #include "common.h" /* Following are default values for UCON, ULCON and UFCON UART registers */ @@ -472,12 +473,10 @@ static struct i2c_board_info i2c0_devs[] __initdata = { static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = { .cd_type = S3C_SDHCI_CD_INTERNAL, - .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, }; static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { .cd_type = S3C_SDHCI_CD_INTERNAL, - .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, }; /* USB EHCI */ @@ -583,31 +582,59 @@ static struct platform_device origen_lcd_hv070wsa = { .dev.platform_data = &origen_lcd_hv070wsa_data, }; -static struct s3c_fb_pd_win origen_fb_win0 = { - .win_mode = { - .left_margin = 64, - .right_margin = 16, - .upper_margin = 64, - .lower_margin = 16, - .hsync_len = 48, - .vsync_len = 3, - .xres = 1024, - .yres = 600, +#ifdef CONFIG_DRM_EXYNOS +static struct exynos_drm_fimd_pdata drm_fimd_pdata = { + .panel = { + .timing = { + .left_margin = 64, + .right_margin = 16, + .upper_margin = 64, + .lower_margin = 16, + .hsync_len = 48, + .vsync_len = 3, + .xres = 1024, + .yres = 600, + }, }, + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | + VIDCON1_INV_VCLK, + .default_win = 0, + .bpp = 32, +}; +#else +static struct s3c_fb_pd_win origen_fb_win0 = { + .xres = 1024, + .yres = 600, .max_bpp = 32, .default_bpp = 24, + .virtual_x = 1024, + .virtual_y = 2 * 600, +}; + +static struct fb_videomode origen_lcd_timing = { + .left_margin = 64, + .right_margin = 16, + .upper_margin = 64, + .lower_margin = 16, + .hsync_len = 48, + .vsync_len = 3, + .xres = 1024, + .yres = 600, }; static struct s3c_fb_platdata origen_lcd_pdata __initdata = { .win[0] = &origen_fb_win0, + .vtiming = &origen_lcd_timing, .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | VIDCON1_INV_VCLK, .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, }; +#endif /* Bluetooth rfkill gpio platform data */ -struct rfkill_gpio_platform_data origen_bt_pdata = { +static struct rfkill_gpio_platform_data origen_bt_pdata = { .reset_gpio = EXYNOS4_GPX2(2), .shutdown_gpio = -1, .type = RFKILL_TYPE_BLUETOOTH, @@ -644,6 +671,9 @@ static struct platform_device *origen_devices[] __initdata = { &s5p_device_mfc_l, &s5p_device_mfc_r, &s5p_device_mixer, +#ifdef CONFIG_DRM_EXYNOS + &exynos_device_drm, +#endif &exynos4_device_ohci, &origen_device_gpiokeys, &origen_lcd_hv070wsa, @@ -719,7 +749,12 @@ static void __init origen_machine_init(void) s5p_tv_setup(); s5p_i2c_hdmiphy_set_platdata(NULL); +#ifdef CONFIG_DRM_EXYNOS + s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; + exynos4_fimd0_gpio_setup_24bpp(); +#else s5p_fimd0_set_platdata(&origen_lcd_pdata); +#endif platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); @@ -735,6 +770,7 @@ MACHINE_START(ORIGEN, "ORIGEN") .map_io = origen_map_io, .handle_irq = gic_handle_irq, .init_machine = origen_machine_init, + .init_late = exynos_init_late, .timer = &exynos4_timer, .reserve = &origen_reserve, .restart = exynos4_restart, |